Merge tag 'i2c-host-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux into i2c/for-mergewindow

This release includes significant updates, with the primary
change being the renaming from "master/slave" to
"controller/target" to adhere to I2C v7 and SMBus 3.2 standards.

New Support:

 - Added support for Intel Arrow Lake-H.
 - Added I2C support in the Arioha SoC by linking the Mediatek
   I2C controller.

Cleanups:

 - Added the MODULE_DESCRIPTION() macro, resolving a modpost
   warning in the ALi 1563 Southbridge driver.
 - Constified the regmap_config declaration in the i2c-designware
   driver.
 - Improved the coding style in the Renesas R-Car driver by
   removing unnecessary semicolons after brackets.

General improvements:

 - In the OMAP device, replaced NOIRQ_SYSTEM_SLEEP_PM_OPS with
   RUNTIME_PM_OPS to enable waking up the controller during
   suspend() before suspend_noirq() kicks in.
 - Improved logging in the Xilinx driver.
 - Added a warning (WARN()) in the Renesas R-Car driver for
   spurious interrupts.

DTS Changes:

 - Removed address-cell and size-cell from the Atmel at91sam,
   nVidia Tegra 20, and Samsung S3c2410 devices.
 - Fixed Texas Instruments OMAP4 I2C controller to comply with
   the i2c-controller.yaml schema.
 - Improved indentation in DTS examples for several I2C devices.
 - Converted the NXP LPC1788 binding to the dt-schema.
 - Added documentation for the compatible string
   thead,th1520-i2c.
 - Added the "power-domains" property for the Meson I2C driver.
This commit is contained in:
Wolfram Sang
2024-07-13 11:10:54 +02:00
621 changed files with 6501 additions and 4033 deletions

View File

@@ -1214,6 +1214,10 @@ D: UDF filesystem
S: (ask for current address)
S: USA
N: Larry Finger
E: Larry.Finger@lwfinger.net
D: Maintainer of wireless drivers, too many to list here
N: Jürgen Fischer
E: fischer@norbit.de
D: Author of Adaptec AHA-152x SCSI driver
@@ -3146,9 +3150,11 @@ S: Triftstra=DFe 55
S: 13353 Berlin
S: Germany
N: Gustavo Pimental
N: Gustavo Pimentel
E: gustavo.pimentel@synopsys.com
D: PCI driver for Synopsys DesignWare
D: Synopsys DesignWare eDMA driver
D: Synopsys DesignWare xData traffic generator
N: Emanuel Pirker
E: epirker@edu.uni-klu.ac.at

View File

@@ -788,25 +788,6 @@
Documentation/networking/netconsole.rst for an
alternative.
<DEVNAME>:<n>.<n>[,options]
Use the specified serial port on the serial core bus.
The addressing uses DEVNAME of the physical serial port
device, followed by the serial core controller instance,
and the serial port instance. The options are the same
as documented for the ttyS addressing above.
The mapping of the serial ports to the tty instances
can be viewed with:
$ ls -d /sys/bus/serial-base/devices/*:*.*/tty/*
/sys/bus/serial-base/devices/00:04:0.0/tty/ttyS0
In the above example, the console can be addressed with
console=00:04:0.0. Note that a console addressed this
way will only get added when the related device driver
is ready. The use of an earlycon parameter in addition to
the console may be desired for console output early on.
uart[8250],io,<addr>[,options]
uart[8250],mmio,<addr>[,options]
uart[8250],mmio16,<addr>[,options]

View File

@@ -62,10 +62,10 @@ cmodx.c::
printf("Value before cmodx: %d\n", value);
// Call prctl before first fence.i is called inside modify_instruction
prctl(PR_RISCV_SET_ICACHE_FLUSH_CTX_ON, PR_RISCV_CTX_SW_FENCEI, PR_RISCV_SCOPE_PER_PROCESS);
prctl(PR_RISCV_SET_ICACHE_FLUSH_CTX, PR_RISCV_CTX_SW_FENCEI_ON, PR_RISCV_SCOPE_PER_PROCESS);
modify_instruction();
// Call prctl after final fence.i is called in process
prctl(PR_RISCV_SET_ICACHE_FLUSH_CTX_OFF, PR_RISCV_CTX_SW_FENCEI, PR_RISCV_SCOPE_PER_PROCESS);
prctl(PR_RISCV_SET_ICACHE_FLUSH_CTX, PR_RISCV_CTX_SW_FENCEI_OFF, PR_RISCV_SCOPE_PER_PROCESS);
value = get_value();
printf("Value after cmodx: %d\n", value);

View File

@@ -30,6 +30,9 @@ properties:
clocks:
minItems: 1
power-domains:
maxItems: 1
required:
- compatible
- reg

View File

@@ -26,6 +26,7 @@ properties:
- microchip,sam9x60-i2c
- items:
- enum:
- microchip,sama7d65-i2c
- microchip,sama7g5-i2c
- microchip,sam9x7-i2c
- const: microchip,sam9x60-i2c
@@ -36,12 +37,6 @@ properties:
interrupts:
maxItems: 1
"#address-cells":
const: 1
"#size-cells":
const: 0
clocks:
maxItems: 1
@@ -72,8 +67,6 @@ required:
- compatible
- reg
- interrupts
- "#address-cells"
- "#size-cells"
- clocks
allOf:
@@ -86,6 +79,7 @@ allOf:
- atmel,sama5d4-i2c
- atmel,sama5d2-i2c
- microchip,sam9x60-i2c
- microchip,sama7d65-i2c
- microchip,sama7g5-i2c
then:
properties:

View File

@@ -76,21 +76,21 @@ else:
examples:
- |
bsca: i2c@f0406200 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&irq0_intc>;
reg = <0xf0406200 0x58>;
interrupts = <0x18>;
interrupt-names = "upg_bsca";
};
bsca: i2c@f0406200 {
compatible = "brcm,brcmstb-i2c";
reg = <0xf0406200 0x58>;
clock-frequency = <390000>;
interrupt-parent = <&irq0_intc>;
interrupts = <0x18>;
interrupt-names = "upg_bsca";
};
- |
ddc0: i2c@7ef04500 {
compatible = "brcm,bcm2711-hdmi-i2c";
reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
reg-names = "bsc", "auto-i2c";
clock-frequency = <390000>;
};
ddc0: i2c@7ef04500 {
compatible = "brcm,bcm2711-hdmi-i2c";
reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
reg-names = "bsc", "auto-i2c";
clock-frequency = <390000>;
};
...

View File

@@ -109,65 +109,65 @@ examples:
// Example for a bus to be demuxed. It contains various I2C clients for
// HDMI, so the bus is named "i2c-hdmi":
i2chdmi: i2c-mux3 {
compatible = "i2c-demux-pinctrl";
i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>;
i2c-bus-name = "i2c-hdmi";
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-demux-pinctrl";
i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>;
i2c-bus-name = "i2c-hdmi";
#address-cells = <1>;
#size-cells = <0>;
ak4643: codec@12 {
compatible = "asahi-kasei,ak4643";
#sound-dai-cells = <0>;
reg = <0x12>;
ak4643: codec@12 {
compatible = "asahi-kasei,ak4643";
#sound-dai-cells = <0>;
reg = <0x12>;
};
composite-in@20 {
compatible = "adi,adv7180";
reg = <0x20>;
port {
adv7180: endpoint {
bus-width = <8>;
remote-endpoint = <&vin1ep0>;
};
};
};
composite-in@20 {
compatible = "adi,adv7180";
reg = <0x20>;
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio1>;
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
clocks = <&cec_clock>;
clock-names = "cec";
port {
adv7180: endpoint {
bus-width = <8>;
remote-endpoint = <&vin1ep0>;
};
avdd-supply = <&fixedregulator1v8>;
dvdd-supply = <&fixedregulator1v8>;
pvdd-supply = <&fixedregulator1v8>;
dvdd-3v-supply = <&fixedregulator3v3>;
bgvdd-supply = <&fixedregulator1v8>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio1>;
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
clocks = <&cec_clock>;
clock-names = "cec";
avdd-supply = <&fixedregulator1v8>;
dvdd-supply = <&fixedregulator1v8>;
pvdd-supply = <&fixedregulator1v8>;
dvdd-3v-supply = <&fixedregulator3v3>;
bgvdd-supply = <&fixedregulator1v8>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con_out>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con_out>;
};
};
};
};
};

View File

@@ -1,33 +0,0 @@
NXP I2C controller for LPC2xxx/178x/18xx/43xx
Required properties:
- compatible: must be "nxp,lpc1788-i2c"
- reg: physical address and length of the device registers
- interrupts: a single interrupt specifier
- clocks: clock for the device
- #address-cells: should be <1>
- #size-cells: should be <0>
Optional properties:
- clock-frequency: the desired I2C bus clock frequency in Hz; in
absence of this property the default value is used (100 kHz).
Example:
i2c0: i2c@400a1000 {
compatible = "nxp,lpc1788-i2c";
reg = <0x400a1000 0x1000>;
interrupts = <18>;
clocks = <&ccu1 CLK_APB1_I2C0>;
#address-cells = <1>;
#size-cells = <0>;
};
&i2c0 {
clock-frequency = <400000>;
lm75@48 {
compatible = "nxp,lm75";
reg = <0x48>;
};
};

View File

@@ -87,12 +87,6 @@ properties:
interrupts:
maxItems: 1
'#address-cells':
const: 1
'#size-cells':
const: 0
clocks:
minItems: 1
maxItems: 2

View File

@@ -0,0 +1,54 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/i2c/nxp,lpc1788-i2c.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP I2C controller for LPC2xxx/178x/18xx/43xx
maintainers:
- Vladimir Zapolskiy <vz@mleia.com>
allOf:
- $ref: /schemas/i2c/i2c-controller.yaml#
properties:
compatible:
const: nxp,lpc1788-i2c
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
clock-frequency:
description: the desired I2C bus clock frequency in Hz
default: 100000
resets:
maxItems: 1
required:
- compatible
- reg
- interrupts
- clocks
unevaluatedProperties: false
examples:
- |
#include "dt-bindings/clock/lpc18xx-ccu.h"
i2c@400a1000 {
compatible = "nxp,lpc1788-i2c";
reg = <0x400a1000 0x1000>;
interrupts = <18>;
clocks = <&ccu1 CLK_APB1_I2C0>;
#address-cells = <1>;
#size-cells = <0>;
};

View File

@@ -44,11 +44,11 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
iic0: i2c@e0070000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,iic-emev2";
reg = <0xe0070000 0x28>;
interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
clocks = <&iic0_sclk>;
clock-names = "sclk";
compatible = "renesas,iic-emev2";
reg = <0xe0070000 0x28>;
interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
clocks = <&iic0_sclk>;
clock-names = "sclk";
#address-cells = <1>;
#size-cells = <0>;
};

View File

@@ -153,14 +153,14 @@ examples:
#include <dt-bindings/power/r8a7791-sysc.h>
i2c0: i2c@e6508000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
reg = <0xe6508000 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <400000>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <6>;
compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
reg = <0xe6508000 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <400000>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
};

View File

@@ -97,21 +97,21 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
i2c0: i2c@fcfee000 {
compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
reg = <0xfcfee000 0x44>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tei", "ri", "ti", "spi", "sti", "naki", "ali",
"tmoi";
clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
clock-frequency = <100000>;
power-domains = <&cpg_clocks>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
reg = <0xfcfee000 0x44>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tei", "ri", "ti", "spi", "sti", "naki", "ali",
"tmoi";
clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
clock-frequency = <100000>;
power-domains = <&cpg_clocks>;
#address-cells = <1>;
#size-cells = <0>;
};

View File

@@ -134,16 +134,16 @@ examples:
#include <dt-bindings/power/r8a7790-sysc.h>
iic0: i2c@e6500000 {
compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0xe6500000 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 318>;
clock-frequency = <400000>;
dmas = <&dmac0 0x61>, <&dmac0 0x62>, <&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 318>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0xe6500000 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 318>;
clock-frequency = <400000>;
dmas = <&dmac0 0x61>, <&dmac0 0x62>, <&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 318>;
#address-cells = <1>;
#size-cells = <0>;
};

View File

@@ -26,9 +26,6 @@ properties:
- samsung,exynos850-i2c
- const: samsung,s3c2440-i2c
'#address-cells':
const: 1
clocks:
maxItems: 1
@@ -73,9 +70,6 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle
description: Pandle to syscon used to control the system registers.
'#size-cells':
const: 0
required:
- compatible
- reg

View File

@@ -33,6 +33,10 @@ properties:
- const: snps,designware-i2c
- description: Baikal-T1 SoC System I2C controller
const: baikal,bt1-sys-i2c
- description: T-HEAD TH1520 SoCs I2C controller
items:
- const: thead,th1520-i2c
- const: snps,designware-i2c
reg:
minItems: 1

View File

@@ -145,31 +145,31 @@ examples:
#include <dt-bindings/mfd/stm32f7-rcc.h>
#include <dt-bindings/clock/stm32fx-clock.h>
//Example 1 (with st,stm32f4-i2c compatible)
i2c@40005400 {
compatible = "st,stm32f4-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005400 0x400>;
interrupts = <31>,
<32>;
resets = <&rcc 277>;
clocks = <&rcc 0 149>;
};
i2c@40005400 {
compatible = "st,stm32f4-i2c";
reg = <0x40005400 0x400>;
interrupts = <31>,
<32>;
resets = <&rcc 277>;
clocks = <&rcc 0 149>;
#address-cells = <1>;
#size-cells = <0>;
};
- |
#include <dt-bindings/mfd/stm32f7-rcc.h>
#include <dt-bindings/clock/stm32fx-clock.h>
//Example 2 (with st,stm32f7-i2c compatible)
i2c@40005800 {
compatible = "st,stm32f7-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005800 0x400>;
interrupts = <31>,
<32>;
resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
clocks = <&rcc 1 CLK_I2C1>;
};
i2c@40005800 {
compatible = "st,stm32f7-i2c";
reg = <0x40005800 0x400>;
interrupts = <31>,
<32>;
resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
clocks = <&rcc 1 CLK_I2C1>;
#address-cells = <1>;
#size-cells = <0>;
};
- |
#include <dt-bindings/mfd/stm32f7-rcc.h>
@@ -178,16 +178,16 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/stm32mp1-clks.h>
#include <dt-bindings/reset/stm32mp1-resets.h>
i2c@40013000 {
compatible = "st,stm32mp15-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40013000 0x400>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc I2C2_K>;
resets = <&rcc I2C2_R>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
st,syscfg-fmp = <&syscfg 0x4 0x2>;
};
i2c@40013000 {
compatible = "st,stm32mp15-i2c";
reg = <0x40013000 0x400>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc I2C2_K>;
resets = <&rcc I2C2_R>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
st,syscfg-fmp = <&syscfg 0x4 0x2>;
#address-cells = <1>;
#size-cells = <0>;
};

View File

@@ -37,16 +37,8 @@ properties:
clock-names:
const: fck
clock-frequency: true
power-domains: true
"#address-cells":
const: 1
"#size-cells":
const: 0
ti,hwmods:
description:
Must be "i2c<n>", n being the instance number (1-based).
@@ -55,38 +47,34 @@ properties:
$ref: /schemas/types.yaml#/definitions/string
deprecated: true
# subnode's properties
patternProperties:
"@[0-9a-f]+$":
type: object
description:
Flash device uses the below defined properties in the subnode.
required:
- compatible
- reg
- interrupts
additionalProperties: false
allOf:
- $ref: /schemas/i2c/i2c-controller.yaml#
if:
properties:
compatible:
enum:
- ti,omap2420-i2c
- ti,omap2430-i2c
- ti,omap3-i2c
- ti,omap4-i2c
- if:
properties:
compatible:
enum:
- ti,omap2420-i2c
- ti,omap2430-i2c
- ti,omap3-i2c
- ti,omap4-i2c
then:
properties:
ti,hwmods:
items:
- pattern: "^i2c([1-9])$"
then:
properties:
ti,hwmods:
items:
- pattern: "^i2c([1-9])$"
else:
properties:
ti,hwmods: false
else:
properties:
ti,hwmods: false
unevaluatedProperties: false
examples:
- |
@@ -94,9 +82,9 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
main_i2c0: i2c@2000000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x2000000 0x100>;
interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
};
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x2000000 0x100>;
interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
};

View File

@@ -128,7 +128,6 @@ required:
- cell-index
- reg
- fsl,fman-ports
- ptp-timer
dependencies:
pcs-handle-names:

View File

@@ -29,7 +29,6 @@ properties:
- qcom,pm7325-gpio
- qcom,pm7550ba-gpio
- qcom,pm8005-gpio
- qcom,pm8008-gpio
- qcom,pm8018-gpio
- qcom,pm8019-gpio
- qcom,pm8038-gpio
@@ -126,7 +125,6 @@ allOf:
compatible:
contains:
enum:
- qcom,pm8008-gpio
- qcom,pmi8950-gpio
- qcom,pmr735d-gpio
then:
@@ -448,7 +446,6 @@ $defs:
- gpio1-gpio10 for pm7325
- gpio1-gpio8 for pm7550ba
- gpio1-gpio4 for pm8005
- gpio1-gpio2 for pm8008
- gpio1-gpio6 for pm8018
- gpio1-gpio12 for pm8038
- gpio1-gpio40 for pm8058

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