mirror of
https://github.com/Dasharo/linux.git
synced 2026-03-06 15:25:10 -08:00
Merge remote-tracking branches 'spi/topic/bcm2835', 'spi/topic/bcm63xx', 'spi/topic/bcm63xx-hsspi', 'spi/topic/bitbang', 'spi/topic/bpw', 'spi/topic/clps711x', 'spi/topic/coldfire', 'spi/topic/davinci', 'spi/topic/dw' and 'spi/topic/falcon' into spi-linus
This commit is contained in:
@@ -118,6 +118,13 @@ config SPI_BCM63XX
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help
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Enable support for the SPI controller on the Broadcom BCM63xx SoCs.
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config SPI_BCM63XX_HSSPI
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tristate "Broadcom BCM63XX HS SPI controller driver"
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depends on BCM63XX || COMPILE_TEST
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help
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This enables support for the High Speed SPI controller present on
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newer Broadcom BCM63XX SoCs.
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config SPI_BITBANG
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tristate "Utilities for Bitbanging SPI masters"
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help
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@@ -159,7 +166,6 @@ config SPI_DAVINCI
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tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller"
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depends on ARCH_DAVINCI || ARCH_KEYSTONE
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select SPI_BITBANG
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select TI_EDMA
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help
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SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules.
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@@ -370,7 +376,7 @@ config SPI_PXA2XX_PCI
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config SPI_RSPI
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tristate "Renesas RSPI controller"
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depends on (SUPERH || ARCH_SHMOBILE) && SH_DMAE_BASE
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depends on (SUPERH && SH_DMAE_BASE) || ARCH_SHMOBILE
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help
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SPI driver for Renesas RSPI blocks.
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@@ -16,6 +16,7 @@ obj-$(CONFIG_SPI_ATH79) += spi-ath79.o
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obj-$(CONFIG_SPI_AU1550) += spi-au1550.o
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obj-$(CONFIG_SPI_BCM2835) += spi-bcm2835.o
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obj-$(CONFIG_SPI_BCM63XX) += spi-bcm63xx.o
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obj-$(CONFIG_SPI_BCM63XX_HSSPI) += spi-bcm63xx-hsspi.o
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obj-$(CONFIG_SPI_BFIN5XX) += spi-bfin5xx.o
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obj-$(CONFIG_SPI_BFIN_V3) += spi-bfin-v3.o
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obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o
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@@ -347,8 +347,8 @@ static int bcm2835_spi_probe(struct platform_device *pdev)
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clk_prepare_enable(bs->clk);
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err = request_irq(bs->irq, bcm2835_spi_interrupt, 0,
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dev_name(&pdev->dev), master);
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err = devm_request_irq(&pdev->dev, bs->irq, bcm2835_spi_interrupt, 0,
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dev_name(&pdev->dev), master);
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if (err) {
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dev_err(&pdev->dev, "could not request IRQ: %d\n", err);
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goto out_clk_disable;
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@@ -361,13 +361,11 @@ static int bcm2835_spi_probe(struct platform_device *pdev)
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err = devm_spi_register_master(&pdev->dev, master);
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if (err) {
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dev_err(&pdev->dev, "could not register SPI master: %d\n", err);
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goto out_free_irq;
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goto out_clk_disable;
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}
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return 0;
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out_free_irq:
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free_irq(bs->irq, master);
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out_clk_disable:
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clk_disable_unprepare(bs->clk);
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out_master_put:
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@@ -380,8 +378,6 @@ static int bcm2835_spi_remove(struct platform_device *pdev)
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struct spi_master *master = platform_get_drvdata(pdev);
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struct bcm2835_spi *bs = spi_master_get_devdata(master);
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free_irq(bs->irq, master);
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/* Clear FIFOs, and disable the HW block */
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bcm2835_wr(bs, BCM2835_SPI_CS,
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BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX);
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475
drivers/spi/spi-bcm63xx-hsspi.c
Normal file
475
drivers/spi/spi-bcm63xx-hsspi.c
Normal file
@@ -0,0 +1,475 @@
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/*
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* Broadcom BCM63XX High Speed SPI Controller driver
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*
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* Copyright 2000-2010 Broadcom Corporation
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* Copyright 2012-2013 Jonas Gorski <jogo@openwrt.org>
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/spi/spi.h>
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#include <linux/workqueue.h>
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#include <linux/mutex.h>
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#define HSSPI_GLOBAL_CTRL_REG 0x0
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#define GLOBAL_CTRL_CS_POLARITY_SHIFT 0
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#define GLOBAL_CTRL_CS_POLARITY_MASK 0x000000ff
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#define GLOBAL_CTRL_PLL_CLK_CTRL_SHIFT 8
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#define GLOBAL_CTRL_PLL_CLK_CTRL_MASK 0x0000ff00
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#define GLOBAL_CTRL_CLK_GATE_SSOFF BIT(16)
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#define GLOBAL_CTRL_CLK_POLARITY BIT(17)
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#define GLOBAL_CTRL_MOSI_IDLE BIT(18)
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#define HSSPI_GLOBAL_EXT_TRIGGER_REG 0x4
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#define HSSPI_INT_STATUS_REG 0x8
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#define HSSPI_INT_STATUS_MASKED_REG 0xc
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#define HSSPI_INT_MASK_REG 0x10
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#define HSSPI_PINGx_CMD_DONE(i) BIT((i * 8) + 0)
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#define HSSPI_PINGx_RX_OVER(i) BIT((i * 8) + 1)
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#define HSSPI_PINGx_TX_UNDER(i) BIT((i * 8) + 2)
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#define HSSPI_PINGx_POLL_TIMEOUT(i) BIT((i * 8) + 3)
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#define HSSPI_PINGx_CTRL_INVAL(i) BIT((i * 8) + 4)
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#define HSSPI_INT_CLEAR_ALL 0xff001f1f
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#define HSSPI_PINGPONG_COMMAND_REG(x) (0x80 + (x) * 0x40)
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#define PINGPONG_CMD_COMMAND_MASK 0xf
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#define PINGPONG_COMMAND_NOOP 0
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#define PINGPONG_COMMAND_START_NOW 1
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#define PINGPONG_COMMAND_START_TRIGGER 2
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#define PINGPONG_COMMAND_HALT 3
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#define PINGPONG_COMMAND_FLUSH 4
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#define PINGPONG_CMD_PROFILE_SHIFT 8
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#define PINGPONG_CMD_SS_SHIFT 12
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#define HSSPI_PINGPONG_STATUS_REG(x) (0x84 + (x) * 0x40)
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#define HSSPI_PROFILE_CLK_CTRL_REG(x) (0x100 + (x) * 0x20)
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#define CLK_CTRL_FREQ_CTRL_MASK 0x0000ffff
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#define CLK_CTRL_SPI_CLK_2X_SEL BIT(14)
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#define CLK_CTRL_ACCUM_RST_ON_LOOP BIT(15)
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#define HSSPI_PROFILE_SIGNAL_CTRL_REG(x) (0x104 + (x) * 0x20)
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#define SIGNAL_CTRL_LATCH_RISING BIT(12)
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#define SIGNAL_CTRL_LAUNCH_RISING BIT(13)
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#define SIGNAL_CTRL_ASYNC_INPUT_PATH BIT(16)
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#define HSSPI_PROFILE_MODE_CTRL_REG(x) (0x108 + (x) * 0x20)
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#define MODE_CTRL_MULTIDATA_RD_STRT_SHIFT 8
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#define MODE_CTRL_MULTIDATA_WR_STRT_SHIFT 12
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#define MODE_CTRL_MULTIDATA_RD_SIZE_SHIFT 16
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#define MODE_CTRL_MULTIDATA_WR_SIZE_SHIFT 18
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#define MODE_CTRL_MODE_3WIRE BIT(20)
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#define MODE_CTRL_PREPENDBYTE_CNT_SHIFT 24
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#define HSSPI_FIFO_REG(x) (0x200 + (x) * 0x200)
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#define HSSPI_OP_CODE_SHIFT 13
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#define HSSPI_OP_SLEEP (0 << HSSPI_OP_CODE_SHIFT)
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#define HSSPI_OP_READ_WRITE (1 << HSSPI_OP_CODE_SHIFT)
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#define HSSPI_OP_WRITE (2 << HSSPI_OP_CODE_SHIFT)
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#define HSSPI_OP_READ (3 << HSSPI_OP_CODE_SHIFT)
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#define HSSPI_OP_SETIRQ (4 << HSSPI_OP_CODE_SHIFT)
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#define HSSPI_BUFFER_LEN 512
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#define HSSPI_OPCODE_LEN 2
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#define HSSPI_MAX_PREPEND_LEN 15
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#define HSSPI_MAX_SYNC_CLOCK 30000000
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#define HSSPI_BUS_NUM 1 /* 0 is legacy SPI */
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struct bcm63xx_hsspi {
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struct completion done;
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struct mutex bus_mutex;
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struct platform_device *pdev;
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struct clk *clk;
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void __iomem *regs;
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u8 __iomem *fifo;
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u32 speed_hz;
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u8 cs_polarity;
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};
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static void bcm63xx_hsspi_set_cs(struct bcm63xx_hsspi *bs, unsigned cs,
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bool active)
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{
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u32 reg;
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mutex_lock(&bs->bus_mutex);
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reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
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reg &= ~BIT(cs);
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if (active == !(bs->cs_polarity & BIT(cs)))
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reg |= BIT(cs);
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__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
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mutex_unlock(&bs->bus_mutex);
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}
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static void bcm63xx_hsspi_set_clk(struct bcm63xx_hsspi *bs,
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struct spi_device *spi, int hz)
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{
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unsigned profile = spi->chip_select;
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u32 reg;
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reg = DIV_ROUND_UP(2048, DIV_ROUND_UP(bs->speed_hz, hz));
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__raw_writel(CLK_CTRL_ACCUM_RST_ON_LOOP | reg,
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bs->regs + HSSPI_PROFILE_CLK_CTRL_REG(profile));
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reg = __raw_readl(bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile));
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if (hz > HSSPI_MAX_SYNC_CLOCK)
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reg |= SIGNAL_CTRL_ASYNC_INPUT_PATH;
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else
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reg &= ~SIGNAL_CTRL_ASYNC_INPUT_PATH;
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__raw_writel(reg, bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile));
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mutex_lock(&bs->bus_mutex);
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/* setup clock polarity */
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reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
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reg &= ~GLOBAL_CTRL_CLK_POLARITY;
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if (spi->mode & SPI_CPOL)
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reg |= GLOBAL_CTRL_CLK_POLARITY;
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__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
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mutex_unlock(&bs->bus_mutex);
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}
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static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, struct spi_transfer *t)
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{
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struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master);
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unsigned chip_select = spi->chip_select;
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u16 opcode = 0;
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int pending = t->len;
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int step_size = HSSPI_BUFFER_LEN;
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const u8 *tx = t->tx_buf;
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u8 *rx = t->rx_buf;
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bcm63xx_hsspi_set_clk(bs, spi, t->speed_hz);
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bcm63xx_hsspi_set_cs(bs, spi->chip_select, true);
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if (tx && rx)
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opcode = HSSPI_OP_READ_WRITE;
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else if (tx)
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opcode = HSSPI_OP_WRITE;
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else if (rx)
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opcode = HSSPI_OP_READ;
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if (opcode != HSSPI_OP_READ)
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step_size -= HSSPI_OPCODE_LEN;
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__raw_writel(0 << MODE_CTRL_PREPENDBYTE_CNT_SHIFT |
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2 << MODE_CTRL_MULTIDATA_WR_STRT_SHIFT |
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2 << MODE_CTRL_MULTIDATA_RD_STRT_SHIFT | 0xff,
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bs->regs + HSSPI_PROFILE_MODE_CTRL_REG(chip_select));
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while (pending > 0) {
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int curr_step = min_t(int, step_size, pending);
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init_completion(&bs->done);
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if (tx) {
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memcpy_toio(bs->fifo + HSSPI_OPCODE_LEN, tx, curr_step);
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tx += curr_step;
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}
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__raw_writew(opcode | curr_step, bs->fifo);
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/* enable interrupt */
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__raw_writel(HSSPI_PINGx_CMD_DONE(0),
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bs->regs + HSSPI_INT_MASK_REG);
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/* start the transfer */
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__raw_writel(!chip_select << PINGPONG_CMD_SS_SHIFT |
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chip_select << PINGPONG_CMD_PROFILE_SHIFT |
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PINGPONG_COMMAND_START_NOW,
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bs->regs + HSSPI_PINGPONG_COMMAND_REG(0));
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if (wait_for_completion_timeout(&bs->done, HZ) == 0) {
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dev_err(&bs->pdev->dev, "transfer timed out!\n");
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return -ETIMEDOUT;
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}
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if (rx) {
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memcpy_fromio(rx, bs->fifo, curr_step);
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rx += curr_step;
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}
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pending -= curr_step;
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}
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return 0;
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}
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static int bcm63xx_hsspi_setup(struct spi_device *spi)
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{
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struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master);
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u32 reg;
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reg = __raw_readl(bs->regs +
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HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select));
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reg &= ~(SIGNAL_CTRL_LAUNCH_RISING | SIGNAL_CTRL_LATCH_RISING);
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if (spi->mode & SPI_CPHA)
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reg |= SIGNAL_CTRL_LAUNCH_RISING;
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else
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reg |= SIGNAL_CTRL_LATCH_RISING;
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__raw_writel(reg, bs->regs +
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HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select));
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mutex_lock(&bs->bus_mutex);
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reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
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|
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/* only change actual polarities if there is no transfer */
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if ((reg & GLOBAL_CTRL_CS_POLARITY_MASK) == bs->cs_polarity) {
|
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if (spi->mode & SPI_CS_HIGH)
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reg |= BIT(spi->chip_select);
|
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else
|
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reg &= ~BIT(spi->chip_select);
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__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
|
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}
|
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|
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if (spi->mode & SPI_CS_HIGH)
|
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bs->cs_polarity |= BIT(spi->chip_select);
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else
|
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bs->cs_polarity &= ~BIT(spi->chip_select);
|
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|
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mutex_unlock(&bs->bus_mutex);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bcm63xx_hsspi_transfer_one(struct spi_master *master,
|
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struct spi_message *msg)
|
||||
{
|
||||
struct bcm63xx_hsspi *bs = spi_master_get_devdata(master);
|
||||
struct spi_transfer *t;
|
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struct spi_device *spi = msg->spi;
|
||||
int status = -EINVAL;
|
||||
int dummy_cs;
|
||||
u32 reg;
|
||||
|
||||
/* This controller does not support keeping CS active during idle.
|
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* To work around this, we use the following ugly hack:
|
||||
*
|
||||
* a. Invert the target chip select's polarity so it will be active.
|
||||
* b. Select a "dummy" chip select to use as the hardware target.
|
||||
* c. Invert the dummy chip select's polarity so it will be inactive
|
||||
* during the actual transfers.
|
||||
* d. Tell the hardware to send to the dummy chip select. Thanks to
|
||||
* the multiplexed nature of SPI the actual target will receive
|
||||
* the transfer and we see its response.
|
||||
*
|
||||
* e. At the end restore the polarities again to their default values.
|
||||
*/
|
||||
|
||||
dummy_cs = !spi->chip_select;
|
||||
bcm63xx_hsspi_set_cs(bs, dummy_cs, true);
|
||||
|
||||
list_for_each_entry(t, &msg->transfers, transfer_list) {
|
||||
status = bcm63xx_hsspi_do_txrx(spi, t);
|
||||
if (status)
|
||||
break;
|
||||
|
||||
msg->actual_length += t->len;
|
||||
|
||||
if (t->delay_usecs)
|
||||
udelay(t->delay_usecs);
|
||||
|
||||
if (t->cs_change)
|
||||
bcm63xx_hsspi_set_cs(bs, spi->chip_select, false);
|
||||
}
|
||||
|
||||
mutex_lock(&bs->bus_mutex);
|
||||
reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
|
||||
reg &= ~GLOBAL_CTRL_CS_POLARITY_MASK;
|
||||
reg |= bs->cs_polarity;
|
||||
__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
|
||||
mutex_unlock(&bs->bus_mutex);
|
||||
|
||||
msg->status = status;
|
||||
spi_finalize_current_message(master);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static irqreturn_t bcm63xx_hsspi_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
struct bcm63xx_hsspi *bs = (struct bcm63xx_hsspi *)dev_id;
|
||||
|
||||
if (__raw_readl(bs->regs + HSSPI_INT_STATUS_MASKED_REG) == 0)
|
||||
return IRQ_NONE;
|
||||
|
||||
__raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG);
|
||||
__raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);
|
||||
|
||||
complete(&bs->done);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static int bcm63xx_hsspi_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct spi_master *master;
|
||||
struct bcm63xx_hsspi *bs;
|
||||
struct resource *res_mem;
|
||||
void __iomem *regs;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct clk *clk;
|
||||
int irq, ret;
|
||||
u32 reg, rate;
|
||||
|
||||
irq = platform_get_irq(pdev, 0);
|
||||
if (irq < 0) {
|
||||
dev_err(dev, "no irq\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
regs = devm_ioremap_resource(dev, res_mem);
|
||||
if (IS_ERR(regs))
|
||||
return PTR_ERR(regs);
|
||||
|
||||
clk = devm_clk_get(dev, "hsspi");
|
||||
|
||||
if (IS_ERR(clk))
|
||||
return PTR_ERR(clk);
|
||||
|
||||
rate = clk_get_rate(clk);
|
||||
if (!rate)
|
||||
return -EINVAL;
|
||||
|
||||
ret = clk_prepare_enable(clk);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
master = spi_alloc_master(&pdev->dev, sizeof(*bs));
|
||||
if (!master) {
|
||||
ret = -ENOMEM;
|
||||
goto out_disable_clk;
|
||||
}
|
||||
|
||||
bs = spi_master_get_devdata(master);
|
||||
bs->pdev = pdev;
|
||||
bs->clk = clk;
|
||||
bs->regs = regs;
|
||||
bs->speed_hz = rate;
|
||||
bs->fifo = (u8 __iomem *)(bs->regs + HSSPI_FIFO_REG(0));
|
||||
|
||||
mutex_init(&bs->bus_mutex);
|
||||
|
||||
master->bus_num = HSSPI_BUS_NUM;
|
||||
master->num_chipselect = 8;
|
||||
master->setup = bcm63xx_hsspi_setup;
|
||||
master->transfer_one_message = bcm63xx_hsspi_transfer_one;
|
||||
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
|
||||
master->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
master->auto_runtime_pm = true;
|
||||
|
||||
platform_set_drvdata(pdev, master);
|
||||
|
||||
/* Initialize the hardware */
|
||||
__raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);
|
||||
|
||||
/* clean up any pending interrupts */
|
||||
__raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG);
|
||||
|
||||
/* read out default CS polarities */
|
||||
reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
|
||||
bs->cs_polarity = reg & GLOBAL_CTRL_CS_POLARITY_MASK;
|
||||
__raw_writel(reg | GLOBAL_CTRL_CLK_GATE_SSOFF,
|
||||
bs->regs + HSSPI_GLOBAL_CTRL_REG);
|
||||
|
||||
ret = devm_request_irq(dev, irq, bcm63xx_hsspi_interrupt, IRQF_SHARED,
|
||||
pdev->name, bs);
|
||||
|
||||
if (ret)
|
||||
goto out_put_master;
|
||||
|
||||
/* register and we are done */
|
||||
ret = devm_spi_register_master(dev, master);
|
||||
if (ret)
|
||||
goto out_put_master;
|
||||
|
||||
return 0;
|
||||
|
||||
out_put_master:
|
||||
spi_master_put(master);
|
||||
out_disable_clk:
|
||||
clk_disable_unprepare(clk);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
static int bcm63xx_hsspi_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct spi_master *master = platform_get_drvdata(pdev);
|
||||
struct bcm63xx_hsspi *bs = spi_master_get_devdata(master);
|
||||
|
||||
/* reset the hardware and block queue progress */
|
||||
__raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);
|
||||
clk_disable_unprepare(bs->clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
static int bcm63xx_hsspi_suspend(struct device *dev)
|
||||
{
|
||||
struct spi_master *master = dev_get_drvdata(dev);
|
||||
struct bcm63xx_hsspi *bs = spi_master_get_devdata(master);
|
||||
|
||||
spi_master_suspend(master);
|
||||
clk_disable_unprepare(bs->clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bcm63xx_hsspi_resume(struct device *dev)
|
||||
{
|
||||
struct spi_master *master = dev_get_drvdata(dev);
|
||||
struct bcm63xx_hsspi *bs = spi_master_get_devdata(master);
|
||||
int ret;
|
||||
|
||||
ret = clk_prepare_enable(bs->clk);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
spi_master_resume(master);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static const struct dev_pm_ops bcm63xx_hsspi_pm_ops = {
|
||||
SET_SYSTEM_SLEEP_PM_OPS(bcm63xx_hsspi_suspend, bcm63xx_hsspi_resume)
|
||||
};
|
||||
|
||||
static struct platform_driver bcm63xx_hsspi_driver = {
|
||||
.driver = {
|
||||
.name = "bcm63xx-hsspi",
|
||||
.owner = THIS_MODULE,
|
||||
.pm = &bcm63xx_hsspi_pm_ops,
|
||||
},
|
||||
.probe = bcm63xx_hsspi_probe,
|
||||
.remove = bcm63xx_hsspi_remove,
|
||||
};
|
||||
|
||||
module_platform_driver(bcm63xx_hsspi_driver);
|
||||
|
||||
MODULE_ALIAS("platform:bcm63xx_hsspi");
|
||||
MODULE_DESCRIPTION("Broadcom BCM63xx High Speed SPI Controller driver");
|
||||
MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
|
||||
MODULE_LICENSE("GPL");
|
||||
@@ -203,13 +203,7 @@ static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *first,
|
||||
if (!timeout)
|
||||
return -ETIMEDOUT;
|
||||
|
||||
/* read out all data */
|
||||
rx_tail = bcm_spi_readb(bs, SPI_RX_TAIL);
|
||||
|
||||
if (do_rx && rx_tail != len)
|
||||
return -EIO;
|
||||
|
||||
if (!rx_tail)
|
||||
if (!do_rx)
|
||||
return 0;
|
||||
|
||||
len = 0;
|
||||
@@ -343,22 +337,19 @@ static int bcm63xx_spi_probe(struct platform_device *pdev)
|
||||
irq = platform_get_irq(pdev, 0);
|
||||
if (irq < 0) {
|
||||
dev_err(dev, "no irq\n");
|
||||
ret = -ENXIO;
|
||||
goto out;
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
clk = clk_get(dev, "spi");
|
||||
clk = devm_clk_get(dev, "spi");
|
||||
if (IS_ERR(clk)) {
|
||||
dev_err(dev, "no clock for device\n");
|
||||
ret = PTR_ERR(clk);
|
||||
goto out;
|
||||
return PTR_ERR(clk);
|
||||
}
|
||||
|
||||
master = spi_alloc_master(dev, sizeof(*bs));
|
||||
if (!master) {
|
||||
dev_err(dev, "out of memory\n");
|
||||
ret = -ENOMEM;
|
||||
goto out_clk;
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
bs = spi_master_get_devdata(master);
|
||||
@@ -406,7 +397,10 @@ static int bcm63xx_spi_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
/* Initialize hardware */
|
||||
clk_prepare_enable(bs->clk);
|
||||
ret = clk_prepare_enable(bs->clk);
|
||||
if (ret)
|
||||
goto out_err;
|
||||
|
||||
bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS);
|
||||
|
||||
/* register and we are done */
|
||||
@@ -425,9 +419,6 @@ out_clk_disable:
|
||||
clk_disable_unprepare(clk);
|
||||
out_err:
|
||||
spi_master_put(master);
|
||||
out_clk:
|
||||
clk_put(clk);
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -441,12 +432,11 @@ static int bcm63xx_spi_remove(struct platform_device *pdev)
|
||||
|
||||
/* HW shutdown */
|
||||
clk_disable_unprepare(bs->clk);
|
||||
clk_put(bs->clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
static int bcm63xx_spi_suspend(struct device *dev)
|
||||
{
|
||||
struct spi_master *master = dev_get_drvdata(dev);
|
||||
@@ -463,29 +453,27 @@ static int bcm63xx_spi_resume(struct device *dev)
|
||||
{
|
||||
struct spi_master *master = dev_get_drvdata(dev);
|
||||
struct bcm63xx_spi *bs = spi_master_get_devdata(master);
|
||||
int ret;
|
||||
|
||||
clk_prepare_enable(bs->clk);
|
||||
ret = clk_prepare_enable(bs->clk);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
spi_master_resume(master);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static const struct dev_pm_ops bcm63xx_spi_pm_ops = {
|
||||
.suspend = bcm63xx_spi_suspend,
|
||||
.resume = bcm63xx_spi_resume,
|
||||
SET_SYSTEM_SLEEP_PM_OPS(bcm63xx_spi_suspend, bcm63xx_spi_resume)
|
||||
};
|
||||
|
||||
#define BCM63XX_SPI_PM_OPS (&bcm63xx_spi_pm_ops)
|
||||
#else
|
||||
#define BCM63XX_SPI_PM_OPS NULL
|
||||
#endif
|
||||
|
||||
static struct platform_driver bcm63xx_spi_driver = {
|
||||
.driver = {
|
||||
.name = "bcm63xx-spi",
|
||||
.owner = THIS_MODULE,
|
||||
.pm = BCM63XX_SPI_PM_OPS,
|
||||
.pm = &bcm63xx_spi_pm_ops,
|
||||
},
|
||||
.probe = bcm63xx_spi_probe,
|
||||
.remove = bcm63xx_spi_remove,
|
||||
|
||||
@@ -38,7 +38,7 @@
|
||||
*
|
||||
* Since this is software, the timings may not be exactly what your board's
|
||||
* chips need ... there may be several reasons you'd need to tweak timings
|
||||
* in these routines, not just make to make it faster or slower to match a
|
||||
* in these routines, not just to make it faster or slower to match a
|
||||
* particular CPU clock rate.
|
||||
*/
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/*
|
||||
* CLPS711X SPI bus driver
|
||||
*
|
||||
* Copyright (C) 2012 Alexander Shiyan <shc_work@mail.ru>
|
||||
* Copyright (C) 2012-2014 Alexander Shiyan <shc_work@mail.ru>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -198,7 +198,7 @@ static int spi_clps711x_probe(struct platform_device *pdev)
|
||||
ret = -EINVAL;
|
||||
goto err_out;
|
||||
}
|
||||
if (gpio_request(hw->chipselect[i], DRIVER_NAME)) {
|
||||
if (devm_gpio_request(&pdev->dev, hw->chipselect[i], NULL)) {
|
||||
dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i);
|
||||
ret = -EINVAL;
|
||||
goto err_out;
|
||||
@@ -240,38 +240,21 @@ static int spi_clps711x_probe(struct platform_device *pdev)
|
||||
dev_err(&pdev->dev, "Failed to register master\n");
|
||||
|
||||
err_out:
|
||||
while (--i >= 0)
|
||||
if (gpio_is_valid(hw->chipselect[i]))
|
||||
gpio_free(hw->chipselect[i]);
|
||||
|
||||
spi_master_put(master);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int spi_clps711x_remove(struct platform_device *pdev)
|
||||
{
|
||||
int i;
|
||||
struct spi_master *master = platform_get_drvdata(pdev);
|
||||
struct spi_clps711x_data *hw = spi_master_get_devdata(master);
|
||||
|
||||
for (i = 0; i < master->num_chipselect; i++)
|
||||
if (gpio_is_valid(hw->chipselect[i]))
|
||||
gpio_free(hw->chipselect[i]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver clps711x_spi_driver = {
|
||||
.driver = {
|
||||
.name = DRIVER_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
.probe = spi_clps711x_probe,
|
||||
.remove = spi_clps711x_remove,
|
||||
};
|
||||
module_platform_driver(clps711x_spi_driver);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>");
|
||||
MODULE_DESCRIPTION("CLPS711X SPI bus driver");
|
||||
MODULE_ALIAS("platform:" DRIVER_NAME);
|
||||
|
||||
@@ -397,44 +397,31 @@ static int mcfqspi_probe(struct platform_device *pdev)
|
||||
mcfqspi = spi_master_get_devdata(master);
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!res) {
|
||||
dev_dbg(&pdev->dev, "platform_get_resource failed\n");
|
||||
status = -ENXIO;
|
||||
mcfqspi->iobase = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(mcfqspi->iobase)) {
|
||||
status = PTR_ERR(mcfqspi->iobase);
|
||||
goto fail0;
|
||||
}
|
||||
|
||||
if (!request_mem_region(res->start, resource_size(res), pdev->name)) {
|
||||
dev_dbg(&pdev->dev, "request_mem_region failed\n");
|
||||
status = -EBUSY;
|
||||
goto fail0;
|
||||
}
|
||||
|
||||
mcfqspi->iobase = ioremap(res->start, resource_size(res));
|
||||
if (!mcfqspi->iobase) {
|
||||
dev_dbg(&pdev->dev, "ioremap failed\n");
|
||||
status = -ENOMEM;
|
||||
goto fail1;
|
||||
}
|
||||
|
||||
mcfqspi->irq = platform_get_irq(pdev, 0);
|
||||
if (mcfqspi->irq < 0) {
|
||||
dev_dbg(&pdev->dev, "platform_get_irq failed\n");
|
||||
status = -ENXIO;
|
||||
goto fail2;
|
||||
goto fail0;
|
||||
}
|
||||
|
||||
status = request_irq(mcfqspi->irq, mcfqspi_irq_handler, 0,
|
||||
pdev->name, mcfqspi);
|
||||
status = devm_request_irq(&pdev->dev, mcfqspi->irq, mcfqspi_irq_handler,
|
||||
0, pdev->name, mcfqspi);
|
||||
if (status) {
|
||||
dev_dbg(&pdev->dev, "request_irq failed\n");
|
||||
goto fail2;
|
||||
goto fail0;
|
||||
}
|
||||
|
||||
mcfqspi->clk = clk_get(&pdev->dev, "qspi_clk");
|
||||
mcfqspi->clk = devm_clk_get(&pdev->dev, "qspi_clk");
|
||||
if (IS_ERR(mcfqspi->clk)) {
|
||||
dev_dbg(&pdev->dev, "clk_get failed\n");
|
||||
status = PTR_ERR(mcfqspi->clk);
|
||||
goto fail3;
|
||||
goto fail0;
|
||||
}
|
||||
clk_enable(mcfqspi->clk);
|
||||
|
||||
@@ -445,7 +432,7 @@ static int mcfqspi_probe(struct platform_device *pdev)
|
||||
status = mcfqspi_cs_setup(mcfqspi);
|
||||
if (status) {
|
||||
dev_dbg(&pdev->dev, "error initializing cs_control\n");
|
||||
goto fail4;
|
||||
goto fail1;
|
||||
}
|
||||
|
||||
init_waitqueue_head(&mcfqspi->waitq);
|
||||
@@ -459,10 +446,10 @@ static int mcfqspi_probe(struct platform_device *pdev)
|
||||
|
||||
platform_set_drvdata(pdev, master);
|
||||
|
||||
status = spi_register_master(master);
|
||||
status = devm_spi_register_master(&pdev->dev, master);
|
||||
if (status) {
|
||||
dev_dbg(&pdev->dev, "spi_register_master failed\n");
|
||||
goto fail5;
|
||||
goto fail2;
|
||||
}
|
||||
pm_runtime_enable(mcfqspi->dev);
|
||||
|
||||
@@ -470,17 +457,10 @@ static int mcfqspi_probe(struct platform_device *pdev)
|
||||
|
||||
return 0;
|
||||
|
||||
fail5:
|
||||
mcfqspi_cs_teardown(mcfqspi);
|
||||
fail4:
|
||||
clk_disable(mcfqspi->clk);
|
||||
clk_put(mcfqspi->clk);
|
||||
fail3:
|
||||
free_irq(mcfqspi->irq, mcfqspi);
|
||||
fail2:
|
||||
iounmap(mcfqspi->iobase);
|
||||
mcfqspi_cs_teardown(mcfqspi);
|
||||
fail1:
|
||||
release_mem_region(res->start, resource_size(res));
|
||||
clk_disable(mcfqspi->clk);
|
||||
fail0:
|
||||
spi_master_put(master);
|
||||
|
||||
@@ -501,11 +481,6 @@ static int mcfqspi_remove(struct platform_device *pdev)
|
||||
|
||||
mcfqspi_cs_teardown(mcfqspi);
|
||||
clk_disable(mcfqspi->clk);
|
||||
clk_put(mcfqspi->clk);
|
||||
free_irq(mcfqspi->irq, mcfqspi);
|
||||
iounmap(mcfqspi->iobase);
|
||||
release_mem_region(res->start, resource_size(res));
|
||||
spi_unregister_master(master);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -396,10 +396,6 @@ static int davinci_spi_setup(struct spi_device *spi)
|
||||
dspi = spi_master_get_devdata(spi->master);
|
||||
pdata = &dspi->pdata;
|
||||
|
||||
/* if bits per word length is zero then set it default 8 */
|
||||
if (!spi->bits_per_word)
|
||||
spi->bits_per_word = 8;
|
||||
|
||||
if (!(spi->mode & SPI_NO_CS)) {
|
||||
if ((pdata->chip_sel == NULL) ||
|
||||
(pdata->chip_sel[spi->chip_select] == SPI_INTERN_CS))
|
||||
@@ -853,7 +849,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
|
||||
struct spi_master *master;
|
||||
struct davinci_spi *dspi;
|
||||
struct davinci_spi_platform_data *pdata;
|
||||
struct resource *r, *mem;
|
||||
struct resource *r;
|
||||
resource_size_t dma_rx_chan = SPI_NO_RESOURCE;
|
||||
resource_size_t dma_tx_chan = SPI_NO_RESOURCE;
|
||||
int i = 0, ret = 0;
|
||||
@@ -894,39 +890,33 @@ static int davinci_spi_probe(struct platform_device *pdev)
|
||||
|
||||
dspi->pbase = r->start;
|
||||
|
||||
mem = request_mem_region(r->start, resource_size(r), pdev->name);
|
||||
if (mem == NULL) {
|
||||
ret = -EBUSY;
|
||||
dspi->base = devm_ioremap_resource(&pdev->dev, r);
|
||||
if (IS_ERR(dspi->base)) {
|
||||
ret = PTR_ERR(dspi->base);
|
||||
goto free_master;
|
||||
}
|
||||
|
||||
dspi->base = ioremap(r->start, resource_size(r));
|
||||
if (dspi->base == NULL) {
|
||||
ret = -ENOMEM;
|
||||
goto release_region;
|
||||
}
|
||||
|
||||
dspi->irq = platform_get_irq(pdev, 0);
|
||||
if (dspi->irq <= 0) {
|
||||
ret = -EINVAL;
|
||||
goto unmap_io;
|
||||
goto free_master;
|
||||
}
|
||||
|
||||
ret = request_threaded_irq(dspi->irq, davinci_spi_irq, dummy_thread_fn,
|
||||
0, dev_name(&pdev->dev), dspi);
|
||||
ret = devm_request_threaded_irq(&pdev->dev, dspi->irq, davinci_spi_irq,
|
||||
dummy_thread_fn, 0, dev_name(&pdev->dev), dspi);
|
||||
if (ret)
|
||||
goto unmap_io;
|
||||
goto free_master;
|
||||
|
||||
dspi->bitbang.master = master;
|
||||
if (dspi->bitbang.master == NULL) {
|
||||
ret = -ENODEV;
|
||||
goto irq_free;
|
||||
goto free_master;
|
||||
}
|
||||
|
||||
dspi->clk = clk_get(&pdev->dev, NULL);
|
||||
dspi->clk = devm_clk_get(&pdev->dev, NULL);
|
||||
if (IS_ERR(dspi->clk)) {
|
||||
ret = -ENODEV;
|
||||
goto irq_free;
|
||||
goto free_master;
|
||||
}
|
||||
clk_prepare_enable(dspi->clk);
|
||||
|
||||
@@ -963,8 +953,8 @@ static int davinci_spi_probe(struct platform_device *pdev)
|
||||
goto free_clk;
|
||||
|
||||
dev_info(&pdev->dev, "DMA: supported\n");
|
||||
dev_info(&pdev->dev, "DMA: RX channel: %d, TX channel: %d, "
|
||||
"event queue: %d\n", dma_rx_chan, dma_tx_chan,
|
||||
dev_info(&pdev->dev, "DMA: RX channel: %pa, TX channel: %pa, "
|
||||
"event queue: %d\n", &dma_rx_chan, &dma_tx_chan,
|
||||
pdata->dma_event_q);
|
||||
}
|
||||
|
||||
@@ -1015,13 +1005,6 @@ free_dma:
|
||||
dma_release_channel(dspi->dma_tx);
|
||||
free_clk:
|
||||
clk_disable_unprepare(dspi->clk);
|
||||
clk_put(dspi->clk);
|
||||
irq_free:
|
||||
free_irq(dspi->irq, dspi);
|
||||
unmap_io:
|
||||
iounmap(dspi->base);
|
||||
release_region:
|
||||
release_mem_region(dspi->pbase, resource_size(r));
|
||||
free_master:
|
||||
spi_master_put(master);
|
||||
err:
|
||||
@@ -1041,7 +1024,6 @@ static int davinci_spi_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct davinci_spi *dspi;
|
||||
struct spi_master *master;
|
||||
struct resource *r;
|
||||
|
||||
master = platform_get_drvdata(pdev);
|
||||
dspi = spi_master_get_devdata(master);
|
||||
@@ -1049,11 +1031,6 @@ static int davinci_spi_remove(struct platform_device *pdev)
|
||||
spi_bitbang_stop(&dspi->bitbang);
|
||||
|
||||
clk_disable_unprepare(dspi->clk);
|
||||
clk_put(dspi->clk);
|
||||
free_irq(dspi->irq, dspi);
|
||||
iounmap(dspi->base);
|
||||
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
release_mem_region(dspi->pbase, resource_size(r));
|
||||
spi_master_put(master);
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -30,14 +30,13 @@ static int dw_spi_mmio_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct dw_spi_mmio *dwsmmio;
|
||||
struct dw_spi *dws;
|
||||
struct resource *mem, *ioarea;
|
||||
struct resource *mem;
|
||||
int ret;
|
||||
|
||||
dwsmmio = kzalloc(sizeof(struct dw_spi_mmio), GFP_KERNEL);
|
||||
if (!dwsmmio) {
|
||||
ret = -ENOMEM;
|
||||
goto err_end;
|
||||
}
|
||||
dwsmmio = devm_kzalloc(&pdev->dev, sizeof(struct dw_spi_mmio),
|
||||
GFP_KERNEL);
|
||||
if (!dwsmmio)
|
||||
return -ENOMEM;
|
||||
|
||||
dws = &dwsmmio->dws;
|
||||
|
||||
@@ -45,80 +44,51 @@ static int dw_spi_mmio_probe(struct platform_device *pdev)
|
||||
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!mem) {
|
||||
dev_err(&pdev->dev, "no mem resource?\n");
|
||||
ret = -EINVAL;
|
||||
goto err_kfree;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ioarea = request_mem_region(mem->start, resource_size(mem),
|
||||
pdev->name);
|
||||
if (!ioarea) {
|
||||
dev_err(&pdev->dev, "SPI region already claimed\n");
|
||||
ret = -EBUSY;
|
||||
goto err_kfree;
|
||||
}
|
||||
|
||||
dws->regs = ioremap_nocache(mem->start, resource_size(mem));
|
||||
if (!dws->regs) {
|
||||
dev_err(&pdev->dev, "SPI region already mapped\n");
|
||||
ret = -ENOMEM;
|
||||
goto err_release_reg;
|
||||
dws->regs = devm_ioremap_resource(&pdev->dev, mem);
|
||||
if (IS_ERR(dws->regs)) {
|
||||
dev_err(&pdev->dev, "SPI region map failed\n");
|
||||
return PTR_ERR(dws->regs);
|
||||
}
|
||||
|
||||
dws->irq = platform_get_irq(pdev, 0);
|
||||
if (dws->irq < 0) {
|
||||
dev_err(&pdev->dev, "no irq resource?\n");
|
||||
ret = dws->irq; /* -ENXIO */
|
||||
goto err_unmap;
|
||||
return dws->irq; /* -ENXIO */
|
||||
}
|
||||
|
||||
dwsmmio->clk = clk_get(&pdev->dev, NULL);
|
||||
if (IS_ERR(dwsmmio->clk)) {
|
||||
ret = PTR_ERR(dwsmmio->clk);
|
||||
goto err_unmap;
|
||||
}
|
||||
clk_enable(dwsmmio->clk);
|
||||
dwsmmio->clk = devm_clk_get(&pdev->dev, NULL);
|
||||
if (IS_ERR(dwsmmio->clk))
|
||||
return PTR_ERR(dwsmmio->clk);
|
||||
ret = clk_prepare_enable(dwsmmio->clk);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
dws->parent_dev = &pdev->dev;
|
||||
dws->bus_num = 0;
|
||||
dws->num_cs = 4;
|
||||
dws->max_freq = clk_get_rate(dwsmmio->clk);
|
||||
|
||||
ret = dw_spi_add_host(dws);
|
||||
ret = dw_spi_add_host(&pdev->dev, dws);
|
||||
if (ret)
|
||||
goto err_clk;
|
||||
goto out;
|
||||
|
||||
platform_set_drvdata(pdev, dwsmmio);
|
||||
return 0;
|
||||
|
||||
err_clk:
|
||||
clk_disable(dwsmmio->clk);
|
||||
clk_put(dwsmmio->clk);
|
||||
dwsmmio->clk = NULL;
|
||||
err_unmap:
|
||||
iounmap(dws->regs);
|
||||
err_release_reg:
|
||||
release_mem_region(mem->start, resource_size(mem));
|
||||
err_kfree:
|
||||
kfree(dwsmmio);
|
||||
err_end:
|
||||
out:
|
||||
clk_disable_unprepare(dwsmmio->clk);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int dw_spi_mmio_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct dw_spi_mmio *dwsmmio = platform_get_drvdata(pdev);
|
||||
struct resource *mem;
|
||||
|
||||
clk_disable(dwsmmio->clk);
|
||||
clk_put(dwsmmio->clk);
|
||||
dwsmmio->clk = NULL;
|
||||
|
||||
clk_disable_unprepare(dwsmmio->clk);
|
||||
dw_spi_remove_host(&dwsmmio->dws);
|
||||
iounmap(dwsmmio->dws.regs);
|
||||
kfree(dwsmmio);
|
||||
|
||||
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
release_mem_region(mem->start, resource_size(mem));
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -43,35 +43,25 @@ static int spi_pci_probe(struct pci_dev *pdev,
|
||||
dev_info(&pdev->dev, "found PCI SPI controller(ID: %04x:%04x)\n",
|
||||
pdev->vendor, pdev->device);
|
||||
|
||||
ret = pci_enable_device(pdev);
|
||||
ret = pcim_enable_device(pdev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
dwpci = kzalloc(sizeof(struct dw_spi_pci), GFP_KERNEL);
|
||||
if (!dwpci) {
|
||||
ret = -ENOMEM;
|
||||
goto err_disable;
|
||||
}
|
||||
dwpci = devm_kzalloc(&pdev->dev, sizeof(struct dw_spi_pci),
|
||||
GFP_KERNEL);
|
||||
if (!dwpci)
|
||||
return -ENOMEM;
|
||||
|
||||
dwpci->pdev = pdev;
|
||||
dws = &dwpci->dws;
|
||||
|
||||
/* Get basic io resource and map it */
|
||||
dws->paddr = pci_resource_start(pdev, pci_bar);
|
||||
dws->iolen = pci_resource_len(pdev, pci_bar);
|
||||
|
||||
ret = pci_request_region(pdev, pci_bar, dev_name(&pdev->dev));
|
||||
ret = pcim_iomap_regions(pdev, 1, dev_name(&pdev->dev));
|
||||
if (ret)
|
||||
goto err_kfree;
|
||||
return ret;
|
||||
|
||||
dws->regs = ioremap_nocache((unsigned long)dws->paddr,
|
||||
pci_resource_len(pdev, pci_bar));
|
||||
if (!dws->regs) {
|
||||
ret = -ENOMEM;
|
||||
goto err_release_reg;
|
||||
}
|
||||
|
||||
dws->parent_dev = &pdev->dev;
|
||||
dws->bus_num = 0;
|
||||
dws->num_cs = 4;
|
||||
dws->irq = pdev->irq;
|
||||
@@ -83,26 +73,17 @@ static int spi_pci_probe(struct pci_dev *pdev,
|
||||
if (pdev->device == 0x0800) {
|
||||
ret = dw_spi_mid_init(dws);
|
||||
if (ret)
|
||||
goto err_unmap;
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = dw_spi_add_host(dws);
|
||||
ret = dw_spi_add_host(&pdev->dev, dws);
|
||||
if (ret)
|
||||
goto err_unmap;
|
||||
return ret;
|
||||
|
||||
/* PCI hook and SPI hook use the same drv data */
|
||||
pci_set_drvdata(pdev, dwpci);
|
||||
return 0;
|
||||
|
||||
err_unmap:
|
||||
iounmap(dws->regs);
|
||||
err_release_reg:
|
||||
pci_release_region(pdev, pci_bar);
|
||||
err_kfree:
|
||||
kfree(dwpci);
|
||||
err_disable:
|
||||
pci_disable_device(pdev);
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void spi_pci_remove(struct pci_dev *pdev)
|
||||
@@ -110,10 +91,6 @@ static void spi_pci_remove(struct pci_dev *pdev)
|
||||
struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
|
||||
|
||||
dw_spi_remove_host(&dwpci->dws);
|
||||
iounmap(dwpci->dws.regs);
|
||||
pci_release_region(pdev, 0);
|
||||
kfree(dwpci);
|
||||
pci_disable_device(pdev);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
@@ -427,7 +427,6 @@ static void pump_transfers(unsigned long data)
|
||||
dws->tx_end = dws->tx + transfer->len;
|
||||
dws->rx = transfer->rx_buf;
|
||||
dws->rx_end = dws->rx + transfer->len;
|
||||
dws->cs_change = transfer->cs_change;
|
||||
dws->len = dws->cur_transfer->len;
|
||||
if (chip != dws->prev_chip)
|
||||
cs_change = 1;
|
||||
@@ -620,9 +619,11 @@ static int dw_spi_setup(struct spi_device *spi)
|
||||
/* Only alloc on first setup */
|
||||
chip = spi_get_ctldata(spi);
|
||||
if (!chip) {
|
||||
chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL);
|
||||
chip = devm_kzalloc(&spi->dev, sizeof(struct chip_data),
|
||||
GFP_KERNEL);
|
||||
if (!chip)
|
||||
return -ENOMEM;
|
||||
spi_set_ctldata(spi, chip);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -667,7 +668,6 @@ static int dw_spi_setup(struct spi_device *spi)
|
||||
| (spi->mode << SPI_MODE_OFFSET)
|
||||
| (chip->tmode << SPI_TMOD_OFFSET);
|
||||
|
||||
spi_set_ctldata(spi, chip);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -776,18 +776,16 @@ static void spi_hw_init(struct dw_spi *dws)
|
||||
}
|
||||
}
|
||||
|
||||
int dw_spi_add_host(struct dw_spi *dws)
|
||||
int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
|
||||
{
|
||||
struct spi_master *master;
|
||||
int ret;
|
||||
|
||||
BUG_ON(dws == NULL);
|
||||
|
||||
master = spi_alloc_master(dws->parent_dev, 0);
|
||||
if (!master) {
|
||||
ret = -ENOMEM;
|
||||
goto exit;
|
||||
}
|
||||
master = spi_alloc_master(dev, 0);
|
||||
if (!master)
|
||||
return -ENOMEM;
|
||||
|
||||
dws->master = master;
|
||||
dws->type = SSI_MOTO_SPI;
|
||||
@@ -797,7 +795,7 @@ int dw_spi_add_host(struct dw_spi *dws)
|
||||
snprintf(dws->name, sizeof(dws->name), "dw_spi%d",
|
||||
dws->bus_num);
|
||||
|
||||
ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED,
|
||||
ret = devm_request_irq(dev, dws->irq, dw_spi_irq, IRQF_SHARED,
|
||||
dws->name, dws);
|
||||
if (ret < 0) {
|
||||
dev_err(&master->dev, "can not get IRQ\n");
|
||||
@@ -836,7 +834,7 @@ int dw_spi_add_host(struct dw_spi *dws)
|
||||
}
|
||||
|
||||
spi_master_set_devdata(master, dws);
|
||||
ret = spi_register_master(master);
|
||||
ret = devm_spi_register_master(dev, master);
|
||||
if (ret) {
|
||||
dev_err(&master->dev, "problem registering spi master\n");
|
||||
goto err_queue_alloc;
|
||||
@@ -851,10 +849,8 @@ err_queue_alloc:
|
||||
dws->dma_ops->dma_exit(dws);
|
||||
err_diable_hw:
|
||||
spi_enable_chip(dws, 0);
|
||||
free_irq(dws->irq, dws);
|
||||
err_free_master:
|
||||
spi_master_put(master);
|
||||
exit:
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(dw_spi_add_host);
|
||||
@@ -878,10 +874,6 @@ void dw_spi_remove_host(struct dw_spi *dws)
|
||||
spi_enable_chip(dws, 0);
|
||||
/* Disable clk */
|
||||
spi_set_clk(dws, 0);
|
||||
free_irq(dws->irq, dws);
|
||||
|
||||
/* Disconnect from the SPI framework */
|
||||
spi_unregister_master(dws->master);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(dw_spi_remove_host);
|
||||
|
||||
|
||||
@@ -92,13 +92,11 @@ struct dw_spi_dma_ops {
|
||||
struct dw_spi {
|
||||
struct spi_master *master;
|
||||
struct spi_device *cur_dev;
|
||||
struct device *parent_dev;
|
||||
enum dw_ssi_type type;
|
||||
char name[16];
|
||||
|
||||
void __iomem *regs;
|
||||
unsigned long paddr;
|
||||
u32 iolen;
|
||||
int irq;
|
||||
u32 fifo_len; /* depth of the FIFO buffer */
|
||||
u32 max_freq; /* max bus freq supported */
|
||||
@@ -135,7 +133,6 @@ struct dw_spi {
|
||||
u8 n_bytes; /* current is a 1/2 bytes op */
|
||||
u8 max_bits_per_word; /* maxim is 16b */
|
||||
u32 dma_width;
|
||||
int cs_change;
|
||||
irqreturn_t (*transfer_handler)(struct dw_spi *dws);
|
||||
void (*cs_control)(u32 command);
|
||||
|
||||
@@ -231,7 +228,7 @@ struct dw_spi_chip {
|
||||
void (*cs_control)(u32 command);
|
||||
};
|
||||
|
||||
extern int dw_spi_add_host(struct dw_spi *dws);
|
||||
extern int dw_spi_add_host(struct device *dev, struct dw_spi *dws);
|
||||
extern void dw_spi_remove_host(struct dw_spi *dws);
|
||||
extern int dw_spi_suspend_host(struct dw_spi *dws);
|
||||
extern int dw_spi_resume_host(struct dw_spi *dws);
|
||||
|
||||
@@ -433,21 +433,12 @@ static int falcon_sflash_probe(struct platform_device *pdev)
|
||||
|
||||
platform_set_drvdata(pdev, priv);
|
||||
|
||||
ret = spi_register_master(master);
|
||||
ret = devm_spi_register_master(&pdev->dev, master);
|
||||
if (ret)
|
||||
spi_master_put(master);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int falcon_sflash_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct falcon_sflash *priv = platform_get_drvdata(pdev);
|
||||
|
||||
spi_unregister_master(priv->master);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id falcon_sflash_match[] = {
|
||||
{ .compatible = "lantiq,sflash-falcon" },
|
||||
{},
|
||||
@@ -456,7 +447,6 @@ MODULE_DEVICE_TABLE(of, falcon_sflash_match);
|
||||
|
||||
static struct platform_driver falcon_sflash_driver = {
|
||||
.probe = falcon_sflash_probe,
|
||||
.remove = falcon_sflash_remove,
|
||||
.driver = {
|
||||
.name = DRV_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
|
||||
@@ -375,9 +375,6 @@ static int dspi_setup(struct spi_device *spi)
|
||||
if (!spi->max_speed_hz)
|
||||
return -EINVAL;
|
||||
|
||||
if (!spi->bits_per_word)
|
||||
spi->bits_per_word = 8;
|
||||
|
||||
return dspi_setup_transfer(spi, NULL);
|
||||
}
|
||||
|
||||
|
||||
@@ -111,14 +111,6 @@ static int mxs_spi_setup_transfer(struct spi_device *dev,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mxs_spi_setup(struct spi_device *dev)
|
||||
{
|
||||
if (!dev->bits_per_word)
|
||||
dev->bits_per_word = 8;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static u32 mxs_spi_cs_to_reg(unsigned cs)
|
||||
{
|
||||
u32 select = 0;
|
||||
@@ -502,7 +494,6 @@ static int mxs_spi_probe(struct platform_device *pdev)
|
||||
return -ENOMEM;
|
||||
|
||||
master->transfer_one_message = mxs_spi_transfer_one;
|
||||
master->setup = mxs_spi_setup;
|
||||
master->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
master->mode_bits = SPI_CPOL | SPI_CPHA;
|
||||
master->num_chipselect = 3;
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -254,9 +254,6 @@ error:
|
||||
|
||||
static int sc18is602_setup(struct spi_device *spi)
|
||||
{
|
||||
if (!spi->bits_per_word)
|
||||
spi->bits_per_word = 8;
|
||||
|
||||
if (spi->mode & ~(SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST))
|
||||
return -EINVAL;
|
||||
|
||||
@@ -319,7 +316,7 @@ static int sc18is602_probe(struct i2c_client *client,
|
||||
master->transfer_one_message = sc18is602_transfer_one;
|
||||
master->dev.of_node = np;
|
||||
|
||||
error = spi_register_master(master);
|
||||
error = devm_spi_register_master(dev, master);
|
||||
if (error)
|
||||
goto error_reg;
|
||||
|
||||
@@ -330,16 +327,6 @@ error_reg:
|
||||
return error;
|
||||
}
|
||||
|
||||
static int sc18is602_remove(struct i2c_client *client)
|
||||
{
|
||||
struct sc18is602 *hw = i2c_get_clientdata(client);
|
||||
struct spi_master *master = hw->master;
|
||||
|
||||
spi_unregister_master(master);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct i2c_device_id sc18is602_id[] = {
|
||||
{ "sc18is602", sc18is602 },
|
||||
{ "sc18is602b", sc18is602b },
|
||||
@@ -353,7 +340,6 @@ static struct i2c_driver sc18is602_driver = {
|
||||
.name = "sc18is602",
|
||||
},
|
||||
.probe = sc18is602_probe,
|
||||
.remove = sc18is602_remove,
|
||||
.id_table = sc18is602_id,
|
||||
};
|
||||
|
||||
|
||||
@@ -358,9 +358,6 @@ static int spi_sh_setup(struct spi_device *spi)
|
||||
{
|
||||
struct spi_sh_data *ss = spi_master_get_devdata(spi->master);
|
||||
|
||||
if (!spi->bits_per_word)
|
||||
spi->bits_per_word = 8;
|
||||
|
||||
pr_debug("%s: enter\n", __func__);
|
||||
|
||||
spi_sh_write(ss, 0xfe, SPI_SH_CR1); /* SPI sycle stop */
|
||||
|
||||
@@ -536,16 +536,9 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
|
||||
|
||||
static int spi_sirfsoc_setup(struct spi_device *spi)
|
||||
{
|
||||
struct sirfsoc_spi *sspi;
|
||||
|
||||
if (!spi->max_speed_hz)
|
||||
return -EINVAL;
|
||||
|
||||
sspi = spi_master_get_devdata(spi->master);
|
||||
|
||||
if (!spi->bits_per_word)
|
||||
spi->bits_per_word = 8;
|
||||
|
||||
return spi_sirfsoc_setup_transfer(spi, NULL);
|
||||
}
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user