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https://github.com/Dasharo/linux.git
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Merge tag 'net-next-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next
Pull networking updates from Jakub Kicinski:
"Core & protocols:
- Complete rework of garbage collection of AF_UNIX sockets.
AF_UNIX is prone to forming reference count cycles due to fd
passing functionality. New method based on Tarjan's Strongly
Connected Components algorithm should be both faster and remove a
lot of workarounds we accumulated over the years.
- Add TCP fraglist GRO support, allowing chaining multiple TCP
packets and forwarding them together. Useful for small switches /
routers which lack basic checksum offload in some scenarios (e.g.
PPPoE).
- Support using SMP threads for handling packet backlog i.e. packet
processing from software interfaces and old drivers which don't use
NAPI. This helps move the processing out of the softirq jumble.
- Continue work of converting from rtnl lock to RCU protection.
Don't require rtnl lock when reading: IPv6 routing FIB, IPv6
address labels, netdev threaded NAPI sysfs files, bonding driver's
sysfs files, MPLS devconf, IPv4 FIB rules, netns IDs, tcp metrics,
TC Qdiscs, neighbor entries, ARP entries via ioctl(SIOCGARP), a lot
of the link information available via rtnetlink.
- Small optimizations from Eric to UDP wake up handling, memory
accounting, RPS/RFS implementation, TCP packet sizing etc.
- Allow direct page recycling in the bulk API used by XDP, for +2%
PPS.
- Support peek with an offset on TCP sockets.
- Add MPTCP APIs for querying last time packets were received/sent/acked
and whether MPTCP "upgrade" succeeded on a TCP socket.
- Add intra-node communication shortcut to improve SMC performance.
- Add IPv6 (and IPv{4,6}-over-IPv{4,6}) support to the GTP protocol
driver.
- Add HSR-SAN (RedBOX) mode of operation to the HSR protocol driver.
- Add reset reasons for tracing what caused a TCP reset to be sent.
- Introduce direction attribute for xfrm (IPSec) states. State can be
used either for input or output packet processing.
Things we sprinkled into general kernel code:
- Add bitmap_{read,write}(), bitmap_size(), expose BYTES_TO_BITS().
This required touch-ups and renaming of a few existing users.
- Add Endian-dependent __counted_by_{le,be} annotations.
- Make building selftests "quieter" by printing summaries like
"CC object.o" rather than full commands with all the arguments.
Netfilter:
- Use GFP_KERNEL to clone elements, to deal better with OOM
situations and avoid failures in the .commit step.
BPF:
- Add eBPF JIT for ARCv2 CPUs.
- Support attaching kprobe BPF programs through kprobe_multi link in
a session mode, meaning, a BPF program is attached to both function
entry and return, the entry program can decide if the return
program gets executed and the entry program can share u64 cookie
value with return program. "Session mode" is a common use-case for
tetragon and bpftrace.
- Add the ability to specify and retrieve BPF cookie for raw
tracepoint programs in order to ease migration from classic to raw
tracepoints.
- Add an internal-only BPF per-CPU instruction for resolving per-CPU
memory addresses and implement support in x86, ARM64 and RISC-V
JITs. This allows inlining functions which need to access per-CPU
state.
- Optimize x86 BPF JIT's emit_mov_imm64, and add support for various
atomics in bpf_arena which can be JITed as a single x86
instruction. Support BPF arena on ARM64.
- Add a new bpf_wq API for deferring events and refactor
process-context bpf_timer code to keep common code where possible.
- Harden the BPF verifier's and/or/xor value tracking.
- Introduce crypto kfuncs to let BPF programs call kernel crypto
APIs.
- Support bpf_tail_call_static() helper for BPF programs with GCC 13.
- Add bpf_preempt_{disable,enable}() kfuncs in order to allow a BPF
program to have code sections where preemption is disabled.
Driver API:
- Skip software TC processing completely if all installed rules are
marked as HW-only, instead of checking the HW-only flag rule by
rule.
- Add support for configuring PoE (Power over Ethernet), similar to
the already existing support for PoDL (Power over Data Line)
config.
- Initial bits of a queue control API, for now allowing a single
queue to be reset without disturbing packet flow to other queues.
- Common (ethtool) statistics for hardware timestamping.
Tests and tooling:
- Remove the need to create a config file to run the net forwarding
tests so that a naive "make run_tests" can exercise them.
- Define a method of writing tests which require an external endpoint
to communicate with (to send/receive data towards the test
machine). Add a few such tests.
- Create a shared code library for writing Python tests. Expose the
YAML Netlink library from tools/ to the tests for easy Netlink
access.
- Move netfilter tests under net/, extend them, separate performance
tests from correctness tests, and iron out issues found by running
them "on every commit".
- Refactor BPF selftests to use common network helpers.
- Further work filling in YAML definitions of Netlink messages for:
nftables, team driver, bonding interfaces, vlan interfaces, VF
info, TC u32 mark, TC police action.
- Teach Python YAML Netlink to decode attribute policies.
- Extend the definition of the "indexed array" construct in the specs
to cover arrays of scalars rather than just nests.
- Add hyperlinks between definitions in generated Netlink docs.
Drivers:
- Make sure unsupported flower control flags are rejected by drivers,
and make more drivers report errors directly to the application
rather than dmesg (large number of driver changes from Asbjørn
Sloth Tønnesen).
- Ethernet high-speed NICs:
- Broadcom (bnxt):
- support multiple RSS contexts and steering traffic to them
- support XDP metadata
- make page pool allocations more NUMA aware
- Intel (100G, ice, idpf):
- extract datapath code common among Intel drivers into a library
- use fewer resources in switchdev by sharing queues with the PF
- add PFCP filter support
- add Ethernet filter support
- use a spinlock instead of HW lock in PTP clock ops
- support 5 layer Tx scheduler topology
- nVidia/Mellanox:
- 800G link modes and 100G SerDes speeds
- per-queue IRQ coalescing configuration
- Marvell Octeon:
- support offloading TC packet mark action
- Ethernet NICs consumer, embedded and virtual:
- stop lying about skb->truesize in USB Ethernet drivers, it
messes up TCP memory calculations
- Google cloud vNIC:
- support changing ring size via ethtool
- support ring reset using the queue control API
- VirtIO net:
- expose flow hash from RSS to XDP
- per-queue statistics
- add selftests
- Synopsys (stmmac):
- support controllers which require an RX clock signal from the
MII bus to perform their hardware initialization
- TI:
- icssg_prueth: support ICSSG-based Ethernet on AM65x SR1.0 devices
- icssg_prueth: add SW TX / RX Coalescing based on hrtimers
- cpsw: minimal XDP support
- Renesas (ravb):
- support describing the MDIO bus
- Realtek (r8169):
- add support for RTL8168M
- Microchip Sparx5:
- matchall and flower actions mirred and redirect
- Ethernet switches:
- nVidia/Mellanox:
- improve events processing performance
- Marvell:
- add support for MV88E6250 family internal PHYs
- Microchip:
- add DCB and DSCP mapping support for KSZ switches
- vsc73xx: convert to PHYLINK
- Realtek:
- rtl8226b/rtl8221b: add C45 instances and SerDes switching
- Many driver changes related to PHYLIB and PHYLINK deprecated API
cleanup
- Ethernet PHYs:
- Add a new driver for Airoha EN8811H 2.5 Gigabit PHY.
- micrel: lan8814: add support for PPS out and external timestamp trigger
- WiFi:
- Disable Wireless Extensions (WEXT) in all Wi-Fi 7 devices
drivers. Modern devices can only be configured using nl80211.
- mac80211/cfg80211
- handle color change per link for WiFi 7 Multi-Link Operation
- Intel (iwlwifi):
- don't support puncturing in 5 GHz
- support monitor mode on passive channels
- BZ-W device support
- P2P with HE/EHT support
- re-add support for firmware API 90
- provide channel survey information for Automatic Channel Selection
- MediaTek (mt76):
- mt7921 LED control
- mt7925 EHT radiotap support
- mt7920e PCI support
- Qualcomm (ath11k):
- P2P support for QCA6390, WCN6855 and QCA2066
- support hibernation
- ieee80211-freq-limit Device Tree property support
- Qualcomm (ath12k):
- refactoring in preparation of multi-link support
- suspend and hibernation support
- ACPI support
- debugfs support, including dfs_simulate_radar support
- RealTek:
- rtw88: RTL8723CS SDIO device support
- rtw89: RTL8922AE Wi-Fi 7 PCI device support
- rtw89: complete features of new WiFi 7 chip 8922AE including
BT-coexistence and Wake-on-WLAN
- rtw89: use BIOS ACPI settings to set TX power and channels
- rtl8xxxu: enable Management Frame Protection (MFP) support
- Bluetooth:
- support for Intel BlazarI and Filmore Peak2 (BE201)
- support for MediaTek MT7921S SDIO
- initial support for Intel PCIe BT driver
- remove HCI_AMP support"
* tag 'net-next-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1827 commits)
selftests: netfilter: fix packetdrill conntrack testcase
net: gro: fix napi_gro_cb zeroed alignment
Bluetooth: btintel_pcie: Refactor and code cleanup
Bluetooth: btintel_pcie: Fix warning reported by sparse
Bluetooth: hci_core: Fix not handling hdev->le_num_of_adv_sets=1
Bluetooth: btintel: Fix compiler warning for multi_v7_defconfig config
Bluetooth: btintel_pcie: Fix compiler warnings
Bluetooth: btintel_pcie: Add *setup* function to download firmware
Bluetooth: btintel_pcie: Add support for PCIe transport
Bluetooth: btintel: Export few static functions
Bluetooth: HCI: Remove HCI_AMP support
Bluetooth: L2CAP: Fix div-by-zero in l2cap_le_flowctl_init()
Bluetooth: qca: Fix error code in qca_read_fw_build_info()
Bluetooth: hci_conn: Use __counted_by() and avoid -Wfamnae warning
Bluetooth: btintel: Add support for Filmore Peak2 (BE201)
Bluetooth: btintel: Add support for BlazarI
LE Create Connection command timeout increased to 20 secs
dt-bindings: net: bluetooth: Add MediaTek MT7921S SDIO Bluetooth
Bluetooth: compute LE flow credits based on recvbuf space
Bluetooth: hci_sync: Use cmd->num_cis instead of magic number
...
This commit is contained in:
Linus Torvalds
@@ -72,6 +72,7 @@ two flavors of JITs, the newer eBPF JIT currently supported on:
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- riscv64
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- riscv32
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- loongarch64
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- arc
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And the older cBPF JIT supported on the following archs:
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@@ -5,7 +5,11 @@
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BPF Instruction Set Architecture (ISA)
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======================================
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This document specifies the BPF instruction set architecture (ISA).
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eBPF (which is no longer an acronym for anything), also commonly
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referred to as BPF, is a technology with origins in the Linux kernel
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that can run untrusted programs in a privileged context such as an
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operating system kernel. This document specifies the BPF instruction
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set architecture (ISA).
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Documentation conventions
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=========================
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@@ -43,7 +47,7 @@ a type's signedness (`S`) and bit width (`N`), respectively.
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===== =========
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For example, `u32` is a type whose valid values are all the 32-bit unsigned
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numbers and `s16` is a types whose valid values are all the 16-bit signed
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numbers and `s16` is a type whose valid values are all the 16-bit signed
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numbers.
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Functions
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@@ -108,7 +112,7 @@ conformance group means it must support all instructions in that conformance
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group.
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The use of named conformance groups enables interoperability between a runtime
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that executes instructions, and tools as such compilers that generate
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that executes instructions, and tools such as compilers that generate
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instructions for the runtime. Thus, capability discovery in terms of
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conformance groups might be done manually by users or automatically by tools.
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@@ -181,10 +185,13 @@ A basic instruction is encoded as follows::
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(`64-bit immediate instructions`_ reuse this field for other purposes)
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**dst_reg**
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destination register number (0-10)
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destination register number (0-10), unless otherwise specified
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(future instructions might reuse this field for other purposes)
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**offset**
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signed integer offset used with pointer arithmetic
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signed integer offset used with pointer arithmetic, except where
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otherwise specified (some arithmetic instructions reuse this field
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for other purposes)
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**imm**
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signed integer immediate value
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@@ -228,10 +235,12 @@ This is depicted in the following figure::
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operation to perform, encoded as explained above
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**regs**
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The source and destination register numbers, encoded as explained above
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The source and destination register numbers (unless otherwise
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specified), encoded as explained above
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**offset**
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signed integer offset used with pointer arithmetic
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signed integer offset used with pointer arithmetic, unless
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otherwise specified
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**imm**
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signed integer immediate value
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@@ -342,8 +351,8 @@ where '(u32)' indicates that the upper 32 bits are zeroed.
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dst = dst ^ imm
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Note that most instructions have instruction offset of 0. Only three instructions
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(``SDIV``, ``SMOD``, ``MOVSX``) have a non-zero offset.
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Note that most arithmetic instructions have 'offset' set to 0. Only three instructions
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(``SDIV``, ``SMOD``, ``MOVSX``) have a non-zero 'offset'.
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Division, multiplication, and modulo operations for ``ALU`` are part
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of the "divmul32" conformance group, and division, multiplication, and
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@@ -365,15 +374,15 @@ Note that there are varying definitions of the signed modulo operation
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when the dividend or divisor are negative, where implementations often
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vary by language such that Python, Ruby, etc. differ from C, Go, Java,
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etc. This specification requires that signed modulo use truncated division
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(where -13 % 3 == -1) as implemented in C, Go, etc.:
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(where -13 % 3 == -1) as implemented in C, Go, etc.::
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a % n = a - n * trunc(a / n)
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The ``MOVSX`` instruction does a move operation with sign extension.
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``{MOVSX, X, ALU}`` :term:`sign extends<Sign Extend>` 8-bit and 16-bit operands into 32
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bit operands, and zeroes the remaining upper 32 bits.
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``{MOVSX, X, ALU}`` :term:`sign extends<Sign Extend>` 8-bit and 16-bit operands into
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32-bit operands, and zeroes the remaining upper 32 bits.
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``{MOVSX, X, ALU64}`` :term:`sign extends<Sign Extend>` 8-bit, 16-bit, and 32-bit
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operands into 64 bit operands. Unlike other arithmetic instructions,
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operands into 64-bit operands. Unlike other arithmetic instructions,
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``MOVSX`` is only defined for register source operands (``X``).
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The ``NEG`` instruction is only defined when the source bit is clear
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@@ -411,19 +420,19 @@ conformance group.
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Examples:
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``{END, TO_LE, ALU}`` with imm = 16/32/64 means::
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``{END, TO_LE, ALU}`` with 'imm' = 16/32/64 means::
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dst = htole16(dst)
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dst = htole32(dst)
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dst = htole64(dst)
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``{END, TO_BE, ALU}`` with imm = 16/32/64 means::
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``{END, TO_BE, ALU}`` with 'imm' = 16/32/64 means::
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dst = htobe16(dst)
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dst = htobe32(dst)
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dst = htobe64(dst)
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``{END, TO_LE, ALU64}`` with imm = 16/32/64 means::
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``{END, TO_LE, ALU64}`` with 'imm' = 16/32/64 means::
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dst = bswap16(dst)
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dst = bswap32(dst)
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@@ -438,27 +447,33 @@ otherwise identical operations, and indicates the base64 conformance
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group unless otherwise specified.
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The 'code' field encodes the operation as below:
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======== ===== ======= =============================== ===================================================
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code value src_reg description notes
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======== ===== ======= =============================== ===================================================
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JA 0x0 0x0 PC += offset {JA, K, JMP} only
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JA 0x0 0x0 PC += imm {JA, K, JMP32} only
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======== ===== ======= ================================= ===================================================
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code value src_reg description notes
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======== ===== ======= ================================= ===================================================
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JA 0x0 0x0 PC += offset {JA, K, JMP} only
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JA 0x0 0x0 PC += imm {JA, K, JMP32} only
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JEQ 0x1 any PC += offset if dst == src
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JGT 0x2 any PC += offset if dst > src unsigned
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JGE 0x3 any PC += offset if dst >= src unsigned
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JGT 0x2 any PC += offset if dst > src unsigned
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JGE 0x3 any PC += offset if dst >= src unsigned
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JSET 0x4 any PC += offset if dst & src
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JNE 0x5 any PC += offset if dst != src
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JSGT 0x6 any PC += offset if dst > src signed
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JSGE 0x7 any PC += offset if dst >= src signed
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CALL 0x8 0x0 call helper function by address {CALL, K, JMP} only, see `Helper functions`_
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CALL 0x8 0x1 call PC += imm {CALL, K, JMP} only, see `Program-local functions`_
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CALL 0x8 0x2 call helper function by BTF ID {CALL, K, JMP} only, see `Helper functions`_
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EXIT 0x9 0x0 return {CALL, K, JMP} only
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JLT 0xa any PC += offset if dst < src unsigned
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JLE 0xb any PC += offset if dst <= src unsigned
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JSLT 0xc any PC += offset if dst < src signed
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JSLE 0xd any PC += offset if dst <= src signed
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======== ===== ======= =============================== ===================================================
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JSGT 0x6 any PC += offset if dst > src signed
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JSGE 0x7 any PC += offset if dst >= src signed
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CALL 0x8 0x0 call helper function by static ID {CALL, K, JMP} only, see `Helper functions`_
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CALL 0x8 0x1 call PC += imm {CALL, K, JMP} only, see `Program-local functions`_
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CALL 0x8 0x2 call helper function by BTF ID {CALL, K, JMP} only, see `Helper functions`_
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EXIT 0x9 0x0 return {CALL, K, JMP} only
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JLT 0xa any PC += offset if dst < src unsigned
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JLE 0xb any PC += offset if dst <= src unsigned
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JSLT 0xc any PC += offset if dst < src signed
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JSLE 0xd any PC += offset if dst <= src signed
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======== ===== ======= ================================= ===================================================
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where 'PC' denotes the program counter, and the offset to increment by
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is in units of 64-bit instructions relative to the instruction following
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the jump instruction. Thus 'PC += 1' skips execution of the next
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instruction if it's a basic instruction or results in undefined behavior
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if the next instruction is a 128-bit wide instruction.
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The BPF program needs to store the return value into register R0 before doing an
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``EXIT``.
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@@ -475,7 +490,7 @@ where 's>=' indicates a signed '>=' comparison.
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gotol +imm
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where 'imm' means the branch offset comes from insn 'imm' field.
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where 'imm' means the branch offset comes from the 'imm' field.
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Note that there are two flavors of ``JA`` instructions. The
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``JMP`` class permits a 16-bit jump offset specified by the 'offset'
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@@ -493,26 +508,26 @@ Helper functions
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Helper functions are a concept whereby BPF programs can call into a
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set of function calls exposed by the underlying platform.
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Historically, each helper function was identified by an address
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encoded in the imm field. The available helper functions may differ
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for each program type, but address values are unique across all program types.
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Historically, each helper function was identified by a static ID
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encoded in the 'imm' field. The available helper functions may differ
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for each program type, but static IDs are unique across all program types.
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Platforms that support the BPF Type Format (BTF) support identifying
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a helper function by a BTF ID encoded in the imm field, where the BTF ID
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a helper function by a BTF ID encoded in the 'imm' field, where the BTF ID
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identifies the helper name and type.
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Program-local functions
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~~~~~~~~~~~~~~~~~~~~~~~
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Program-local functions are functions exposed by the same BPF program as the
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caller, and are referenced by offset from the call instruction, similar to
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``JA``. The offset is encoded in the imm field of the call instruction.
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A ``EXIT`` within the program-local function will return to the caller.
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``JA``. The offset is encoded in the 'imm' field of the call instruction.
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An ``EXIT`` within the program-local function will return to the caller.
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Load and store instructions
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===========================
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For load and store instructions (``LD``, ``LDX``, ``ST``, and ``STX``), the
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8-bit 'opcode' field is divided as::
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8-bit 'opcode' field is divided as follows::
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+-+-+-+-+-+-+-+-+
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||||
|mode |sz |class|
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@@ -580,7 +595,7 @@ instructions that transfer data between a register and memory.
|
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dst = *(signed size *) (src + offset)
|
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Where size is one of: ``B``, ``H``, or ``W``, and
|
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Where '<size>' is one of: ``B``, ``H``, or ``W``, and
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'signed size' is one of: s8, s16, or s32.
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Atomic operations
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@@ -662,11 +677,11 @@ src_reg pseudocode imm type dst type
|
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======= ========================================= =========== ==============
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0x0 dst = (next_imm << 32) | imm integer integer
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0x1 dst = map_by_fd(imm) map fd map
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0x2 dst = map_val(map_by_fd(imm)) + next_imm map fd data pointer
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0x3 dst = var_addr(imm) variable id data pointer
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0x4 dst = code_addr(imm) integer code pointer
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0x2 dst = map_val(map_by_fd(imm)) + next_imm map fd data address
|
||||
0x3 dst = var_addr(imm) variable id data address
|
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0x4 dst = code_addr(imm) integer code address
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||||
0x5 dst = map_by_idx(imm) map index map
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0x6 dst = map_val(map_by_idx(imm)) + next_imm map index data pointer
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||||
0x6 dst = map_val(map_by_idx(imm)) + next_imm map index data address
|
||||
======= ========================================= =========== ==============
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||||
|
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where
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@@ -75,6 +75,8 @@ if major >= 3:
|
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"__rcu",
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"__user",
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"__force",
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"__counted_by_le",
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"__counted_by_be",
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|
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# include/linux/compiler_attributes.h:
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||||
"__alias",
|
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56
Documentation/devicetree/bindings/net/airoha,en8811h.yaml
Normal file
56
Documentation/devicetree/bindings/net/airoha,en8811h.yaml
Normal file
@@ -0,0 +1,56 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/airoha,en8811h.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Airoha EN8811H PHY
|
||||
|
||||
maintainers:
|
||||
- Eric Woudstra <ericwouds@gmail.com>
|
||||
|
||||
description:
|
||||
The Airoha EN8811H PHY has the ability to reverse polarity
|
||||
on the lines to and/or from the MAC. It is reversed by
|
||||
the booleans in the devicetree node of the phy.
|
||||
|
||||
allOf:
|
||||
- $ref: ethernet-phy.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- ethernet-phy-id03a2.a411
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
airoha,pnswap-rx:
|
||||
type: boolean
|
||||
description:
|
||||
Reverse rx polarity of the SERDES. This is the receiving
|
||||
side of the lines from the MAC towards the EN881H.
|
||||
|
||||
airoha,pnswap-tx:
|
||||
type: boolean
|
||||
description:
|
||||
Reverse tx polarity of SERDES. This is the transmitting
|
||||
side of the lines from EN8811H towards the MAC.
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-id03a2.a411";
|
||||
reg = <1>;
|
||||
airoha,pnswap-rx;
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,55 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/bluetooth/mediatek,mt7921s-bluetooth.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MediaTek MT7921S Bluetooth
|
||||
|
||||
maintainers:
|
||||
- Sean Wang <sean.wang@mediatek.com>
|
||||
|
||||
description:
|
||||
MT7921S is an SDIO-attached dual-radio WiFi+Bluetooth Combo chip; each
|
||||
function is its own SDIO function on a shared SDIO interface. The chip
|
||||
has two dedicated reset lines, one for each function core.
|
||||
This binding only covers the Bluetooth SDIO function, with one device
|
||||
node describing only this SDIO function.
|
||||
|
||||
allOf:
|
||||
- $ref: bluetooth-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- mediatek,mt7921s-bluetooth
|
||||
|
||||
reg:
|
||||
const: 2
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
description:
|
||||
An active-low reset line for the Bluetooth core; on typical M.2
|
||||
key E modules this is the W_DISABLE2# pin.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
mmc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
bluetooth@2 {
|
||||
compatible = "mediatek,mt7921s-bluetooth";
|
||||
reg = <2>;
|
||||
reset-gpios = <&pio 8 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
@@ -14,20 +14,25 @@ description:
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- brcm,bcm20702a1
|
||||
- brcm,bcm4329-bt
|
||||
- brcm,bcm4330-bt
|
||||
- brcm,bcm4334-bt
|
||||
- brcm,bcm43430a0-bt
|
||||
- brcm,bcm43430a1-bt
|
||||
- brcm,bcm43438-bt
|
||||
- brcm,bcm4345c5
|
||||
- brcm,bcm43540-bt
|
||||
- brcm,bcm4335a0
|
||||
- brcm,bcm4349-bt
|
||||
- cypress,cyw4373a0-bt
|
||||
- infineon,cyw55572-bt
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- infineon,cyw43439-bt
|
||||
- const: brcm,bcm4329-bt
|
||||
- enum:
|
||||
- brcm,bcm20702a1
|
||||
- brcm,bcm4329-bt
|
||||
- brcm,bcm4330-bt
|
||||
- brcm,bcm4334-bt
|
||||
- brcm,bcm43430a0-bt
|
||||
- brcm,bcm43430a1-bt
|
||||
- brcm,bcm43438-bt
|
||||
- brcm,bcm4345c5
|
||||
- brcm,bcm43540-bt
|
||||
- brcm,bcm4335a0
|
||||
- brcm,bcm4349-bt
|
||||
- cypress,cyw4373a0-bt
|
||||
- infineon,cyw55572-bt
|
||||
|
||||
shutdown-gpios:
|
||||
maxItems: 1
|
||||
|
||||
@@ -66,6 +66,10 @@ properties:
|
||||
Should be phandle/offset pair. The phandle to the syscon node which
|
||||
encompases the GPR register, and the offset of the GPR register.
|
||||
|
||||
nvmem-cells: true
|
||||
|
||||
nvmem-cell-names: true
|
||||
|
||||
snps,rmii_refclk_ext:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
|
||||
@@ -0,0 +1,169 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/pse-pd/microchip,pd692x0.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Microchip PD692x0 Power Sourcing Equipment controller
|
||||
|
||||
maintainers:
|
||||
- Kory Maincent <kory.maincent@bootlin.com>
|
||||
|
||||
allOf:
|
||||
- $ref: pse-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- microchip,pd69200
|
||||
- microchip,pd69210
|
||||
- microchip,pd69220
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
managers:
|
||||
type: object
|
||||
description:
|
||||
List of the PD69208T4/PD69204T4/PD69208M PSE managers. Each manager
|
||||
have 4 or 8 physical ports according to the chip version. No need to
|
||||
specify the SPI chip select as it is automatically detected by the
|
||||
PD692x0 PSE controller. The PSE managers have to be described from
|
||||
the lowest chip select to the greatest one, which is the detection
|
||||
behavior of the PD692x0 PSE controller. The PD692x0 support up to
|
||||
12 PSE managers which can expose up to 96 physical ports. All
|
||||
physical ports available on a manager have to be described in the
|
||||
incremental order even if they are not used.
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
|
||||
patternProperties:
|
||||
"^manager@0[0-9a-b]$":
|
||||
type: object
|
||||
description:
|
||||
PD69208T4/PD69204T4/PD69208M PSE manager exposing 4 or 8 physical
|
||||
ports.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description:
|
||||
Incremental index of the PSE manager starting from 0, ranging
|
||||
from lowest to highest chip select, up to 11.
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
'^port@[0-7]$':
|
||||
type: object
|
||||
required:
|
||||
- reg
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- reg
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- pse-pis
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethernet-pse@3c {
|
||||
compatible = "microchip,pd69200";
|
||||
reg = <0x3c>;
|
||||
|
||||
managers {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
manager@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
phys0: port@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phys1: port@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
phys2: port@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
phys3: port@3 {
|
||||
reg = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
manager@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
phys4: port@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phys5: port@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
phys6: port@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
phys7: port@3 {
|
||||
reg = <3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pse-pis {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pse_pi0: pse-pi@0 {
|
||||
reg = <0>;
|
||||
#pse-cells = <0>;
|
||||
pairset-names = "alternative-a", "alternative-b";
|
||||
pairsets = <&phys0>, <&phys1>;
|
||||
polarity-supported = "MDI", "S";
|
||||
vpwr-supply = <&vpwr1>;
|
||||
};
|
||||
pse_pi1: pse-pi@1 {
|
||||
reg = <1>;
|
||||
#pse-cells = <0>;
|
||||
pairset-names = "alternative-a";
|
||||
pairsets = <&phys2>;
|
||||
polarity-supported = "MDI";
|
||||
vpwr-supply = <&vpwr2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -13,6 +13,7 @@ description: Binding for the Power Sourcing Equipment (PSE) as defined in the
|
||||
|
||||
maintainers:
|
||||
- Oleksij Rempel <o.rempel@pengutronix.de>
|
||||
- Kory Maincent <kory.maincent@bootlin.com>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
@@ -22,11 +23,105 @@ properties:
|
||||
description:
|
||||
Used to uniquely identify a PSE instance within an IC. Will be
|
||||
0 on PSE nodes with only a single output and at least 1 on nodes
|
||||
controlling several outputs.
|
||||
controlling several outputs which are not described in the pse-pis
|
||||
subnode. This property is deprecated, please use pse-pis instead.
|
||||
enum: [0, 1]
|
||||
|
||||
required:
|
||||
- "#pse-cells"
|
||||
pse-pis:
|
||||
type: object
|
||||
description:
|
||||
Overview of the PSE PIs provided by the controller.
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
|
||||
patternProperties:
|
||||
"^pse-pi@[0-9a-f]+$":
|
||||
type: object
|
||||
description:
|
||||
PSE PI for power delivery via pairsets, compliant with IEEE
|
||||
802.3-2022, Section 145.2.4. Each pairset comprises a positive and
|
||||
a negative VPSE pair, adhering to the pinout configurations
|
||||
detailed in the standard.
|
||||
See Documentation/networking/pse-pd/pse-pi.rst for details.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description:
|
||||
Address describing the PSE PI index.
|
||||
maxItems: 1
|
||||
|
||||
"#pse-cells":
|
||||
const: 0
|
||||
|
||||
pairset-names:
|
||||
$ref: /schemas/types.yaml#/definitions/string-array
|
||||
description:
|
||||
Names of the pairsets as per IEEE 802.3-2022, Section 145.2.4.
|
||||
Each name should correspond to a phandle in the 'pairset'
|
||||
property pointing to the power supply for that pairset.
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- alternative-a
|
||||
- alternative-b
|
||||
|
||||
pairsets:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
description:
|
||||
List of phandles, each pointing to the power supply for the
|
||||
corresponding pairset named in 'pairset-names'. This property
|
||||
aligns with IEEE 802.3-2022, Section 33.2.3 and 145.2.4.
|
||||
PSE Pinout Alternatives (as per IEEE 802.3-2022 Table 145\u20133)
|
||||
|-----------|---------------|---------------|---------------|---------------|
|
||||
| Conductor | Alternative A | Alternative A | Alternative B | Alternative B |
|
||||
| | (MDI-X) | (MDI) | (X) | (S) |
|
||||
|-----------|---------------|---------------|---------------|---------------|
|
||||
| 1 | Negative VPSE | Positive VPSE | - | - |
|
||||
| 2 | Negative VPSE | Positive VPSE | - | - |
|
||||
| 3 | Positive VPSE | Negative VPSE | - | - |
|
||||
| 4 | - | - | Negative VPSE | Positive VPSE |
|
||||
| 5 | - | - | Negative VPSE | Positive VPSE |
|
||||
| 6 | Positive VPSE | Negative VPSE | - | - |
|
||||
| 7 | - | - | Positive VPSE | Negative VPSE |
|
||||
| 8 | - | - | Positive VPSE | Negative VPSE |
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
polarity-supported:
|
||||
$ref: /schemas/types.yaml#/definitions/string-array
|
||||
description:
|
||||
Polarity configuration supported by the PSE PI pairsets.
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
items:
|
||||
enum:
|
||||
- MDI-X
|
||||
- MDI
|
||||
- X
|
||||
- S
|
||||
|
||||
vpwr-supply:
|
||||
description: Regulator power supply for the PSE PI.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- "#pse-cells"
|
||||
|
||||
oneOf:
|
||||
- required:
|
||||
- "#pse-cells"
|
||||
- required:
|
||||
- pse-pis
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
|
||||
@@ -0,0 +1,95 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/pse-pd/ti,tps23881.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TI TPS23881 Power Sourcing Equipment controller
|
||||
|
||||
maintainers:
|
||||
- Kory Maincent <kory.maincent@bootlin.com>
|
||||
|
||||
allOf:
|
||||
- $ref: pse-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- ti,tps23881
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#pse-cells':
|
||||
const: 1
|
||||
|
||||
channels:
|
||||
description: each set of 8 ports can be assigned to one physical
|
||||
channels or two for PoE4. This parameter describes the configuration
|
||||
of the ports conversion matrix that establishes relationship between
|
||||
the logical ports and the physical channels.
|
||||
type: object
|
||||
|
||||
patternProperties:
|
||||
'^channel@[0-7]$':
|
||||
type: object
|
||||
required:
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethernet-pse@20 {
|
||||
compatible = "ti,tps23881";
|
||||
reg = <0x20>;
|
||||
|
||||
channels {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
phys0: channel@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phys1: channel@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
phys2: channel@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
pse-pis {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pse_pi0: pse-pi@0 {
|
||||
reg = <0>;
|
||||
#pse-cells = <0>;
|
||||
pairset-names = "alternative-a", "alternative-b";
|
||||
pairsets = <&phys0>, <&phys1>;
|
||||
polarity-supported = "MDI", "S";
|
||||
vpwr-supply = <&vpwr1>;
|
||||
};
|
||||
|
||||
pse_pi1: pse-pi@1 {
|
||||
reg = <1>;
|
||||
#pse-cells = <0>;
|
||||
pairset-names = "alternative-a";
|
||||
pairsets = <&phys2>;
|
||||
polarity-supported = "MDI";
|
||||
vpwr-supply = <&vpwr2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -20,6 +20,7 @@ properties:
|
||||
- enum:
|
||||
- qcom,ipq6018-mdio
|
||||
- qcom,ipq8074-mdio
|
||||
- qcom,ipq9574-mdio
|
||||
- const: qcom,ipq4019-mdio
|
||||
|
||||
"#address-cells":
|
||||
@@ -76,6 +77,7 @@ allOf:
|
||||
- qcom,ipq5018-mdio
|
||||
- qcom,ipq6018-mdio
|
||||
- qcom,ipq8074-mdio
|
||||
- qcom,ipq9574-mdio
|
||||
then:
|
||||
required:
|
||||
- clocks
|
||||
|
||||
@@ -88,10 +88,16 @@ properties:
|
||||
'#address-cells':
|
||||
description: Number of address cells for the MDIO bus.
|
||||
const: 1
|
||||
deprecated: true
|
||||
|
||||
'#size-cells':
|
||||
description: Number of size cells on the MDIO bus.
|
||||
const: 0
|
||||
deprecated: true
|
||||
|
||||
mdio:
|
||||
$ref: /schemas/net/mdio.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
renesas,no-ether-link:
|
||||
type: boolean
|
||||
@@ -110,9 +116,13 @@ properties:
|
||||
tx-internal-delay-ps:
|
||||
enum: [0, 2000]
|
||||
|
||||
# In older bindings there where no mdio child-node to describe the MDIO bus
|
||||
# and the PHY. To not fail older bindings accept any node with an address. New
|
||||
# users should describe the PHY inside the mdio child-node.
|
||||
patternProperties:
|
||||
"@[0-9a-f]$":
|
||||
type: object
|
||||
deprecated: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
@@ -123,8 +133,6 @@ required:
|
||||
- resets
|
||||
- phy-mode
|
||||
- phy-handle
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
|
||||
allOf:
|
||||
- $ref: ethernet-controller.yaml#
|
||||
|
||||
@@ -71,16 +71,8 @@ properties:
|
||||
enum: [0, 2000]
|
||||
default: 0
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^ethernet-phy@[0-9a-f]$":
|
||||
type: object
|
||||
$ref: ethernet-phy.yaml#
|
||||
mdio:
|
||||
$ref: /schemas/net/mdio.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
@@ -94,8 +86,7 @@ required:
|
||||
- resets
|
||||
- phy-mode
|
||||
- phy-handle
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
- mdio
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
@@ -122,14 +113,18 @@ examples:
|
||||
tx-internal-delay-ps = <2000>;
|
||||
phy-handle = <&phy3>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <0>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||
reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
|
||||
reset-post-delay-us = <4000>;
|
||||
|
||||
phy3: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <0>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
66
Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml
Normal file
66
Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml
Normal file
@@ -0,0 +1,66 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/renesas,rzn1-gmac.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas GMAC
|
||||
|
||||
maintainers:
|
||||
- Romain Gantois <romain.gantois@bootlin.com>
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- renesas,r9a06g032-gmac
|
||||
- renesas,rzn1-gmac
|
||||
required:
|
||||
- compatible
|
||||
|
||||
allOf:
|
||||
- $ref: snps,dwmac.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- renesas,r9a06g032-gmac
|
||||
- const: renesas,rzn1-gmac
|
||||
- const: snps,dwmac
|
||||
|
||||
pcs-handle:
|
||||
description:
|
||||
phandle pointing to a PCS sub-node compatible with
|
||||
renesas,rzn1-miic.yaml#
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/r9a06g032-sysctrl.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
ethernet@44000000 {
|
||||
compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
|
||||
reg = <0x44000000 0x2000>;
|
||||
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
|
||||
clock-names = "stmmaceth";
|
||||
clocks = <&sysctrl R9A06G032_HCLK_GMAC0>;
|
||||
power-domains = <&sysctrl>;
|
||||
snps,multicast-filter-bins = <256>;
|
||||
snps,perfect-filter-entries = <128>;
|
||||
tx-fifo-depth = <2048>;
|
||||
rx-fifo-depth = <4096>;
|
||||
pcs-handle = <&mii_conv1>;
|
||||
phy-mode = "mii";
|
||||
};
|
||||
|
||||
...
|
||||
@@ -137,8 +137,6 @@ examples:
|
||||
assigned-clock-parents = <&ext_gmac>;
|
||||
|
||||
rockchip,grf = <&grf>;
|
||||
phy-mode = "rgmii";
|
||||
phy-mode = "rgmii-id";
|
||||
clock_in_out = "input";
|
||||
tx_delay = <0x30>;
|
||||
rx_delay = <0x10>;
|
||||
};
|
||||
|
||||
@@ -242,7 +242,8 @@ properties:
|
||||
type: boolean
|
||||
description: Multicast & Broadcast Packets
|
||||
snps,priority:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
maxItems: 1
|
||||
description: Bitmask of the tagged frames priorities assigned to the queue
|
||||
allOf:
|
||||
- if:
|
||||
@@ -327,9 +328,6 @@ properties:
|
||||
snps,tx-sched-dwrr:
|
||||
type: boolean
|
||||
description: Deficit Weighted Round Robin
|
||||
snps,tx-sched-sp:
|
||||
type: boolean
|
||||
description: Strict priority
|
||||
allOf:
|
||||
- if:
|
||||
required:
|
||||
@@ -338,7 +336,6 @@ properties:
|
||||
properties:
|
||||
snps,tx-sched-wfq: false
|
||||
snps,tx-sched-dwrr: false
|
||||
snps,tx-sched-sp: false
|
||||
- if:
|
||||
required:
|
||||
- snps,tx-sched-wfq
|
||||
@@ -346,7 +343,6 @@ properties:
|
||||
properties:
|
||||
snps,tx-sched-wrr: false
|
||||
snps,tx-sched-dwrr: false
|
||||
snps,tx-sched-sp: false
|
||||
- if:
|
||||
required:
|
||||
- snps,tx-sched-dwrr
|
||||
@@ -354,15 +350,6 @@ properties:
|
||||
properties:
|
||||
snps,tx-sched-wrr: false
|
||||
snps,tx-sched-wfq: false
|
||||
snps,tx-sched-sp: false
|
||||
- if:
|
||||
required:
|
||||
- snps,tx-sched-sp
|
||||
then:
|
||||
properties:
|
||||
snps,tx-sched-wrr: false
|
||||
snps,tx-sched-wfq: false
|
||||
snps,tx-sched-dwrr: false
|
||||
patternProperties:
|
||||
"^queue[0-9]$":
|
||||
description: Each subnode represents a queue.
|
||||
@@ -393,7 +380,8 @@ properties:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: max read outstanding req. limit
|
||||
snps,priority:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
maxItems: 1
|
||||
description:
|
||||
Bitmask of the tagged frames priorities assigned to the queue.
|
||||
When a PFC frame is received with priorities matching the bitmask,
|
||||
|
||||
@@ -30,6 +30,10 @@ properties:
|
||||
- items:
|
||||
- const: starfive,jh7110-dwmac
|
||||
- const: snps,dwmac-5.20
|
||||
- items:
|
||||
- const: starfive,jh8100-dwmac
|
||||
- const: starfive,jh7110-dwmac
|
||||
- const: snps,dwmac-5.20
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
@@ -116,11 +120,25 @@ allOf:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
|
||||
resets:
|
||||
minItems: 2
|
||||
if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: starfive,jh8100-dwmac
|
||||
then:
|
||||
properties:
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
reset-names:
|
||||
minItems: 2
|
||||
reset-names:
|
||||
const: stmmaceth
|
||||
else:
|
||||
properties:
|
||||
resets:
|
||||
minItems: 2
|
||||
|
||||
reset-names:
|
||||
minItems: 2
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
|
||||
@@ -82,6 +82,13 @@ properties:
|
||||
Should be phandle/offset pair. The phandle to the syscon node which
|
||||
encompases the glue register, and the offset of the control register
|
||||
|
||||
st,ext-phyclk:
|
||||
description:
|
||||
set this property in RMII mode when you have PHY without crystal 50MHz and want to
|
||||
select RCC clock instead of ETH_REF_CLK. OR in RGMII mode when you want to select
|
||||
RCC clock instead of ETH_CLK125.
|
||||
type: boolean
|
||||
|
||||
st,eth-clk-sel:
|
||||
description:
|
||||
set this property in RGMII PHY when you want to select RCC clock instead of ETH_CLK125.
|
||||
|
||||
@@ -13,14 +13,12 @@ description:
|
||||
Ethernet based on the Programmable Real-Time Unit and Industrial
|
||||
Communication Subsystem.
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/remoteproc/ti,pru-consumer.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- ti,am642-icssg-prueth # for AM64x SoC family
|
||||
- ti,am654-icssg-prueth # for AM65x SoC family
|
||||
- ti,am642-icssg-prueth # for AM64x SoC family
|
||||
- ti,am654-icssg-prueth # for AM65x SoC family
|
||||
- ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0
|
||||
|
||||
sram:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
@@ -28,9 +26,11 @@ properties:
|
||||
phandle to MSMC SRAM node
|
||||
|
||||
dmas:
|
||||
maxItems: 10
|
||||
minItems: 10
|
||||
maxItems: 12
|
||||
|
||||
dma-names:
|
||||
minItems: 10
|
||||
items:
|
||||
- const: tx0-0
|
||||
- const: tx0-1
|
||||
@@ -42,6 +42,8 @@ properties:
|
||||
- const: tx1-3
|
||||
- const: rx0
|
||||
- const: rx1
|
||||
- const: rxmgm0
|
||||
- const: rxmgm1
|
||||
|
||||
ti,mii-g-rt:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
@@ -132,6 +134,27 @@ required:
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/remoteproc/ti,pru-consumer.yaml#
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: ti,am654-sr1-icssg-prueth
|
||||
then:
|
||||
properties:
|
||||
dmas:
|
||||
minItems: 12
|
||||
dma-names:
|
||||
minItems: 12
|
||||
else:
|
||||
properties:
|
||||
dmas:
|
||||
maxItems: 10
|
||||
dma-names:
|
||||
maxItems: 10
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
@@ -44,6 +44,7 @@ properties:
|
||||
- brcm,bcm4366-fmac
|
||||
- cypress,cyw4373-fmac
|
||||
- cypress,cyw43012-fmac
|
||||
- infineon,cyw43439-fmac
|
||||
- const: brcm,bcm4329-fmac
|
||||
- enum:
|
||||
- brcm,bcm4329-fmac
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user