dasharo/linux
0
0
Fork 0
mirror of https://github.com/Dasharo/linux.git synced 2026-03-06 15:25:10 -08:00
Code Issues Packages Projects Releases Wiki Activity

Merge tag 'devicetree-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Browse Source 
Pull devicetree updates from Rob Herring:
 "DT Bindings:

   - Convert and add a bunch of IBM FSI related bindings

   - Add a new schema listing legacy compatibles which will (probably)
     never be documented. This will silence various checks warning about
     them.

   - Add bindings for Sierra Wireless mangOH Green SPI IoT interface,
     new Arm 2024 Cortex and Neoverse CPUs, QCom sc8180x PDC, QCom SDX75
     GPI DMA, imx8mp/imx8qxp fsl,irqsteer, and Renesas RZ/G2UL CRU and
     CSI-2 blocks

   - Convert Spreadtrum sprd-timer, FSL cpm_qe, FSL fsl,ls-scfg-msi, FSL
     q(b)man-*, FSL qoriq-mc, and img,pdc-wdt bindings to DT schema

   - Drop obsolete stericsson,abx500.txt

  DT core:

   - Update dtc to upstream version v1.7.0-93-g1df7b047fe43

   - Add support to run DT validation on DTs with applied overlays

   - Add helper for creating boolean properties in dynamic nodes and use
     that for dynamic PCI nodes

   - Clean-up early parsing of '#{address,size}-cells'"

* tag 'devicetree-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (39 commits)
  dt-bindings: timer: sprd-timer: convert to YAML
  dt-bindings: incomplete-devices: document devices without bindings
  dt-bindings: trivial-devices: document the Sierra Wireless mangOH Green SPI IoT interface
  scripts/dtc: Update to upstream version v1.7.0-93-g1df7b047fe43
  dt-bindings: soc: fsl: Add fsl,ls1028a-reset for reset syscon node
  dt-bindings: soc: fsl: cpm_qe: convert to yaml format
  dt-bindings: i2c: i2c-fsi: Convert to json-schema
  dt-bindings: fsi: Document the FSI Hub Controller
  dt-bindings: fsi: Document the AST2700 FSI controller
  dt-bindings: fsi: ast2600-fsi-master: Convert to json-schema
  dt-bindings: fsi: ibm,i2cr-fsi-master: Reference common FSI controller
  dt-bindings: fsi: Document the FSI controller common properties
  dt-bindings: fsi: Document the IBM SBEFIFO engine
  dt-bindings: fsi: p9-occ: Convert to json-schema
  dt-bindings: fsi: Document the IBM SCOM engine
  dt-bindings: fsi: fsi2spi: Document SPI controller child nodes
  dt-bindings: interrupt-controller: convert fsl,ls-scfg-msi to yaml
  dt-bindings: soc: fsl: Convert q(b)man-* to yaml format
  dt-bindings: misc: fsl,qoriq-mc: convert to yaml format
  dt-bindings: drop stale Anson Huang from maintainers
  ...
This commit is contained in:
Linus Torvalds
2024-07-17 18:07:31 -07:00
parent 5b9ac6c2a7 76be2f9823
commit 0ffb8a4c96
97 changed files with 2751 additions and 1301 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
Documentation/devicetree/bindings/arm/cpus.yaml
View File

@@ -147,6 +147,7 @@ properties:
- arm,cortex-a710
- arm,cortex-a715
- arm,cortex-a720
- arm,cortex-a725
- arm,cortex-m0
- arm,cortex-m0+
- arm,cortex-m1
@@ -161,10 +162,15 @@ properties:
- arm,cortex-x2
- arm,cortex-x3
- arm,cortex-x4
- arm,cortex-x925
- arm,neoverse-e1
- arm,neoverse-n1
- arm,neoverse-n2
- arm,neoverse-n3
- arm,neoverse-v1
- arm,neoverse-v2
- arm,neoverse-v3
- arm,neoverse-v3ae
- brcm,brahma-b15
- brcm,brahma-b53
- brcm,vulcan

4
Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.yaml
View File

@@ -7,7 +7,9 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX7ULP System Integration Module
maintainers:
- Anson Huang <anson.huang@nxp.com>
- Shawn Guo <shawnguo@kernel.org>
- Sascha Hauer <s.hauer@pengutronix.de>
- Fabio Estevam <festevam@gmail.com>
description: |
The system integration module (SIM) provides system control and chip configuration

3
Documentation/devicetree/bindings/clock/imx6q-clock.yaml
View File

@@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX6 Quad Clock Controller
maintainers:
- Anson Huang <Anson.Huang@nxp.com>
- Abel Vesa <abelvesa@kernel.org>
- Peng Fan <peng.fan@nxp.com>
properties:
compatible:

3
Documentation/devicetree/bindings/clock/imx6sl-clock.yaml
View File

@@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX6 SoloLite Clock Controller
maintainers:
- Anson Huang <Anson.Huang@nxp.com>
- Abel Vesa <abelvesa@kernel.org>
- Peng Fan <peng.fan@nxp.com>
properties:
compatible:

3
Documentation/devicetree/bindings/clock/imx6sll-clock.yaml
View File

@@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX6 SLL Clock Controller
maintainers:
- Anson Huang <Anson.Huang@nxp.com>
- Abel Vesa <abelvesa@kernel.org>
- Peng Fan <peng.fan@nxp.com>
properties:
compatible:

3
Documentation/devicetree/bindings/clock/imx6sx-clock.yaml
View File

@@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX6 SoloX Clock Controller
maintainers:
- Anson Huang <Anson.Huang@nxp.com>
- Abel Vesa <abelvesa@kernel.org>
- Peng Fan <peng.fan@nxp.com>
properties:
compatible:

3
Documentation/devicetree/bindings/clock/imx6ul-clock.yaml
View File

@@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX6 UltraLite Clock Controller
maintainers:
- Anson Huang <Anson.Huang@nxp.com>
- Abel Vesa <abelvesa@kernel.org>
- Peng Fan <peng.fan@nxp.com>
properties:
compatible:

1
Documentation/devicetree/bindings/clock/imx7d-clock.yaml
View File

@@ -8,7 +8,6 @@ title: Freescale i.MX7 Dual Clock Controller
maintainers:
- Frank Li <Frank.Li@nxp.com>
- Anson Huang <Anson.Huang@nxp.com>
description: |
The clock consumer should specify the desired clock by having the clock

3
Documentation/devicetree/bindings/clock/imx8m-clock.yaml
View File

@@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP i.MX8M Family Clock Control Module
maintainers:
- Anson Huang <Anson.Huang@nxp.com>
- Abel Vesa <abelvesa@kernel.org>
- Peng Fan <peng.fan@nxp.com>
description: |
NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock

20
Documentation/devicetree/bindings/clock/stericsson,abx500.txt
View File

@@ -1,20 +0,0 @@
Clock bindings for ST-Ericsson ABx500 clocks
Required properties :
- compatible : shall contain the following:
"stericsson,ab8500-clk"
- #clock-cells should be <1>
The ABx500 clocks need to be placed as a subnode of an AB8500
device node, see mfd/ab8500.txt
All available clocks are defined as preprocessor macros in
dt-bindings/clock/ste-ab8500.h header and can be used in device
tree sources.
Example:
clock-controller {
compatible = "stericsson,ab8500-clk";
#clock-cells = <1>;
};

4
Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml
View File

@@ -21,7 +21,9 @@ properties:
items:
- const: lg,sw43408
reg: true
reg:
maxItems: 1
port: true
vddi-supply: true
vpnl-supply: true

5
Documentation/devicetree/bindings/display/panel/raydium,rm69380.yaml
View File

@@ -28,6 +28,9 @@ properties:
to work with the indicated panel. The raydium,rm69380 compatible shall
always be provided as a fallback.
reg:
maxItems: 1
avdd-supply:
description: Analog voltage rail
@@ -38,8 +41,6 @@ properties:
maxItems: 1
description: phandle of gpio for reset line - This should be active low
reg: true
required:
- compatible
- reg

1
Documentation/devicetree/bindings/dma/qcom,gpi.yaml
View File

@@ -27,6 +27,7 @@ properties:
- qcom,qcm2290-gpi-dma
- qcom,qdu1000-gpi-dma
- qcom,sc7280-gpi-dma
- qcom,sdx75-gpi-dma
- qcom,sm6115-gpi-dma
- qcom,sm6375-gpi-dma
- qcom,sm8350-gpi-dma

121
Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml Normal file
View File

@@ -0,0 +1,121 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fsi/aspeed,ast2600-fsi-master.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Aspeed FSI master
maintainers:
- Eddie James <eajames@linux.ibm.com>
description:
The AST2600 and later contain two identical FSI masters. They share a
clock and have a separate interrupt line and output pins.
properties:
compatible:
enum:
- aspeed,ast2600-fsi-master
- aspeed,ast2700-fsi-master
clocks:
maxItems: 1
cfam-reset-gpios:
maxItems: 1
description:
Output GPIO pin for CFAM reset
fsi-routing-gpios:
maxItems: 1
description:
Output GPIO pin for setting the FSI mux (internal or cabled)
fsi-mux-gpios:
maxItems: 1
description:
Input GPIO pin for detecting the desired FSI mux state
interrupts:
maxItems: 1
if:
properties:
compatible:
contains:
enum:
- aspeed,ast2600-fsi-master
then:
properties:
reg:
maxItems: 1
else:
properties:
reg:
minItems: 1
items:
- description: OPB control registers
- description: FSI controller registers
- description: FSI link address space
reg-names:
items:
- const: opb
- const: ctrl
- const: fsi
required:
- compatible
- reg
- clocks
- interrupts
allOf:
- $ref: fsi-controller.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/ast2600-clock.h>
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
fsi-master@1e79b000 {
compatible = "aspeed,ast2600-fsi-master";
reg = <0x1e79b000 0x94>;
#address-cells = <2>;
#size-cells = <0>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fsi1_default>;
clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>;
fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>;
cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
cfam@0,0 {
reg = <0 0>;
#address-cells = <1>;
#size-cells = <1>;
chip-id = <0>;
};
};
- |
bus {
#address-cells = <2>;
#size-cells = <2>;
fsi-master@21800000 {
compatible = "aspeed,ast2700-fsi-master";
reg = <0x0 0x21800000 0x0 0x100>,
<0x0 0x21000000 0x0 0x1000>,
<0x0 0x20000000 0x0 0x1000000>;
reg-names = "opb", "ctrl", "fsi";
#interrupt-cells = <1>;
interrupt-controller;
interrupts-extended = <&intc 6>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fsi0_default>;
clocks = <&syscon 40>;
};
};

66
Documentation/devicetree/bindings/fsi/fsi-controller.yaml Normal file
View File

@@ -0,0 +1,66 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fsi/fsi-controller.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: FSI Controller Common Properties
maintainers:
- Eddie James <eajames@linux.ibm.com>
description:
FSI (FRU (Field Replaceable Unit) Service Interface) is a two wire bus. The
FSI bus is connected to a CFAM (Common FRU Access Macro) which contains
various engines such as I2C controllers, SPI controllers, etc.
properties:
"#address-cells":
const: 2
"#size-cells":
const: 0
'#interrupt-cells':
const: 1
bus-frequency:
minimum: 1
maximum: 200000000
interrupt-controller: true
no-scan-on-init:
$ref: /schemas/types.yaml#/definitions/flag
description:
The FSI controller cannot scan the bus during initialization.
patternProperties:
"cfam@[0-9a-f],[0-9a-f]":
type: object
properties:
chip-id:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Processor index, a global unique chip ID which is used to identify
the physical location of the chip in a system specific way.
bus-frequency:
minimum: 1
maximum: 100000000
reg:
maxItems: 1
"#address-cells":
const: 1
"#size-cells":
const: 1
required:
- reg
additionalProperties: true
additionalProperties: true

36
Documentation/devicetree/bindings/fsi/fsi-master-aspeed.txt
View File

@@ -1,36 +0,0 @@
Device-tree bindings for AST2600 FSI master
-------------------------------------------
The AST2600 contains two identical FSI masters. They share a clock and have a
separate interrupt line and output pins.
Required properties:
- compatible: "aspeed,ast2600-fsi-master"
- reg: base address and length
- clocks: phandle and clock number
- interrupts: platform dependent interrupt description
- pinctrl-0: phandle to pinctrl node
- pinctrl-names: pinctrl state
Optional properties:
- cfam-reset-gpios: GPIO for CFAM reset
- fsi-routing-gpios: GPIO for setting the FSI mux (internal or cabled)
- fsi-mux-gpios: GPIO for detecting the desired FSI mux state
Examples:
fsi-master {
compatible = "aspeed,ast2600-fsi-master", "fsi-master";
reg = <0x1e79b000 0x94>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fsi1_default>;
clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>;
fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>;
cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
};

36
Documentation/devicetree/bindings/fsi/ibm,fsi2spi.yaml
View File

@@ -9,11 +9,10 @@ title: IBM FSI-attached SPI controllers
maintainers:
- Eddie James <eajames@linux.ibm.com>
description: |
description:
This binding describes an FSI CFAM engine called the FSI2SPI. Therefore this
node will always be a child of an FSI CFAM node; see fsi.txt for details on
FSI slave and CFAM nodes. This FSI2SPI engine provides access to a number of
SPI controllers.
node will always be a child of an FSI CFAM node. This FSI2SPI engine provides
access to a number of SPI controllers.
properties:
compatible:
@@ -24,6 +23,17 @@ properties:
items:
- description: FSI slave address
"#address-cells":
const: 1
"#size-cells":
const: 0
patternProperties:
"^spi@[0-9a-f]+$":
type: object
$ref: /schemas/spi/ibm,spi-fsi.yaml
required:
- compatible
- reg
@@ -35,4 +45,22 @@ examples:
fsi2spi@1c00 {
compatible = "ibm,fsi2spi";
reg = <0x1c00 0x400>;
#address-cells = <1>;
#size-cells = <0>;
spi@0 {
compatible = "ibm,spi-fsi";
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
compatible = "atmel,at25";
reg = <0>;
address-width = <24>;
pagesize = <256>;
size = <0x80000>;
spi-max-frequency = <1000000>;
};
};
};

5
Documentation/devicetree/bindings/fsi/ibm,i2cr-fsi-master.yaml
View File

@@ -26,7 +26,10 @@ required:
- compatible
- reg
additionalProperties: false
allOf:
- $ref: fsi-controller.yaml#
unevaluatedProperties: false
examples:
- |

45
Documentation/devicetree/bindings/fsi/ibm,p9-fsi-controller.yaml Normal file
View File

@@ -0,0 +1,45 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fsi/ibm,p9-fsi-controller.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: IBM FSI-attached FSI Hub Controller
maintainers:
- Eddie James <eajames@linux.ibm.com>
description:
The FSI Hub Controller is an FSI controller, providing a number of FSI links,
located on a CFAM. Therefore this node will always be a child of an FSI CFAM
node.
properties:
compatible:
enum:
- ibm,p9-fsi-controller
reg:
items:
- description: FSI slave address
allOf:
- $ref: fsi-controller.yaml#
unevaluatedProperties: false
examples:
- |
fsi@3400 {
compatible = "ibm,p9-fsi-controller";
reg = <0x3400 0x400>;
#address-cells = <2>;
#size-cells = <0>;
cfam@0,0 {
reg = <0 0>;
#address-cells = <1>;
#size-cells = <1>;
chip-id = <0>;
};
};

16
Documentation/devicetree/bindings/fsi/ibm,p9-occ.txt
View File

@@ -1,16 +0,0 @@
Device-tree bindings for FSI-attached POWER9/POWER10 On-Chip Controller (OCC)
-----------------------------------------------------------------------------
This is the binding for the P9 or P10 On-Chip Controller accessed over FSI from
a service processor. See fsi.txt for details on bindings for FSI slave and CFAM
nodes. The OCC is not an FSI slave device itself, rather it is accessed
through the SBE FIFO.
Required properties:
- compatible = "ibm,p9-occ" or "ibm,p10-occ"
Examples:
occ {
compatible = "ibm,p9-occ";
};

Some files were not shown because too many files have changed in this diff Show More