mirror of
https://github.com/Dasharo/linux.git
synced 2026-03-06 15:25:10 -08:00
Merge tag 'net-next-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next
Pull networking updates from Paolo Abeni:
"This is slightly smaller than usual, with the most interesting work
being still around RTNL scope reduction.
Core:
- More core refactoring to reduce the RTNL lock contention, including
preparatory work for the per-network namespace RTNL lock, replacing
RTNL lock with a per device-one to protect NAPI-related net device
data and moving synchronize_net() calls outside such lock.
- Extend drop reasons usage, adding net scheduler, AF_UNIX, bridge
and more specific TCP coverage.
- Reduce network namespace tear-down time by removing per-subsystems
synchronize_net() in tipc and sched.
- Add flow label selector support for fib rules, allowing traffic
redirection based on such header field.
Netfilter:
- Do not remove netdev basechain when last device is gone, allowing
netdev basechains without devices.
- Revisit the flowtable teardown strategy, dealing better with fin,
reset and re-open events.
- Scale-up IP-vs connection dumping by avoiding linear search on each
restart.
Protocols:
- A significant XDP socket refactor, consolidating and optimizing
several helpers into the core
- Better scaling of ICMP rate-limiting, by removing false-sharing in
inet peers handling.
- Introduces netlink notifications for multicast IPv4 and IPv6
address changes.
- Add ipsec support for IP-TFS/AggFrag encapsulation, allowing
aggregation and fragmentation of the inner IP.
- Add sysctl to configure TIME-WAIT reuse delay for TCP sockets, to
avoid local port exhaustion issues when the average connection
lifetime is very short.
- Support updating keys (re-keying) for connections using kernel TLS
(for TLS 1.3 only).
- Support ipv4-mapped ipv6 address clients in smc-r v2.
- Add support for jumbo data packet transmission in RxRPC sockets,
gluing multiple data packets in a single UDP packet.
- Support RxRPC RACK-TLP to manage packet loss and retransmission in
conjunction with the congestion control algorithm.
Driver API:
- Introduce a unified and structured interface for reporting PHY
statistics, exposing consistent data across different H/W via
ethtool.
- Make timestamping selectable, allow the user to select the desired
hwtstamp provider (PHY or MAC) administratively.
- Add support for configuring a header-data-split threshold (HDS)
value via ethtool, to deal with partial or buggy H/W
implementation.
- Consolidate DSA drivers Energy Efficiency Ethernet support.
- Add EEE management to phylink, making use of the phylib
implementation.
- Add phylib support for in-band capabilities negotiation.
- Simplify how phylib-enabled mac drivers expose the supported
interfaces.
Tests and tooling:
- Make the YNL tool package-friendly to make it easier to deploy it
separately from the kernel.
- Increase TCP selftest coverage importing several packetdrill
test-cases.
- Regenerate the ethtool uapi header from the YNL spec, to ease
maintenance and future development.
- Add YNL support for decoding the link types used in net self-tests,
allowing a single build to run both net and drivers/net.
Drivers:
- Ethernet high-speed NICs:
- nVidia/Mellanox (mlx5):
- add cross E-Switch QoS support
- add SW Steering support for ConnectX-8
- implement support for HW-Managed Flow Steering, improving the
rule deletion/insertion rate
- support for multi-host LAG
- Intel (ixgbe, ice, igb):
- ice: add support for devlink health events
- ixgbe: add initial support for E610 chipset variant
- igb: add support for AF_XDP zero-copy
- Meta:
- add support for basic RSS config
- allow changing the number of channels
- add hardware monitoring support
- Broadcom (bnxt):
- implement TCP data split and HDS threshold ethtool support,
enabling Device Memory TCP.
- Marvell Octeon:
- implement egress ipsec offload support for the cn10k family
- Hisilicon (HIBMC):
- implement unicast MAC filtering
- Ethernet NICs embedded and virtual:
- Convert UDP tunnel drivers to NETDEV_PCPU_STAT_DSTATS, avoiding
contented atomic operations for drop counters
- Freescale:
- quicc: phylink conversion
- enetc: support Tx and Rx checksum offload and improve TSO
performances
- MediaTek:
- airoha: introduce support for ETS and HTB Qdisc offload
- Microchip:
- lan78XX USB: preparation work for phylink conversion
- Synopsys (stmmac):
- support DWMAC IP on NXP Automotive SoCs S32G2xx/S32G3xx/S32R45
- refactor EEE support to leverage the new driver API
- optimize DMA and cache access to increase raw RX performances
by 40%
- TI:
- icssg-prueth: add multicast filtering support for VLAN
interface
- netkit:
- add ability to configure head/tailroom
- VXLAN:
- accepts packets with user-defined reserved bit
- Ethernet switches:
- Microchip:
- lan969x: add RGMII support
- lan969x: improve TX and RX performance using the FDMA engine
- nVidia/Mellanox:
- move Tx header handling to PCI driver, to ease XDP support
- Ethernet PHYs:
- Texas Instruments DP83822:
- add support for GPIO2 clock output
- Realtek:
- 8169: add support for RTL8125D rev.b
- rtl822x: add hwmon support for the temperature sensor
- Microchip:
- add support for RDS PTP hardware
- consolidate periodic output signal generation
- CAN:
- several DT-bindings to DT schema conversions
- tcan4x5x:
- add HW standby support
- support nWKRQ voltage selection
- kvaser:
- allowing Bus Error Reporting runtime configuration
- WiFi:
- the on-going Multi-Link Operation (MLO) effort continues,
affecting both the stack and in drivers
- mac80211/cfg80211:
- Emergency Preparedness Communication Services (EPCS) station
mode support
- support for adding and removing station links for MLO
- add support for WiFi 7/EHT mesh over 320 MHz channels
- report Tx power info for each link
- RealTek (rtw88):
- enable USB Rx aggregation and USB 3 to improve performance
- LED support
- RealTek (rtw89):
- refactor power save to support Multi-Link Operations
- add support for RTL8922AE-VS variant
- MediaTek (mt76):
- single wiphy multiband support (preparation for MLO)
- p2p device support
- add TP-Link TXE50UH USB adapter support
- Qualcomm (ath10k):
- support for the QCA6698AQ IP core
- Qualcomm (ath12k):
- enable MLO for QCN9274
- Bluetooth:
- Allow sysfs to trigger hdev reset, to allow recovering devices
not responsive from user-space
- MediaTek: add support for MT7922, MT7925, MT7921e devices
- Realtek: add support for RTL8851BE devices
- Qualcomm: add support for WCN785x devices
- ISO: allow BIG re-sync"
* tag 'net-next-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1386 commits)
net/rose: prevent integer overflows in rose_setsockopt()
net: phylink: fix regression when binding a PHY
net: ethernet: ti: am65-cpsw: streamline TX queue creation and cleanup
net: ethernet: ti: am65-cpsw: streamline RX queue creation and cleanup
net: ethernet: ti: am65-cpsw: ensure proper channel cleanup in error path
ipv6: Convert inet6_rtm_deladdr() to per-netns RTNL.
ipv6: Convert inet6_rtm_newaddr() to per-netns RTNL.
ipv6: Move lifetime validation to inet6_rtm_newaddr().
ipv6: Set cfg.ifa_flags before device lookup in inet6_rtm_newaddr().
ipv6: Pass dev to inet6_addr_add().
ipv6: Convert inet6_ioctl() to per-netns RTNL.
ipv6: Hold rtnl_net_lock() in addrconf_init() and addrconf_cleanup().
ipv6: Hold rtnl_net_lock() in addrconf_dad_work().
ipv6: Hold rtnl_net_lock() in addrconf_verify_work().
ipv6: Convert net.ipv6.conf.${DEV}.XXX sysctl to per-netns RTNL.
ipv6: Add __in6_dev_get_rtnl_net().
net: stmmac: Drop redundant skb_mark_for_recycle() for SKB frags
net: mii: Fix the Speed display when the network cable is not connected
sysctl net: Remove macro checks for CONFIG_SYSCTL
eth: bnxt: update header sizing defaults
...
This commit is contained in:
21
.mailmap
21
.mailmap
@@ -83,6 +83,13 @@ Anirudh Ghayal <quic_aghayal@quicinc.com> <aghayal@codeaurora.org>
|
||||
Antoine Tenart <atenart@kernel.org> <antoine.tenart@bootlin.com>
|
||||
Antoine Tenart <atenart@kernel.org> <antoine.tenart@free-electrons.com>
|
||||
Antonio Ospite <ao2@ao2.it> <ao2@amarulasolutions.com>
|
||||
Antonio Quartulli <antonio@mandelbit.com> <antonio@meshcoding.com>
|
||||
Antonio Quartulli <antonio@mandelbit.com> <antonio@open-mesh.com>
|
||||
Antonio Quartulli <antonio@mandelbit.com> <antonio.quartulli@open-mesh.com>
|
||||
Antonio Quartulli <antonio@mandelbit.com> <ordex@autistici.org>
|
||||
Antonio Quartulli <antonio@mandelbit.com> <ordex@ritirata.org>
|
||||
Antonio Quartulli <antonio@mandelbit.com> <antonio@openvpn.net>
|
||||
Antonio Quartulli <antonio@mandelbit.com> <a@unstable.cc>
|
||||
Anup Patel <anup@brainfault.org> <anup.patel@wdc.com>
|
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Archit Taneja <archit@ti.com>
|
||||
Ard Biesheuvel <ardb@kernel.org> <ard.biesheuvel@linaro.org>
|
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@@ -430,6 +437,8 @@ Marcin Nowakowski <marcin.nowakowski@mips.com> <marcin.nowakowski@imgtec.com>
|
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Marc Zyngier <maz@kernel.org> <marc.zyngier@arm.com>
|
||||
Marek Behún <kabel@kernel.org> <marek.behun@nic.cz>
|
||||
Marek Behún <kabel@kernel.org> Marek Behun <marek.behun@nic.cz>
|
||||
Marek Lindner <marek.lindner@mailbox.org> <lindner_marek@yahoo.de>
|
||||
Marek Lindner <marek.lindner@mailbox.org> <mareklindner@neomailbox.ch>
|
||||
Mark Brown <broonie@sirena.org.uk>
|
||||
Mark Starovoytov <mstarovo@pm.me> <mstarovoitov@marvell.com>
|
||||
Markus Schneider-Pargmann <msp@baylibre.com> <mpa@pengutronix.de>
|
||||
@@ -532,6 +541,8 @@ Oleksij Rempel <linux@rempel-privat.de> <external.Oleksij.Rempel@de.bosch.com>
|
||||
Oleksij Rempel <linux@rempel-privat.de> <fixed-term.Oleksij.Rempel@de.bosch.com>
|
||||
Oleksij Rempel <o.rempel@pengutronix.de>
|
||||
Oleksij Rempel <o.rempel@pengutronix.de> <ore@pengutronix.de>
|
||||
Oliver Hartkopp <socketcan@hartkopp.net> <oliver.hartkopp@volkswagen.de>
|
||||
Oliver Hartkopp <socketcan@hartkopp.net> <oliver@hartkopp.net>
|
||||
Oliver Upton <oliver.upton@linux.dev> <oupton@google.com>
|
||||
Ondřej Jirman <megi@xff.cz> <megous@megous.com>
|
||||
Oza Pawandeep <quic_poza@quicinc.com> <poza@codeaurora.org>
|
||||
@@ -643,6 +654,11 @@ Simona Vetter <simona.vetter@ffwll.ch> <daniel@biene.ffwll.ch>
|
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Simon Horman <horms@kernel.org> <simon.horman@corigine.com>
|
||||
Simon Horman <horms@kernel.org> <simon.horman@netronome.com>
|
||||
Simon Kelley <simon@thekelleys.org.uk>
|
||||
Simon Wunderlich <sw@simonwunderlich.de> <simon.wunderlich@open-mesh.com>
|
||||
Simon Wunderlich <sw@simonwunderlich.de> <simon.wunderlich@s2003.tu-chemnitz.de>
|
||||
Simon Wunderlich <sw@simonwunderlich.de> <simon.wunderlich@saxnet.de>
|
||||
Simon Wunderlich <sw@simonwunderlich.de> <simon@open-mesh.com>
|
||||
Simon Wunderlich <sw@simonwunderlich.de> <siwu@hrz.tu-chemnitz.de>
|
||||
Sricharan Ramabadhran <quic_srichara@quicinc.com> <sricharan@codeaurora.org>
|
||||
Srinivas Ramana <quic_sramana@quicinc.com> <sramana@codeaurora.org>
|
||||
Sriram R <quic_srirrama@quicinc.com> <srirrama@codeaurora.org>
|
||||
@@ -663,6 +679,11 @@ Sudarshan Rajagopalan <quic_sudaraja@quicinc.com> <sudaraja@codeaurora.org>
|
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Sudeep Holla <sudeep.holla@arm.com> Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
|
||||
Sumit Semwal <sumit.semwal@ti.com>
|
||||
Surabhi Vishnoi <quic_svishnoi@quicinc.com> <svishnoi@codeaurora.org>
|
||||
Sven Eckelmann <sven@narfation.org> <seckelmann@datto.com>
|
||||
Sven Eckelmann <sven@narfation.org> <sven.eckelmann@gmx.de>
|
||||
Sven Eckelmann <sven@narfation.org> <sven.eckelmann@open-mesh.com>
|
||||
Sven Eckelmann <sven@narfation.org> <sven.eckelmann@openmesh.com>
|
||||
Sven Eckelmann <sven@narfation.org> <sven@open-mesh.com>
|
||||
Takashi YOSHII <takashi.yoshii.zj@renesas.com>
|
||||
Tamizh Chelvam Raja <quic_tamizhr@quicinc.com> <tamizhr@codeaurora.org>
|
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Taniya Das <quic_tdas@quicinc.com> <tdas@codeaurora.org>
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@@ -104,7 +104,7 @@ quiet_cmd_sphinx = SPHINX $@ --> file://$(abspath $(BUILDDIR)/$3/$4)
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YNL_INDEX:=$(srctree)/Documentation/networking/netlink_spec/index.rst
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YNL_RST_DIR:=$(srctree)/Documentation/networking/netlink_spec
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YNL_YAML_DIR:=$(srctree)/Documentation/netlink/specs
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YNL_TOOL:=$(srctree)/tools/net/ynl/ynl-gen-rst.py
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YNL_TOOL:=$(srctree)/tools/net/ynl/pyynl/ynl_gen_rst.py
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YNL_RST_FILES_TMP := $(patsubst %.yaml,%.rst,$(wildcard $(YNL_YAML_DIR)/*.yaml))
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YNL_RST_FILES := $(patsubst $(YNL_YAML_DIR)%,$(YNL_RST_DIR)%, $(YNL_RST_FILES_TMP))
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@@ -227,11 +227,119 @@ Intended use
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Drivers that opt to use this API first need to identify which of the above 3
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quirk combinations (for a total of 8) match what the hardware documentation
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describes. Then they should wrap the packing() function, creating a new
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xxx_packing() that calls it using the proper QUIRK_* one-hot bits set.
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describes.
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There are 3 supported usage patterns, detailed below.
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packing()
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^^^^^^^^^
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This API function is deprecated.
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The packing() function returns an int-encoded error code, which protects the
|
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programmer against incorrect API use. The errors are not expected to occur
|
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during runtime, therefore it is reasonable for xxx_packing() to return void
|
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and simply swallow those errors. Optionally it can dump stack or print the
|
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error description.
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during runtime, therefore it is reasonable to wrap packing() into a custom
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function which returns void and swallows those errors. Optionally it can
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dump stack or print the error description.
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.. code-block:: c
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void my_packing(void *buf, u64 *val, int startbit, int endbit,
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size_t len, enum packing_op op)
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{
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int err;
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/* Adjust quirks accordingly */
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err = packing(buf, val, startbit, endbit, len, op, QUIRK_LSW32_IS_FIRST);
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if (likely(!err))
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return;
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if (err == -EINVAL) {
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pr_err("Start bit (%d) expected to be larger than end (%d)\n",
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startbit, endbit);
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} else if (err == -ERANGE) {
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if ((startbit - endbit + 1) > 64)
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pr_err("Field %d-%d too large for 64 bits!\n",
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startbit, endbit);
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else
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pr_err("Cannot store %llx inside bits %d-%d (would truncate)\n",
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*val, startbit, endbit);
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}
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dump_stack();
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}
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pack() and unpack()
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^^^^^^^^^^^^^^^^^^^
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These are const-correct variants of packing(), and eliminate the last "enum
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packing_op op" argument.
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Calling pack(...) is equivalent, and preferred, to calling packing(..., PACK).
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Calling unpack(...) is equivalent, and preferred, to calling packing(..., UNPACK).
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pack_fields() and unpack_fields()
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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The library exposes optimized functions for the scenario where there are many
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fields represented in a buffer, and it encourages consumer drivers to avoid
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repetitive calls to pack() and unpack() for each field, but instead use
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pack_fields() and unpack_fields(), which reduces the code footprint.
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These APIs use field definitions in arrays of ``struct packed_field_u8`` or
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``struct packed_field_u16``, allowing consumer drivers to minimize the size
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of these arrays according to their custom requirements.
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The pack_fields() and unpack_fields() API functions are actually macros which
|
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automatically select the appropriate function at compile time, based on the
|
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type of the fields array passed in.
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|
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An additional benefit over pack() and unpack() is that sanity checks on the
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field definitions are handled at compile time with ``BUILD_BUG_ON`` rather
|
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than only when the offending code is executed. These functions return void and
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wrapping them to handle unexpected errors is not necessary.
|
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|
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It is recommended, but not required, that you wrap your packed buffer into a
|
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structured type with a fixed size. This generally makes it easier for the
|
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compiler to enforce that the correct size buffer is used.
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|
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Here is an example of how to use the fields APIs:
|
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.. code-block:: c
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|
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/* Ordering inside the unpacked structure is flexible and can be different
|
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* from the packed buffer. Here, it is optimized to reduce padding.
|
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*/
|
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struct data {
|
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u64 field3;
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u32 field4;
|
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u16 field1;
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u8 field2;
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};
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#define SIZE 13
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typdef struct __packed { u8 buf[SIZE]; } packed_buf_t;
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|
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static const struct packed_field_u8 fields[] = {
|
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PACKED_FIELD(100, 90, struct data, field1),
|
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PACKED_FIELD(90, 87, struct data, field2),
|
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PACKED_FIELD(86, 30, struct data, field3),
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PACKED_FIELD(29, 0, struct data, field4),
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};
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void unpack_your_data(const packed_buf_t *buf, struct data *unpacked)
|
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{
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BUILD_BUG_ON(sizeof(*buf) != SIZE;
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unpack_fields(buf, sizeof(*buf), unpacked, fields,
|
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QUIRK_LITTLE_ENDIAN);
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}
|
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|
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void pack_your_data(const struct data *unpacked, packed_buf_t *buf)
|
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{
|
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BUILD_BUG_ON(sizeof(*buf) != SIZE;
|
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|
||||
pack_fields(buf, sizeof(*buf), unpacked, fields,
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QUIRK_LITTLE_ENDIAN);
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}
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@@ -166,11 +166,11 @@ unevaluatedProperties: false
|
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examples:
|
||||
- |
|
||||
ethmac: ethernet@c9410000 {
|
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compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
|
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reg = <0xc9410000 0x10000>, <0xc8834540 0x8>;
|
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interrupts = <8>;
|
||||
interrupt-names = "macirq";
|
||||
clocks = <&clk_eth>, <&clk_fclk_div2>, <&clk_mpll2>, <&clk_fclk_div2>;
|
||||
clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
|
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phy-mode = "rgmii";
|
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compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
|
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reg = <0xc9410000 0x10000>, <0xc8834540 0x8>;
|
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interrupts = <8>;
|
||||
interrupt-names = "macirq";
|
||||
clocks = <&clk_eth>, <&clk_fclk_div2>, <&clk_mpll2>, <&clk_fclk_div2>;
|
||||
clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
||||
@@ -63,8 +63,8 @@ examples:
|
||||
#size-cells = <0>;
|
||||
|
||||
ethernet@1 {
|
||||
compatible = "usbb95,772b";
|
||||
reg = <1>;
|
||||
compatible = "usbb95,772b";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -101,7 +101,10 @@ properties:
|
||||
max-speed: true
|
||||
|
||||
firmware-name:
|
||||
description: specify the name of nvm firmware to load
|
||||
minItems: 1
|
||||
items:
|
||||
- description: specify the name of nvm firmware to load
|
||||
- description: specify the name of rampatch firmware to load
|
||||
|
||||
local-bd-address: true
|
||||
|
||||
@@ -154,16 +157,11 @@ allOf:
|
||||
- qcom,wcn6750-bt
|
||||
then:
|
||||
required:
|
||||
- enable-gpios
|
||||
- swctrl-gpios
|
||||
- vddio-supply
|
||||
- vddaon-supply
|
||||
- vddbtcxmx-supply
|
||||
- vddrfacmn-supply
|
||||
- vddrfa0p8-supply
|
||||
- vddrfa1p7-supply
|
||||
- vddrfa1p2-supply
|
||||
- vddasd-supply
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@@ -85,16 +85,16 @@ examples:
|
||||
#size-cells = <1>;
|
||||
|
||||
mdio0: mdio@e14 {
|
||||
compatible = "brcm,genet-mdio-v4";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0xe14 0x8>;
|
||||
compatible = "brcm,genet-mdio-v4";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0xe14 0x8>;
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
phy1: ethernet-phy@1 {
|
||||
max-speed = <1000>;
|
||||
reg = <1>;
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -110,10 +110,10 @@ examples:
|
||||
interrupts = <0x0 0x16 0x0>, <0x0 0x17 0x0>;
|
||||
|
||||
mdio1: mdio@e14 {
|
||||
compatible = "brcm,genet-mdio-v4";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0xe14 0x8>;
|
||||
compatible = "brcm,genet-mdio-v4";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0xe14 0x8>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -129,15 +129,15 @@ examples:
|
||||
interrupts = <0x0 0x18 0x0>, <0x0 0x19 0x0>;
|
||||
|
||||
mdio2: mdio@e14 {
|
||||
compatible = "brcm,genet-mdio-v4";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0xe14 0x8>;
|
||||
compatible = "brcm,genet-mdio-v4";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0xe14 0x8>;
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
phy0: ethernet-phy@0 {
|
||||
max-speed = <1000>;
|
||||
reg = <0>;
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -38,43 +38,43 @@ unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
mdio_mux_iproc: mdio-mux@66020000 {
|
||||
mdio-mux@66020000 {
|
||||
compatible = "brcm,mdio-mux-iproc";
|
||||
reg = <0x66020000 0x250>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mdio@0 {
|
||||
reg = <0x0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pci_phy0: pci-phy@0 {
|
||||
compatible = "brcm,ns2-pcie-phy";
|
||||
reg = <0x0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
pci-phy@0 {
|
||||
compatible = "brcm,ns2-pcie-phy";
|
||||
reg = <0x0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
mdio@7 {
|
||||
reg = <0x7>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x7>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pci_phy1: pci-phy@0 {
|
||||
compatible = "brcm,ns2-pcie-phy";
|
||||
reg = <0x0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
pci-phy@0 {
|
||||
compatible = "brcm,ns2-pcie-phy";
|
||||
reg = <0x0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
mdio@10 {
|
||||
reg = <0x10>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x10>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gphy0: eth-phy@10 {
|
||||
reg = <0x10>;
|
||||
};
|
||||
eth-phy@10 {
|
||||
reg = <0x10>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -0,0 +1,58 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/can/atmel,at91sam9263-can.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Microchip AT91 CAN Controller
|
||||
|
||||
maintainers:
|
||||
- Nicolas Ferre <nicolas.ferre@microchip.com>
|
||||
|
||||
allOf:
|
||||
- $ref: can-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- enum:
|
||||
- atmel,at91sam9263-can
|
||||
- atmel,at91sam9x5-can
|
||||
- items:
|
||||
- enum:
|
||||
- microchip,sam9x60-can
|
||||
- const: atmel,at91sam9x5-can
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: can_clk
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/clock/at91.h>
|
||||
can@f000c000 {
|
||||
compatible = "atmel,at91sam9263-can";
|
||||
reg = <0xf000c000 0x300>;
|
||||
interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
|
||||
clock-names = "can_clk";
|
||||
};
|
||||
@@ -1,15 +0,0 @@
|
||||
* AT91 CAN *
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "atmel,at91sam9263-can", "atmel,at91sam9x5-can" or
|
||||
"microchip,sam9x60-can"
|
||||
- reg: Should contain CAN controller registers location and length
|
||||
- interrupts: Should contain IRQ line for the CAN controller
|
||||
|
||||
Example:
|
||||
|
||||
can0: can@f000c000 {
|
||||
compatible = "atmel,at91sam9x5-can";
|
||||
reg = <0xf000c000 0x300>;
|
||||
interrupts = <40 4 5>
|
||||
};
|
||||
@@ -99,11 +99,11 @@ examples:
|
||||
#include <dt-bindings/reset/altr,rst-mgr.h>
|
||||
|
||||
can@ffc00000 {
|
||||
compatible = "bosch,d_can";
|
||||
reg = <0xffc00000 0x1000>;
|
||||
interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>;
|
||||
clocks = <&can0_clk>;
|
||||
resets = <&rst CAN0_RESET>;
|
||||
compatible = "bosch,d_can";
|
||||
reg = <0xffc00000 0x1000>;
|
||||
interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>;
|
||||
clocks = <&can0_clk>;
|
||||
resets = <&rst CAN0_RESET>;
|
||||
};
|
||||
- |
|
||||
can@0 {
|
||||
|
||||
@@ -56,15 +56,15 @@ examples:
|
||||
#size-cells = <0>;
|
||||
|
||||
can@1 {
|
||||
compatible = "microchip,mcp2515";
|
||||
reg = <1>;
|
||||
clocks = <&clk24m>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
|
||||
vdd-supply = <®5v0>;
|
||||
xceiver-supply = <®5v0>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
compatible = "microchip,mcp2515";
|
||||
reg = <1>;
|
||||
clocks = <&clk24m>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
|
||||
vdd-supply = <®5v0>;
|
||||
xceiver-supply = <®5v0>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -15,7 +15,11 @@ allOf:
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: microchip,mpfs-can
|
||||
oneOf:
|
||||
- items:
|
||||
- const: microchip,pic64gx-can
|
||||
- const: microchip,mpfs-can
|
||||
- const: microchip,mpfs-can
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@@ -63,7 +63,7 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
st,gcan:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
The phandle to the gcan node which allows to access the 512-bytes
|
||||
SRAM memory shared by the two bxCAN cells (CAN1 primary and CAN2
|
||||
|
||||
@@ -1,48 +0,0 @@
|
||||
Texas Instruments TCAN4x5x CAN Controller
|
||||
================================================
|
||||
|
||||
This file provides device node information for the TCAN4x5x interface contains.
|
||||
|
||||
Required properties:
|
||||
- compatible:
|
||||
"ti,tcan4552", "ti,tcan4x5x"
|
||||
"ti,tcan4553", "ti,tcan4x5x" or
|
||||
"ti,tcan4x5x"
|
||||
- reg: 0
|
||||
- #address-cells: 1
|
||||
- #size-cells: 0
|
||||
- spi-max-frequency: Maximum frequency of the SPI bus the chip can
|
||||
operate at should be less than or equal to 18 MHz.
|
||||
- interrupt-parent: the phandle to the interrupt controller which provides
|
||||
the interrupt.
|
||||
- interrupts: interrupt specification for data-ready.
|
||||
|
||||
See Documentation/devicetree/bindings/net/can/bosch,m_can.yaml for additional
|
||||
required property details.
|
||||
|
||||
Optional properties:
|
||||
- reset-gpios: Hardwired output GPIO. If not defined then software
|
||||
reset.
|
||||
- device-state-gpios: Input GPIO that indicates if the device is in
|
||||
a sleep state or if the device is active. Not
|
||||
available with tcan4552/4553.
|
||||
- device-wake-gpios: Wake up GPIO to wake up the TCAN device. Not
|
||||
available with tcan4552/4553.
|
||||
- wakeup-source: Leave the chip running when suspended, and configure
|
||||
the RX interrupt to wake up the device.
|
||||
|
||||
Example:
|
||||
tcan4x5x: tcan4x5x@0 {
|
||||
compatible = "ti,tcan4x5x";
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
spi-max-frequency = <10000000>;
|
||||
bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
|
||||
device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
|
||||
device-wake-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
|
||||
wakeup-source;
|
||||
};
|
||||
199
Documentation/devicetree/bindings/net/can/ti,tcan4x5x.yaml
Normal file
199
Documentation/devicetree/bindings/net/can/ti,tcan4x5x.yaml
Normal file
@@ -0,0 +1,199 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/can/ti,tcan4x5x.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Texas Instruments TCAN4x5x CAN Controller
|
||||
|
||||
maintainers:
|
||||
- Marc Kleine-Budde <mkl@pengutronix.de>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- ti,tcan4552
|
||||
- ti,tcan4553
|
||||
- const: ti,tcan4x5x
|
||||
- const: ti,tcan4x5x
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
description: The GPIO parent interrupt.
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: cclk
|
||||
|
||||
reset-gpios:
|
||||
description: Hardwired output GPIO. If not defined then software reset.
|
||||
maxItems: 1
|
||||
|
||||
device-state-gpios:
|
||||
description:
|
||||
Input GPIO that indicates if the device is in a sleep state or if the
|
||||
device is active. Not available with tcan4552/4553.
|
||||
maxItems: 1
|
||||
|
||||
device-wake-gpios:
|
||||
description:
|
||||
Wake up GPIO to wake up the TCAN device.
|
||||
Not available with tcan4552/4553.
|
||||
maxItems: 1
|
||||
|
||||
bosch,mram-cfg:
|
||||
description: |
|
||||
Message RAM configuration data.
|
||||
Multiple M_CAN instances can share the same Message RAM
|
||||
and each element(e.g Rx FIFO or Tx Buffer and etc) number
|
||||
in Message RAM is also configurable, so this property is
|
||||
telling driver how the shared or private Message RAM are
|
||||
used by this M_CAN controller.
|
||||
|
||||
The format should be as follows:
|
||||
<offset sidf_elems xidf_elems rxf0_elems rxf1_elems rxb_elems txe_elems txb_elems>
|
||||
The 'offset' is an address offset of the Message RAM where
|
||||
the following elements start from. This is usually set to
|
||||
0x0 if you're using a private Message RAM. The remain cells
|
||||
are used to specify how many elements are used for each FIFO/Buffer.
|
||||
|
||||
M_CAN includes the following elements according to user manual:
|
||||
11-bit Filter 0-128 elements / 0-128 words
|
||||
29-bit Filter 0-64 elements / 0-128 words
|
||||
Rx FIFO 0 0-64 elements / 0-1152 words
|
||||
Rx FIFO 1 0-64 elements / 0-1152 words
|
||||
Rx Buffers 0-64 elements / 0-1152 words
|
||||
Tx Event FIFO 0-32 elements / 0-64 words
|
||||
Tx Buffers 0-32 elements / 0-576 words
|
||||
|
||||
Please refer to 2.4.1 Message RAM Configuration in Bosch
|
||||
M_CAN user manual for details.
|
||||
$ref: /schemas/types.yaml#/definitions/int32-array
|
||||
items:
|
||||
- description: The 'offset' is an address offset of the Message RAM where
|
||||
the following elements start from. This is usually set to 0x0 if
|
||||
you're using a private Message RAM.
|
||||
default: 0
|
||||
- description: 11-bit Filter 0-128 elements / 0-128 words
|
||||
minimum: 0
|
||||
maximum: 128
|
||||
- description: 29-bit Filter 0-64 elements / 0-128 words
|
||||
minimum: 0
|
||||
maximum: 64
|
||||
- description: Rx FIFO 0 0-64 elements / 0-1152 words
|
||||
minimum: 0
|
||||
maximum: 64
|
||||
- description: Rx FIFO 1 0-64 elements / 0-1152 words
|
||||
minimum: 0
|
||||
maximum: 64
|
||||
- description: Rx Buffers 0-64 elements / 0-1152 words
|
||||
minimum: 0
|
||||
maximum: 64
|
||||
- description: Tx Event FIFO 0-32 elements / 0-64 words
|
||||
minimum: 0
|
||||
maximum: 32
|
||||
- description: Tx Buffers 0-32 elements / 0-576 words
|
||||
minimum: 0
|
||||
maximum: 32
|
||||
minItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
description:
|
||||
Must be half or less of "clocks" frequency.
|
||||
maximum: 18000000
|
||||
|
||||
ti,nwkrq-voltage-vio:
|
||||
type: boolean
|
||||
description:
|
||||
nWKRQ Pin GPO buffer voltage configuration.
|
||||
Set nWKRQ to use VIO voltage rail.
|
||||
When not set nWKRQ will use internal voltage rail.
|
||||
|
||||
wakeup-source:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Enable CAN remote wakeup.
|
||||
|
||||
allOf:
|
||||
- $ref: can-controller.yaml#
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- ti,tcan4552
|
||||
- ti,tcan4553
|
||||
then:
|
||||
properties:
|
||||
device-state-gpios: false
|
||||
device-wake-gpios: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- bosch,mram-cfg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
can@0 {
|
||||
compatible = "ti,tcan4x5x";
|
||||
reg = <0>;
|
||||
clocks = <&can0_osc>;
|
||||
clock-names = "cclk";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&can0_pins>;
|
||||
spi-max-frequency = <10000000>;
|
||||
bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
|
||||
device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
|
||||
device-wake-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
|
||||
ti,nwkrq-voltage-vio;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
can@0 {
|
||||
compatible = "ti,tcan4552", "ti,tcan4x5x";
|
||||
reg = <0>;
|
||||
clocks = <&can0_osc>;
|
||||
clock-names = "cclk";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&can0_pins>;
|
||||
spi-max-frequency = <10000000>;
|
||||
bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
|
||||
reset-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
@@ -129,6 +129,24 @@ properties:
|
||||
minimum: 0
|
||||
maximum: 383
|
||||
|
||||
rx-internal-delay-ps:
|
||||
description:
|
||||
RGMII Receive Clock Delay defined in pico seconds, used to select
|
||||
the DLL phase shift between 1000 ps (45 degree shift at 1Gbps) and
|
||||
3300 ps (147 degree shift at 1Gbps). A value of 0 ps will disable
|
||||
any delay. The Default is no delay.
|
||||
enum: [0, 1000, 1700, 2000, 2500, 3000, 3300]
|
||||
default: 0
|
||||
|
||||
tx-internal-delay-ps:
|
||||
description:
|
||||
RGMII Transmit Clock Delay defined in pico seconds, used to select
|
||||
the DLL phase shift between 1000 ps (45 degree shift at 1Gbps) and
|
||||
3300 ps (147 degree shift at 1Gbps). A value of 0 ps will disable
|
||||
any delay. The Default is no delay.
|
||||
enum: [0, 1000, 1700, 2000, 2500, 3000, 3300]
|
||||
default: 0
|
||||
|
||||
required:
|
||||
- reg
|
||||
- phys
|
||||
|
||||
105
Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml
Normal file
105
Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml
Normal file
@@ -0,0 +1,105 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright 2021-2024 NXP
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/nxp,s32-dwmac.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NXP S32G2xx/S32G3xx/S32R45 GMAC ethernet controller
|
||||
|
||||
maintainers:
|
||||
- Jan Petrous (OSS) <jan.petrous@oss.nxp.com>
|
||||
|
||||
description:
|
||||
This device is a Synopsys DWC IP, integrated on NXP S32G/R SoCs.
|
||||
The SoC series S32G2xx and S32G3xx feature one DWMAC instance,
|
||||
the SoC S32R45 has two instances. The devices can use RGMII/RMII/MII
|
||||
interface over Pinctrl device or the output can be routed
|
||||
to the embedded SerDes for SGMII connectivity.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- const: nxp,s32g2-dwmac
|
||||
- items:
|
||||
- enum:
|
||||
- nxp,s32g3-dwmac
|
||||
- nxp,s32r45-dwmac
|
||||
- const: nxp,s32g2-dwmac
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: Main GMAC registers
|
||||
- description: GMAC PHY mode control register
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
interrupt-names:
|
||||
const: macirq
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Main GMAC clock
|
||||
- description: Transmit clock
|
||||
- description: Receive clock
|
||||
- description: PTP reference clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: stmmaceth
|
||||
- const: tx
|
||||
- const: rx
|
||||
- const: ptp_ref
|
||||
|
||||
required:
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
allOf:
|
||||
- $ref: snps,dwmac.yaml#
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
bus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
ethernet@4033c000 {
|
||||
compatible = "nxp,s32g2-dwmac";
|
||||
reg = <0x0 0x4033c000 0x0 0x2000>, /* gmac IP */
|
||||
<0x0 0x4007c004 0x0 0x4>; /* GMAC_0_CTRL_STS */
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq";
|
||||
snps,mtl-rx-config = <&mtl_rx_setup>;
|
||||
snps,mtl-tx-config = <&mtl_tx_setup>;
|
||||
clocks = <&clks 24>, <&clks 17>, <&clks 16>, <&clks 15>;
|
||||
clock-names = "stmmaceth", "tx", "rx", "ptp_ref";
|
||||
phy-mode = "rgmii-id";
|
||||
phy-handle = <&phy0>;
|
||||
|
||||
mtl_rx_setup: rx-queues-config {
|
||||
snps,rx-queues-to-use = <5>;
|
||||
};
|
||||
|
||||
mtl_tx_setup: tx-queues-config {
|
||||
snps,tx-queues-to-use = <5>;
|
||||
};
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,dwmac-mdio";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -239,7 +239,7 @@ examples:
|
||||
|
||||
qcom,gsi-loader = "self";
|
||||
memory-region = <&ipa_fw_mem>;
|
||||
firmware-name = "qcom/sc7180-trogdor/modem/modem.mdt";
|
||||
firmware-name = "qcom/sc7180-trogdor/modem/modem.mbn";
|
||||
|
||||
iommus = <&apps_smmu 0x440 0x0>,
|
||||
<&apps_smmu 0x442 0x0>;
|
||||
|
||||
@@ -67,6 +67,7 @@ properties:
|
||||
- ingenic,x2000-mac
|
||||
- loongson,ls2k-dwmac
|
||||
- loongson,ls7a-dwmac
|
||||
- nxp,s32g2-dwmac
|
||||
- qcom,qcs404-ethqos
|
||||
- qcom,sa8775p-ethqos
|
||||
- qcom,sc8280xp-ethqos
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user