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pinctrl: renesas: Annotate sentinels in tables

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It does not make sense to have a comma after a sentinel, as any new
elements must be added before the sentinel.  Hence drop all such commas.

Add comments to clarify the purpose of the empty elements.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/845f1d8285dd44522af1b0f429d4c6bd4759eb9e.1678272180.git.geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven
2023-03-08 11:44:27 +01:00
parent 3c2465067f
commit 0256b6aeee
36 changed files with 78 additions and 80 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/pinctrl/renesas/core.c
View File

@@ -645,7 +645,7 @@ static const struct of_device_id sh_pfc_of_table[] = {
.data = &sh73a0_pinmux_info,
},
#endif
{ },
{ /* sentinel */ }
};
#endif
@@ -1411,7 +1411,7 @@ static const struct platform_device_id sh_pfc_id_table[] = {
#ifdef CONFIG_PINCTRL_PFC_SHX3
{ "pfc-shx3", (kernel_ulong_t)&shx3_pinmux_info },
#endif
{ },
{ /* sentinel */ }
};
static struct platform_driver sh_pfc_driver = {

2
drivers/pinctrl/renesas/pfc-emev2.c
View File

@@ -1644,7 +1644,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
FN_SEL_HSI_1_0_00, FN_SEL_HSI_1_0_01, 0, 0,
))
},
{ },
{ /* sentinel */ }
};
const struct sh_pfc_soc_info emev2_pinmux_info = {

4
drivers/pinctrl/renesas/pfc-r8a73a4.c
View File

@@ -2384,7 +2384,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
MSEL8CR_00_0, MSEL8CR_00_1,
))
},
{ },
{ /* sentinel */ }
};
static const struct pinmux_data_reg pinmux_data_regs[] = {
@@ -2510,7 +2510,7 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT323_DATA, PORT322_DATA, PORT321_DATA, PORT320_DATA,
))
},
{ },
{ /* sentinel */ }
};
static const struct pinmux_irq pinmux_irqs[] = {

4
drivers/pinctrl/renesas/pfc-r8a7740.c
View File

@@ -3348,7 +3348,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
MSEL5CR_0_0, MSEL5CR_0_1,
))
},
{ },
{ /* sentinel */ }
};
static const struct pinmux_data_reg pinmux_data_regs[] = {
@@ -3452,7 +3452,7 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
0, 0, 0, 0,
0, 0, 0, 0 ))
},
{ },
{ /* sentinel */ }
};
static const struct pinmux_irq pinmux_irqs[] = {

2
drivers/pinctrl/renesas/pfc-r8a77470.c
View File

@@ -3252,7 +3252,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
/* SEL_SSI0 [2] */
FN_SEL_SSI0_0, FN_SEL_SSI0_1, 0, 0, ))
},
{ },
{ /* sentinel */ }
};
static int r8a77470_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)

4
drivers/pinctrl/renesas/pfc-r8a7778.c
View File

@@ -2832,7 +2832,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
FN_SEL_I2C1_A, FN_SEL_I2C1_B,
))
},
{ },
{ /* sentinel */ }
};
static const struct pinmux_bias_reg pinmux_bias_regs[] = {
@@ -3040,7 +3040,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
[30] = SH_PFC_PIN_NONE,
[31] = SH_PFC_PIN_NONE,
} },
{ /* sentinel */ },
{ /* sentinel */ }
};
static const struct sh_pfc_soc_operations r8a7778_pfc_ops = {

2
drivers/pinctrl/renesas/pfc-r8a7779.c
View File

@@ -3919,7 +3919,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
/* SEL_I2C1 [2] */
FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, FN_SEL_I2C1_3 ))
},
{ },
{ /* sentinel */ }
};
const struct sh_pfc_soc_info r8a7779_pinmux_info = {

2
drivers/pinctrl/renesas/pfc-r8a7790.c
View File

@@ -5824,7 +5824,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
/* SEL_I2C1 [2] */
FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, 0, ))
},
{ },
{ /* sentinel */ }
};
static int r8a7790_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)

4
drivers/pinctrl/renesas/pfc-r8a7791.c
View File

@@ -6552,7 +6552,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2, 0,
/* RESERVED [6] */ ))
},
{ },
{ /* sentinel */ }
};
static int r8a7791_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
@@ -6874,7 +6874,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
[30] = SH_PFC_PIN_NONE,
[31] = SH_PFC_PIN_NONE,
} },
{ /* sentinel */ },
{ /* sentinel */ }
};
static const struct sh_pfc_soc_operations r8a7791_pfc_ops = {

2
drivers/pinctrl/renesas/pfc-r8a7792.c
View File

@@ -2625,7 +2625,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
/* IP7_1_0 [2] */
FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, 0 ))
},
{ },
{ /* sentinel */ }
};
static const struct pinmux_bias_reg pinmux_bias_regs[] = {

2
drivers/pinctrl/renesas/pfc-r8a7794.c
View File

@@ -5512,7 +5512,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
FN_SEL_SSI9_0, FN_SEL_SSI9_1,
/* RESERVED [12] */ ))
},
{ },
{ /* sentinel */ }
};
static int r8a7794_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)

8
drivers/pinctrl/renesas/pfc-r8a77951.c
View File

@@ -5610,7 +5610,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
/* RESERVED 16-1 */
MOD_SEL2_0 ))
},
{ },
{ /* sentinel */ }
};
static const struct pinmux_drive_reg pinmux_drive_regs[] = {
@@ -5861,7 +5861,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(6, 30), 8, 3 }, /* GP6_30/USB2_CH3_PWEN */
{ RCAR_GP_PIN(6, 31), 4, 3 }, /* GP6_31/USB2_CH3_OVC */
} },
{ },
{ /* sentinel */ }
};
enum ioctrl_regs {
@@ -5872,7 +5872,7 @@ enum ioctrl_regs {
static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[POCCTRL] = { 0xe6060380, },
[TDSELCTRL] = { 0xe60603c0, },
{ /* sentinel */ },
{ /* sentinel */ }
};
static int r8a77951_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
@@ -6129,7 +6129,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
[30] = SH_PFC_PIN_NONE,
[31] = SH_PFC_PIN_NONE,
} },
{ /* sentinel */ },
{ /* sentinel */ }
};
static const struct sh_pfc_soc_operations r8a77951_pfc_ops = {

8
drivers/pinctrl/renesas/pfc-r8a7796.c
View File

@@ -5565,7 +5565,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
/* RESERVED 16-1 */
MOD_SEL2_0 ))
},
{ },
{ /* sentinel */ }
};
static const struct pinmux_drive_reg pinmux_drive_regs[] = {
@@ -5813,7 +5813,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(6, 30), 8, 3 }, /* GP6_30 */
{ RCAR_GP_PIN(6, 31), 4, 3 }, /* GP6_31 */
} },
{ },
{ /* sentinel */ }
};
enum ioctrl_regs {
@@ -5824,7 +5824,7 @@ enum ioctrl_regs {
static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[POCCTRL] = { 0xe6060380, },
[TDSELCTRL] = { 0xe60603c0, },
{ /* sentinel */ },
{ /* sentinel */ }
};
static int r8a7796_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
@@ -6081,7 +6081,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
[30] = SH_PFC_PIN_NONE,
[31] = SH_PFC_PIN_NONE,
} },
{ /* sentinel */ },
{ /* sentinel */ }
};
static const struct sh_pfc_soc_operations r8a7796_pfc_ops = {

8
drivers/pinctrl/renesas/pfc-r8a77965.c
View File

@@ -5806,7 +5806,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
/* RESERVED 16-1 */
MOD_SEL2_0 ))
},
{ },
{ /* sentinel */ }
};
static const struct pinmux_drive_reg pinmux_drive_regs[] = {
@@ -6054,7 +6054,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(6, 30), 8, 3 }, /* GP6_30 */
{ RCAR_GP_PIN(6, 31), 4, 3 }, /* GP6_31 */
} },
{ },
{ /* sentinel */ }
};
enum ioctrl_regs {
@@ -6065,7 +6065,7 @@ enum ioctrl_regs {
static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[POCCTRL] = { 0xe6060380, },
[TDSELCTRL] = { 0xe60603c0, },
{ /* sentinel */ },
{ /* sentinel */ }
};
static int r8a77965_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
@@ -6322,7 +6322,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
[30] = SH_PFC_PIN_NONE,
[31] = SH_PFC_PIN_NONE,
} },
{ /* sentinel */ },
{ /* sentinel */ }
};
static const struct sh_pfc_soc_operations r8a77965_pfc_ops = {

4
drivers/pinctrl/renesas/pfc-r8a77970.c
View File

@@ -2343,7 +2343,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
MOD_SEL0_1
MOD_SEL0_0 ))
},
{ },
{ /* sentinel */ }
};
enum ioctrl_regs {
@@ -2358,7 +2358,7 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[POCCTRL1] = { 0xe6060384 },
[POCCTRL2] = { 0xe6060388 },
[TDSELCTRL] = { 0xe60603c0, },
{ /* sentinel */ },
{ /* sentinel */ }
};
static int r8a77970_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)

4
drivers/pinctrl/renesas/pfc-r8a77980.c
View File

@@ -2815,7 +2815,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
MOD_SEL0_1
MOD_SEL0_0 ))
},
{ },
{ /* sentinel */ }
};
enum ioctrl_regs {
@@ -2832,7 +2832,7 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[POCCTRL2] = { 0xe6060388, },
[POCCTRL3] = { 0xe606038c, },
[TDSELCTRL] = { 0xe60603c0, },
{ /* sentinel */ },
{ /* sentinel */ }
};
static int r8a77980_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)

8
drivers/pinctrl/renesas/pfc-r8a77990.c
View File

@@ -5004,7 +5004,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
MOD_SEL1_4
/* RESERVED 3, 2, 1, 0 */ ))
},
{ },
{ /* sentinel */ }
};
static const struct pinmux_drive_reg pinmux_drive_regs[] = {
@@ -5037,7 +5037,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(4, 9), 17, 2 }, /* SD3_DAT7 */
{ RCAR_GP_PIN(4, 10), 14, 2 }, /* SD3_DS */
} },
{ },
{ /* sentinel */ }
};
enum ioctrl_regs {
@@ -5050,7 +5050,7 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[POCCTRL0] = { 0xe6060380, },
[POCCTRL2] = { 0xe6060388, },
[TDSELCTRL] = { 0xe60603c0, },
{ /* sentinel */ },
{ /* sentinel */ }
};
static int r8a77990_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
@@ -5278,7 +5278,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
[30] = RCAR_GP_PIN(6, 9), /* USB30_OVC */
[31] = RCAR_GP_PIN(6, 17), /* USB30_PWEN */
} },
{ /* sentinel */ },
{ /* sentinel */ }
};
static const struct sh_pfc_soc_operations r8a77990_pfc_ops = {

4
drivers/pinctrl/renesas/pfc-r8a77995.c
View File

@@ -2853,7 +2853,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
MOD_SEL1_26
/* RESERVED 25-0 */ ))
},
{ },
{ /* sentinel */ }
};
enum ioctrl_regs {
@@ -2866,7 +2866,7 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[POCCTRL0] = { 0xe6060380, },
[POCCTRL2] = { 0xe6060388, },
[TDSELCTRL] = { 0xe60603c0, },
{ /* sentinel */ },
{ /* sentinel */ }
};

8
drivers/pinctrl/renesas/pfc-r8a779a0.c
View File

@@ -3630,7 +3630,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
MOD_SEL2_3_2
/* RESERVED 1-0 */ ))
},
{ },
{ /* sentinel */ }
};
static const struct pinmux_drive_reg pinmux_drive_regs[] = {
@@ -3935,7 +3935,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(9, 17), 4, 3 }, /* AVB5_LINK */
{ RCAR_GP_PIN(9, 16), 0, 3 }, /* AVB5_PHY_INT */
} },
{ },
{ /* sentinel */ }
};
enum ioctrl_regs {
@@ -3962,7 +3962,7 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[POC8] = { 0xe60690a0, },
[POC9] = { 0xe60698a0, },
[TD1SEL0] = { 0xe6058124, },
{ /* sentinel */ },
{ /* sentinel */ }
};
static int r8a779a0_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
@@ -4349,7 +4349,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
[30] = SH_PFC_PIN_NONE,
[31] = SH_PFC_PIN_NONE,
} },
{ /* sentinel */ },
{ /* sentinel */ }
};
static const struct sh_pfc_soc_operations r8a779a0_pfc_ops = {

8
drivers/pinctrl/renesas/pfc-r8a779f0.c
View File

@@ -1784,7 +1784,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
MOD_SEL1_3_2
MOD_SEL1_1_0))
},
{ /* sentinel */ },
{ /* sentinel */ }
};
static const struct pinmux_drive_reg pinmux_drive_regs[] = {
@@ -1896,7 +1896,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(3, 17), 4, 3 }, /* TSN0_AVTP_MATCH_B */
{ RCAR_GP_PIN(3, 16), 0, 3 }, /* TSN0_AVTP_PPS */
} },
{ /* sentinel */ },
{ /* sentinel */ }
};
enum ioctrl_regs {
@@ -1911,7 +1911,7 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[POC1] = { 0xe60508a0, },
[POC3] = { 0xe60518a0, },
[TD0SEL1] = { 0xe6050920, },
{ /* sentinel */ },
{ /* sentinel */ }
};
static int r8a779f0_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
@@ -2070,7 +2070,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
[30] = SH_PFC_PIN_NONE,
[31] = SH_PFC_PIN_NONE,
} },
{ /* sentinel */ },
{ /* sentinel */ }
};
static const struct sh_pfc_soc_operations r8a779f0_pfc_ops = {

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