22 Commits

Author SHA1 Message Date
Ard Biesheuvel
b93aa851aa DeveloperBox: implement measured boot
Enable the various components, library class resolutions and PCD defaults
to enable measured boot based on a version 2 TPM. The TPM is exposed as
having a memory mapped TIS frame, which is accomplished using the SPI
command sequencer that is available on this platform. Note that this
requires SCP firmware support.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2020-04-06 16:30:16 +02:00
Shenglei Zhang
da26ee3a95 Platform/DeveloperBox: Update DSC/FDF to use NetworkPkg DSC/FDF
This patch updates the platform DSC/FDF files to use the include fragment
files provided by NetworkPkg.

Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2019-05-24 14:09:22 +08:00
Michael D Kinney
6fd90344c0 Platform/Socionext: Replace BSD License with BSD+Patent License
https://bugzilla.tianocore.org/show_bug.cgi?id=1373

Replace BSD 2-Clause License with BSD+Patent License.  This change is
based on the following emails:

  https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html
  https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html

RFCs with detailed process for the license change:

  V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html
  V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html
  V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html

Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2019-05-17 14:22:13 -07:00
Dandan Bi
c08d3d0931 Platform: Remove TIANOCOMPRESSED rule
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1722

TIANOCOMPRESSED rule in fdf is not used, so remove it.

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2019-05-09 12:33:38 +01:00
Ard Biesheuvel
1fd7b43c8d Platform/DeveloperBox: conditionally include the X64 PE/COFF emulator
Add the X64 emulator to the build if '-D X64EMU_ENABLE=TRUE' is passed
on the build command line. Note that this only works on AARCH64 builds.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2019-04-24 15:45:25 +02:00
Ard Biesheuvel
d571b43f87 Platform/DeveloperBox: add MM based UEFI secure boot support
This implements support for UEFI secure boot on DeveloperBox using
the standalone MM framework. This moves all of the software handling
of the UEFI authenticated variable store into the standalone MM
context residing in a secure partition.

Note that SynQuacer as configured today is not a truly secure
platform, since the NOR flash registers are accessible to the
non-secure world. However, from a software point of view, all
of the required pieces are in place. (In particular, it is no
longer possible for the OS to stub out authentication checks
in the validation code residing in RuntimeServicesCode regions)

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2019-01-21 18:39:54 +01:00
Ard Biesheuvel
36d0f117e1 Platform/Socionext/DeveloperBox: disable EbcDxe for ARM builds
EBC and 32-bit ARM are fundamentally incompatible, so only enable
it on AArch64 builds.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2019-01-16 21:41:00 +01:00
Sumit Garg
dc6b5ef8a6 Silicon/SynQuacer: add OP-TEE based RNG driver
This driver uses OpteeLib to interface with OP-TEE based RNG service
(pseudo trusted application) to implement EFI_RNG_PROTOCOL that is used
to seed kernel entropy pool.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-12-20 10:21:41 +01:00
Ard Biesheuvel
ba0a48ecf8 Platform/DeveloperBox: enable HTTPS boot
Enable support for HTTPS boot by incorporating the TLS DXE driver into
the build, and the driver that permits enrolling the TLS certificates.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-10-18 15:05:56 +08:00
Ard Biesheuvel
66ae0de97f Platform/DeveloperBox: add PCI serial driver
Add the generic PCI serial driver so UART plugin cards can be used
as the serial console in UEFI.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-05-31 11:55:56 +02:00
Ard Biesheuvel
4ceb3b6bf2 Platform/DeveloperBox: add 96boards/Socionext logo
Add a nice splash screen with the Socionext and 96boards logos.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-05-31 11:55:44 +02:00
Ard Biesheuvel
cc5471c37c Platform/Socionext/DeveloperBox: add SnpDxe driver
Even though the builtin NETSEC controller driver implements the Simple
Network Protocol (SNP) directly, other network controllers connected
via PCIe may be supported by a UNDI driver, which require the generic
SnpDxe driver in order to be usable.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-05-22 17:26:03 +02:00
Ard Biesheuvel
e74f53df8b Platform/Socionext/DeveloperBox: add SMBIOS tables
This adds SMBIOS tables to the DeveloperBox platform describing the
BIOS, system, enclosure, CPUs, caches, PCIe slots and system memory,
which almost amounts to the mandatory minimum as given by the SMBIOS
spec. Only the type 17 structures currently lack detailed information
about the DIMMs: the SPDs are on a I2C bus that is only accessible by
the SCP, and it currently does not share this information.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-03-15 20:36:56 +00:00
Ard Biesheuvel
5ac71442e4 Silicon/SynQuacer/PlatformDxe: add ACPI description of eMMC
Expose a separate ACPI description of the SynQuacer eMMC controller
when both ACPI and eMMC support have been enabled in the HII menu.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
2018-03-15 16:04:30 +00:00
Ard Biesheuvel
3b5091bead Silicon/SynQuacer: add ACPI drivers and tables
Add the ACPI tables describing various parts of the SynQuacer SoC and
its peripherals, and the drivers to expose them to the EvalBoard and
DeveloperBox platforms.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
2018-03-15 16:04:30 +00:00
Ard Biesheuvel
8e55eaa4c6 Silicon/SynQuacer: add stage 2 override translation tables for PCIe
The Designware PCIe IP in the SynQuacer SoC needs a little help to
appear sane to the OS. Not only does it lack a true root port, and
therefore does not perform any filtering whatsoever of type 0 config
TLPs that are not intended for the link peer, it also has trouble
issuing 64-bit wide MMIO accesses, which are often used on MMIO BARs
with memory semantics (e.g., frame buffers).

So let's create a stage 2 mapping covering the entire physical address
space, and remap some ECAM regions and demote write combine attributes
to device/strongly ordered. This is not a water tight fix, but it does
work around the issues in the majority of cases.

(Note that the ECAM remapping can also be addressed in the SMMU mapping
of the PCIe IP exposed to the CPU, but this is currently under
development, and it does not hurt to have it in two places)

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-02-28 08:14:31 +00:00
Ard Biesheuvel
d8e4d45658 Platform/Socionext/DeveloperBox: add 96Boards mezzanine support
Wire up the various drivers for the 96Boards LS connector and the
optional Secure96 mezzanine board.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-02-23 15:58:35 +00:00
Ard Biesheuvel
c733b7ef29 Silicon/Socionext/SynQuacer: add configurable eMMC support
Implement support for the SynQuacer eMMC controller. This involves an
implementation of the SD/MMC override protocol to handle a couple of
quirks that would otherwise prevent this IP from being driven by the
generic SDHCI driver.

Also, add a HII page to the PlatformDxe driver that allows eMMC support
to be enabled, and wire it up for both DeveloperBox and EVB.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-01-30 12:57:27 +00:00
Ard Biesheuvel
89a2566250 Platform/DeveloperBox: wire up RTC support
Add the drivers, library resolutions and PCD settings to enable RTC
support on DeveloperBox. Also, update PlatformDxe to register the
non-discoverable device handles for both I2C controllers.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-25 22:31:36 +00:00
Ard Biesheuvel
71096fc4a8 Silicon/SynQuacer: implement 'clear NVRAM' feature using a DIP switch
Ordinary computers typically have a physical switch or jumper on the
board that allows non-volatile settings to be cleared. Let's implement
the same using DIP switch #1 on block #3, and clear the EFI variable
store if it is set to ON at boot time.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-25 22:25:11 +00:00
Ard Biesheuvel
92093e026f Platform/DeveloperBox: add ConsolePrefDxe driver
In order to improve the 'out of the box' experience when booting
this system with a monitor and keyboard attached, include the serial
console preference driver that prevents the installer GUI to only
appear on the serial port in this case.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17 18:48:12 +00:00
Ard Biesheuvel
1466ed7160 Platform/Socionext: add support for Socionext Developer Box rev 0.1
This adds support for the first working sample of the MZSC2AM board,
revision 0.1

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-11-17 18:48:12 +00:00