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U5SeriesPkg: Deduplicate PlatformPei

Browse Source 
The current (and future) RISC-V platforms share a lot of PlatformPei
code that does not need to be duplicated. If we see that they need to
have different behavior in the future, we can add platform specific
libraires for that specific code.

The upcoming RiscvVirt is only 1205 lines with this patch.
Still way too much. Hopefully MinPlatform will help.

   26 ./RiscvVirt.dec
   13 ./RiscvVirt.uni
   12 ./RiscvVirtPkgExtra.uni
   78 ./VarStore.fdf.inc
   66 ./RiscvVirt.fdf.inc
  654 ./RiscvVirt.dsc
  356 ./RiscvVirt.fdf
 1205 total

Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>

Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
This commit is contained in:
Daniel Schaefer
2021-07-02 20:30:37 +08:00
committed by Abner Chang
parent 2e2517c113
commit cc4bf69fcf
14 changed files with 21 additions and 602 deletions
Download Patch File Download Diff File Expand all files Collapse all files

0
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/Fv.c → Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/Fv.c
View File

11
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/MemDetect.c → Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/MemDetect.c
View File

@@ -1,7 +1,7 @@
/**@file
Memory Detection for Virtual Machines.
Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -46,6 +46,10 @@ PublishPeiMemory (
EFI_PHYSICAL_ADDRESS MemoryBase;
UINT64 MemorySize;
//
// TODO: This value should come from platform
// configuration or the memory sizing code.
//
MemoryBase = 0x80000000UL + 0x1000000UL;
MemorySize = 0x40000000UL - 0x1000000UL; //1GB - 16MB
@@ -69,6 +73,9 @@ InitializeRamRegions (
VOID
)
{
//
// TODO: This value should come from platform
// configuration or the memory sizing code.
//
AddMemoryRangeHob(0x81000000UL, 0x81000000UL + 0x3F000000UL);
}

6
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.c → Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/Platform.c
View File

@@ -199,11 +199,14 @@ MiscInitialization (
// of IO space. (Side note: unlike other HOBs, the CPU HOB is needed during
// S3 resume as well, so we build it unconditionally.)
//
// TODO: Determine this dynamically from the platform
// setting or the HART configuration.
//
BuildCpuHob (48, 32);
}
/**
Check if system retunrs from S3.
Check if system returns from S3.
@return BOOLEAN TRUE, system returned from S3
FALSE, system is not returned from S3
@@ -254,6 +257,7 @@ BuildCoreInformationHob (
EFI_STATUS Status;
RISC_V_PROCESSOR_SMBIOS_HOB_DATA *SmbiosHobPtr;
// TODO: Create SMBIOS libs for non-U540 platforms
Status = CreateU5MCCoreplexProcessorSpecificDataHob (0);
if (EFI_ERROR (Status)) {
ASSERT(FALSE);

0
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/Platform.h → Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/Platform.h
View File

4
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/PlatformPei.inf → Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
View File

@@ -3,7 +3,7 @@
#
# This module provides platform specific function to detect boot mode.
#
# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -62,6 +62,8 @@
gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvBase
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvSize
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamBase
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamSize
gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdNumberofU5Cores
gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdE5MCSupported

2
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
View File

@@ -395,7 +395,7 @@
NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
}
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/PlatformPei.inf {
Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf {
<LibraryClasses>
PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
}

2
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf
View File

@@ -99,7 +99,7 @@ INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
# RISC-V Platform PEI Driver
INF Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/PlatformPei.inf
INF Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
################################################################################

310
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/Platform.c
View File

@@ -1,310 +0,0 @@
/**@file
Platform PEI driver
Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
//
// The package level header files this module uses
//
#include <PiPei.h>
//
// The Library classes this module consumes
//
#include <Library/DebugLib.h>
#include <Library/HobLib.h>
#include <Library/IoLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/PcdLib.h>
#include <Library/PciLib.h>
#include <Library/PeimEntryPoint.h>
#include <Library/PeiServicesLib.h>
#include <Library/ResourcePublicationLib.h>
#include <Guid/MemoryTypeInformation.h>
#include <Ppi/MasterBootMode.h>
#include <IndustryStandard/Pci22.h>
#include <SiFiveU5MCCoreplex.h>
#include "Platform.h"
EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
{ EfiACPIMemoryNVS, 0x004 },
{ EfiACPIReclaimMemory, 0x008 },
{ EfiReservedMemoryType, 0x004 },
{ EfiRuntimeServicesData, 0x024 },
{ EfiRuntimeServicesCode, 0x030 },
{ EfiBootServicesCode, 0x180 },
{ EfiBootServicesData, 0xF00 },
{ EfiMaxMemoryType, 0x000 }
};
EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {
{
EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
&gEfiPeiMasterBootModePpiGuid,
NULL
}
};
STATIC EFI_BOOT_MODE mBootMode = BOOT_WITH_FULL_CONFIGURATION;
VOID
AddIoMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
)
{
BuildResourceDescriptorHob (
EFI_RESOURCE_MEMORY_MAPPED_IO,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED,
MemoryBase,
MemorySize
);
}
VOID
AddReservedMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
)
{
BuildResourceDescriptorHob (
EFI_RESOURCE_MEMORY_RESERVED,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED,
MemoryBase,
MemorySize
);
}
VOID
AddIoMemoryRangeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
)
{
AddIoMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
}
VOID
AddMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
)
{
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED,
MemoryBase,
MemorySize
);
}
VOID
AddMemoryRangeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
)
{
AddMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
}
VOID
AddUntestedMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
)
{
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE,
MemoryBase,
MemorySize
);
}
VOID
AddUntestedMemoryRangeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
)
{
AddUntestedMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
}
VOID
AddPciResource (
VOID
)
{
//
// Platform-specific
//
}
VOID
MemMapInitialization (
VOID
)
{
//
// Create Memory Type Information HOB
//
BuildGuidDataHob (
&gEfiMemoryTypeInformationGuid,
mDefaultMemoryTypeInformation,
sizeof(mDefaultMemoryTypeInformation)
);
//
// Add PCI IO Port space available for PCI resource allocations.
//
AddPciResource ();
}
VOID
MiscInitialization (
VOID
)
{
//
// Build the CPU HOB with guest RAM size dependent address width and 16-bits
// of IO space. (Side note: unlike other HOBs, the CPU HOB is needed during
// S3 resume as well, so we build it unconditionally.)
//
BuildCpuHob (32, 32);
}
/**
Check if system retunrs from S3.
@return BOOLEAN TRUE, system returned from S3
FALSE, system is not returned from S3
**/
BOOLEAN
CheckResumeFromS3 (
VOID
)
{
//
//Platform implementation-specific
//
return FALSE;
}
VOID
BootModeInitialization (
VOID
)
{
EFI_STATUS Status;
if (CheckResumeFromS3 () == TRUE) {
DEBUG ((DEBUG_INFO, "This is wake from S3\n"));
} else {
DEBUG ((DEBUG_INFO, "This is normal boot\n"));
}
Status = PeiServicesSetBootMode (mBootMode);
ASSERT_EFI_ERROR (Status);
Status = PeiServicesInstallPpi (mPpiBootMode);
ASSERT_EFI_ERROR (Status);
}
/**
Build processor information for U54 Coreplex processor.
@return EFI_SUCCESS Status.
**/
EFI_STATUS
BuildCoreInformationHob (
VOID
)
{
EFI_STATUS Status;
RISC_V_PROCESSOR_SMBIOS_HOB_DATA *SmbiosHobPtr;
Status = CreateU5MCCoreplexProcessorSpecificDataHob (0);
if (EFI_ERROR (Status)) {
ASSERT(FALSE);
}
Status = CreateU5MCProcessorSmbiosDataHob (0, &SmbiosHobPtr);
if (EFI_ERROR (Status)) {
ASSERT(FALSE);
}
DEBUG ((DEBUG_INFO, "U5 MC Coreplex SMBIOS DATA HOB at address 0x%x\n", SmbiosHobPtr));
return EFI_SUCCESS;
}
/**
Perform Platform PEI initialization.
@param FileHandle Handle of the file being invoked.
@param PeiServices Describes the list of possible PEI Services.
@return EFI_SUCCESS The PEIM initialized successfully.
**/
EFI_STATUS
EFIAPI
InitializePlatform (
IN EFI_PEI_FILE_HANDLE FileHandle,
IN CONST EFI_PEI_SERVICES **PeiServices
)
{
EFI_STATUS Status;
DEBUG ((DEBUG_INFO, "Platform PEIM Loaded\n"));
BootModeInitialization ();
DEBUG ((DEBUG_INFO, "Platform BOOT mode initiated.\n"));
PublishPeiMemory ();
DEBUG ((DEBUG_INFO, "PEI memory published.\n"));
InitializeRamRegions ();
DEBUG ((DEBUG_INFO, "Platform RAM regions initiated.\n"));
if (mBootMode != BOOT_ON_S3_RESUME) {
PeiFvInitialization ();
MemMapInitialization ();
}
MiscInitialization ();
Status = BuildCoreInformationHob ();
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Fail to build processor informstion HOB.\n"));
ASSERT(FALSE);
}
return EFI_SUCCESS;
}

73
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/PlatformPei.inf
View File

@@ -1,73 +0,0 @@
## @file
# Platform PEI driver
#
# This module provides platform specific function to detect boot mode.
#
# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
[Defines]
INF_VERSION = 0x0001001b
BASE_NAME = PlatformPei
FILE_GUID = 222c386d-5abc-4fb4-b124-fbb82488acf4
MODULE_TYPE = PEIM
VERSION_STRING = 1.0
ENTRY_POINT = InitializePlatform
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = RISCV64
#
[Sources]
Fv.c
MemDetect.c
Platform.c
[Packages]
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
Platform/SiFive/U5SeriesPkg/U5SeriesPkg.dec
Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
Silicon/SiFive/SiFive.dec
UefiCpuPkg/UefiCpuPkg.dec
[Guids]
gEfiMemoryTypeInformationGuid
gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid
[LibraryClasses]
DebugLib
HobLib
IoLib
PciLib
PeiResourcePublicationLib
PeiServicesLib
PeiServicesTablePointerLib
PeimEntryPoint
PcdLib
SiliconSiFiveU5MCCoreplexInfoLib
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration
gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize
gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvBase
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvSize
gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdNumberofU5Cores
gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdE5MCSupported
[Ppis]
gEfiPeiMasterBootModePpiGuid
[Depex]
TRUE

2
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
View File

@@ -394,7 +394,7 @@
NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
}
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/PlatformPei.inf {
Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf {
<LibraryClasses>
PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
}

2
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
View File

@@ -99,7 +99,7 @@ INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
# RISC-V Platform PEI Driver
INF Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/PlatformPei.inf
INF Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
################################################################################

51
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Fv.c
View File

@@ -1,51 +0,0 @@
/** @file
Build FV related hobs for platform.
Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "PiPei.h"
#include "Platform.h"
#include <Library/DebugLib.h>
#include <Library/HobLib.h>
#include <Library/PcdLib.h>
#include <Library/PeiServicesLib.h>
/**
Publish PEI & DXE (Decompressed) Memory based FVs to let PEI
and DXE know about them.
@retval EFI_SUCCESS Platform PEI FVs were initialized successfully.
**/
EFI_STATUS
PeiFvInitialization (
VOID
)
{
DEBUG ((DEBUG_INFO, "Platform PEI Firmware Volume Initialization\n"));
//
// Let DXE know about the DXE FV
//
BuildFvHob (PcdGet32 (PcdRiscVDxeFvBase), PcdGet32 (PcdRiscVDxeFvSize));
DEBUG ((DEBUG_INFO, "Platform builds DXE FV at %x, size %x.\n",
PcdGet32 (PcdRiscVDxeFvBase),
PcdGet32 (PcdRiscVDxeFvSize)));
//
// Let PEI know about the DXE FV so it can find the DXE Core
//
PeiServicesInstallFvInfoPpi (
NULL,
(VOID *)(UINTN) PcdGet32 (PcdRiscVDxeFvBase),
PcdGet32 (PcdRiscVDxeFvSize),
NULL,
NULL
);
return EFI_SUCCESS;
}

74
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/MemDetect.c
View File

@@ -1,74 +0,0 @@
/**@file
Memory Detection for Virtual Machines.
Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
Module Name:
MemDetect.c
**/
//
// The package level header files this module uses
//
#include <PiPei.h>
//
// The Library classes this module consumes
//
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/HobLib.h>
#include <Library/IoLib.h>
#include <Library/PcdLib.h>
#include <Library/PeimEntryPoint.h>
#include <Library/ResourcePublicationLib.h>
#include "Platform.h"
/**
Publish PEI core memory
@return EFI_SUCCESS The PEIM initialized successfully.
**/
EFI_STATUS
PublishPeiMemory (
VOID
)
{
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS MemoryBase;
UINT64 MemorySize;
MemoryBase = 0x80000000UL + 0x1000000UL;
MemorySize = 0x40000000UL - 0x1000000UL; //1GB - 16MB
DEBUG((DEBUG_INFO, "%a: MemoryBase:0x%x MemorySize:%x\n", __FUNCTION__, MemoryBase, MemorySize));
//
// Publish this memory to the PEI Core
//
Status = PublishSystemMemory(MemoryBase, MemorySize);
ASSERT_EFI_ERROR (Status);
return Status;
}
/**
Publish system RAM and reserve memory regions
**/
VOID
InitializeRamRegions (
VOID
)
{
AddMemoryRangeHob(0x81000000UL, 0x81000000UL + 0x3F000000UL);
}

86
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.h
View File

@@ -1,86 +0,0 @@
/** @file
Platform PEI module include file.
Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef PLATFORM_PEI_H_INCLUDED_
#define PLATFORM_PEI_H_INCLUDED_
VOID
AddIoMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
);
VOID
AddIoMemoryRangeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
);
VOID
AddMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
);
VOID
AddMemoryRangeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
);
VOID
AddUntestedMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
);
VOID
AddReservedMemoryBaseSizeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
UINT64 MemorySize
);
VOID
AddUntestedMemoryRangeHob (
EFI_PHYSICAL_ADDRESS MemoryBase,
EFI_PHYSICAL_ADDRESS MemoryLimit
);
VOID
AddressWidthInitialization (
VOID
);
EFI_STATUS
PublishPeiMemory (
VOID
);
UINT32
GetSystemMemorySizeBelow4gb (
VOID
);
VOID
InitializeRamRegions (
VOID
);
EFI_STATUS
PeiFvInitialization (
VOID
);
EFI_STATUS
InitializeXen (
VOID
);
#endif // _PLATFORM_PEI_H_INCLUDED_