Platform/Sgi: update _OSC control method to control LPI and CPPC

Define and use the global macro LPI_EN and CPPC_EN to enable low power idle and CPPC support for reference design platforms. Update platform wide _OSC control method to enable/disable low power idle and CPPC support based on pcd PcdOscLpiEnable and PcdOscCppcEnable. The pcds are controlled by the global macros LPI_EN and CPPC_EN. Signed-off-by: Pranav Madhu <pranav.madhu@arm.com> Reviewed-by: Thomas Abraham <thomas.abraham@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2026-03-06 14:51:43 -08:00 · 2021-06-11 16:04:20 +05:30
parent 607665b3f2
commit 5bf71dc897
17 changed files with 115 additions and 0 deletions
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
@@ -29,6 +29,14 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
            And (CAP0, Not (OSC_CAP_OS_INITIATED_LPI), CAP0)
            Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
          }
+
+          If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+            if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
        } Else {
          And (STS0, Not (OSC_STS_MASK), STS0)
          Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
@@ -57,6 +57,7 @@
  gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
  gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
  gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl
@@ -31,6 +31,14 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
            And (CAP0, Not (OSC_CAP_OS_INITIATED_LPI), CAP0)
            Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
          }
+
+          If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+            if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
        } Else {
          And (STS0, Not (OSC_STS_MASK), STS0)
          Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
@@ -66,6 +66,7 @@
  gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
  gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
  gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl
@@ -30,11 +30,26 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
            Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
          }

+          If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+            if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
          If (And (CAP0, OSC_CAP_CPPC_SUPPORT)) {
            /* CPPC revision 1 and below not supported */
            And (CAP0, Not (OSC_CAP_CPPC_SUPPORT), CAP0)
            Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
          }
+
+          If (And (CAP0, OSC_CAP_CPPC2_SUPPORT)) {
+            if (LEqual (FixedPcdGet32 (PcdOscCppcEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_CPPC2_SUPPORT), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
        } Else {
          And (STS0, Not (OSC_STS_MASK), STS0)
          Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
@@ -57,6 +57,8 @@
  gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
  gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
  gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable
+  gArmSgiTokenSpaceGuid.PcdOscCppcEnable
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl
@@ -36,11 +36,26 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
            Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
          }

+          If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+            if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
          If (And (CAP0, OSC_CAP_CPPC_SUPPORT)) {
            /* CPPC revision 1 and below not supported */
            And (CAP0, Not (OSC_CAP_CPPC_SUPPORT), CAP0)
            Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
          }
+
+          If (And (CAP0, OSC_CAP_CPPC2_SUPPORT)) {
+            if (LEqual (FixedPcdGet32 (PcdOscCppcEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_CPPC2_SUPPORT), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
        } Else {
          And (STS0, Not (OSC_STS_MASK), STS0)
          Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf
@@ -57,6 +57,8 @@
  gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
  gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
  gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable
+  gArmSgiTokenSpaceGuid.PcdOscCppcEnable
  gArmSgiTokenSpaceGuid.PcdSmmuBase
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
--- a/Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl
@@ -30,11 +30,26 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
            Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
          }

+          If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+            if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
          If (And (CAP0, OSC_CAP_CPPC_SUPPORT)) {
            /* CPPC revision 1 and below not supported */
            And (CAP0, Not (OSC_CAP_CPPC_SUPPORT), CAP0)
            Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
          }
+
+          If (And (CAP0, OSC_CAP_CPPC2_SUPPORT)) {
+            if (LEqual (FixedPcdGet32 (PcdOscCppcEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_CPPC2_SUPPORT), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
        } Else {
          And (STS0, Not (OSC_STS_MASK), STS0)
          Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
--- a/Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf
@@ -57,6 +57,8 @@
  gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
  gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
  gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable
+  gArmSgiTokenSpaceGuid.PcdOscCppcEnable
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt
--- a/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl
@@ -30,11 +30,26 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
            Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
          }

+          If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+            if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
          If (And (CAP0, OSC_CAP_CPPC_SUPPORT)) {
            /* CPPC revision 1 and below not supported */
            And (CAP0, Not (OSC_CAP_CPPC_SUPPORT), CAP0)
            Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
          }
+
+          If (And (CAP0, OSC_CAP_CPPC2_SUPPORT)) {
+            if (LEqual (FixedPcdGet32 (PcdOscCppcEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_CPPC2_SUPPORT), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
        } Else {
          And (STS0, Not (OSC_STS_MASK), STS0)
          Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
--- a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf
@@ -66,6 +66,8 @@
  gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
  gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
  gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable
+  gArmSgiTokenSpaceGuid.PcdOscCppcEnable
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt
--- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
@@ -28,6 +28,14 @@ DefinitionBlock("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI", EFI_ACPI_ARM_OEM
            And (CAP0, Not (OSC_CAP_OS_INITIATED_LPI), CAP0)
            Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
          }
+
+          If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+            if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
        } Else {
          And (STS0, Not (OSC_STS_MASK), STS0)
          Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
--- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
@@ -57,6 +57,7 @@
  gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
  gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
  gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt
--- a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
+++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
@@ -37,6 +37,8 @@

 // ACPI OSC for Platform-Wide Capability
 #define OSC_CAP_CPPC_SUPPORT          (1U << 5)
+#define OSC_CAP_CPPC2_SUPPORT         (1U << 6)
+#define OSC_CAP_PLAT_COORDINATED_LPI  (1U << 7)
 #define OSC_CAP_OS_INITIATED_LPI      (1U << 8)

 #pragma pack(1)
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -86,5 +86,9 @@
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize|0|UINT32|0x00000023
  gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt|0|UINT32|0x00000024

+  # ACPI platform wide _OSC
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable|0|UINT32|0x00000025
+  gArmSgiTokenSpaceGuid.PcdOscCppcEnable|0|UINT32|0x00000026
+
 [Ppis]
  gNtFwConfigDtInfoPpiGuid     = { 0x6f606eb3, 0x9123, 0x4e15, { 0xa8, 0x9b, 0x0f, 0xac, 0x66, 0xef, 0xd0, 0x17 } }
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -17,6 +17,10 @@
  # To allow HDLCD display using the Graphics Output Protocol, set this to TRUE.
  DEFINE ENABLE_GOP                         = FALSE

+  # To enable LPI and CPPC power management functionality, set this to TRUE.
+  DEFINE LPI_EN                             = FALSE
+  DEFINE CPPC_EN                            = FALSE
+
 [BuildOptions]
  *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES

@@ -108,6 +112,16 @@
  gArmSgiTokenSpaceGuid.PcdDramBlock2Base|0x8080000000
  gArmSgiTokenSpaceGuid.PcdDramBlock2Size|0x180000000

+!if $(LPI_EN) == TRUE
+  # Allow use of LPI in the response to _OSC method call
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable|1
+!endif
+
+!if $(CPPC_EN) == TRUE
+  # Allow use of CPPC in the response to _OSC method call
+  gArmSgiTokenSpaceGuid.PcdOscCppcEnable|1
+!endif
+
  # NV Storage PCDs. Use base of 0x08000000 for NOR0, 0xC0000000 for NOR 1
  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x01400000
  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x01400000