KabylakeOpenBoardPkg: Example of board S3

Use silicon code to detect S3 resume state. Apply some relevant policy modifications. PcdPeiMemSize must be in common scope, for a DXE module to allocate required memory. Libraries that produce required PPIs are defined. BootScriptExecutorDxe should only be linked against a functionally compatible debug stack. Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Ankit Sinha <ankit.sinha@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Jeremy Soller <jeremy@system76.com> Cc: Sai Chaganty <rangasai.v.chaganty@intel.com> Cc: Isaac Oram <isaac.w.oram@intel.com> Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com> Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>
2026-03-06 14:51:43 -08:00 · 2022-09-12 10:12:50 -07:00
parent b83909ef37
commit 4d99e03828
24 changed files with 222 additions and 40 deletions
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
@@ -11,6 +11,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Library/DebugLib.h>
 #include <Library/PciLib.h>
 #include <Library/PeiLib.h>
+#include <Library/PeiServicesLib.h>
+
 #include <FspEas.h>
 #include <FspmUpd.h>
 #include <FspsUpd.h>
@@ -32,11 +34,15 @@ PeiFspMiscUpdUpdatePreMem (
  )
 {
  EFI_STATUS                        Status;
+  EFI_BOOT_MODE                     BootMode;
  UINTN                             VariableSize;
  VOID                              *FspNvsBufferPtr;
  UINT8                             MorControl;
  VOID                              *MorControlPtr;

+  Status = PeiServicesGetBootMode (&BootMode);
+  ASSERT_EFI_ERROR (Status);
+
  //
  // Initialize S3 Data variable (S3DataPtr). It may be used for warm and fast boot paths.
  //
@@ -70,7 +76,11 @@ PeiFspMiscUpdUpdatePreMem (
             &VariableSize
             );
  DEBUG ((DEBUG_INFO, "MorControl - 0x%x (%r)\n", MorControl, Status));
-  if (MOR_CLEAR_MEMORY_VALUE (MorControl)) {
+  //
+  // Do not set CleanMemory on S3 resume
+  // TODO: Handle advanced features later - capsule update is in-memory list
+  //
+  if (MOR_CLEAR_MEMORY_VALUE (MorControl) && BootMode != BOOT_ON_S3_RESUME) {
    FspmUpd->FspmConfig.CleanMemory = (BOOLEAN)(MorControl & MOR_CLEAR_MEMORY_BIT_MASK);
  }

--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
@@ -11,6 +11,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Library/MemoryAllocationLib.h>
 #include <Library/PeiSaPolicyLib.h>
 #include <Library/PeiLib.h>
+#include <Library/PeiServicesLib.h>

 /**
  Performs FSP SA PEI Policy initialization.
@@ -27,12 +28,17 @@ PeiFspSaPolicyUpdate (
  IN OUT FSPS_UPD    *FspsUpd
  )
 {
+  EFI_STATUS                      Status;
+  EFI_BOOT_MODE                   BootMode;
  VOID                            *Buffer;
  VOID                            *MemBuffer;
  UINT32                          Size;

  DEBUG((DEBUG_INFO, "\nUpdating SA Policy in Post Mem\n"));

+  Status = PeiServicesGetBootMode (&BootMode);
+  ASSERT_EFI_ERROR (Status);
+
    FspsUpd->FspsConfig.PeiGraphicsPeimInit = 1;

    Size   = 0;
@@ -40,7 +46,11 @@ PeiFspSaPolicyUpdate (
    PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RAW, 0, &Buffer, &Size);
    if (Buffer == NULL) {
      DEBUG((DEBUG_WARN, "Could not locate VBT\n"));
-    } else {
+    //
+    // Graphics initialization is unnecessary,
+    // OS has present framebuffer.
+    //
+    } else if (BootMode != BOOT_ON_S3_RESUME) {
      MemBuffer = (VOID *)AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Size));
      if ((MemBuffer != NULL) && (Buffer != NULL)) {
        CopyMem (MemBuffer, (VOID *)Buffer, (UINTN)Size);
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiAspireVn7Dash572GInitPreMemLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiAspireVn7Dash572GInitPreMemLib.c
@@ -11,7 +11,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Library/MemoryAllocationLib.h>
 #include <Library/PcdLib.h>
 #include <Library/PchCycleDecodingLib.h>
+#include <Library/PchPmcLib.h>
 #include <Library/PchResetLib.h>
+#include <Library/PciLib.h>
 #include <Library/SiliconInitLib.h>
 #include <Library/TimerLib.h>
 #include <Library/PeiLib.h>
@@ -267,25 +269,31 @@ AspireVn7Dash572GBoardBootModeDetect (
  VOID
  )
 {
-  UINT16         ABase;
+  EFI_BOOT_MODE  BootMode;
  UINT32         SleepType;

  DEBUG ((DEBUG_INFO, "Performing boot mode detection\n"));

-  // TODO: Perform advanced detection (recovery/capsule)
-  // FIXME: This violates PI specification? But BOOT_WITH* would always take precedence
-  //        over BOOT_ON_S{4,5}...
-  PchAcpiBaseGet (&ABase);
-  SleepType = IoRead32 (ABase + R_PCH_ACPI_PM1_CNT) & B_PCH_ACPI_PM1_CNT_SLP_TYP;
+  // Known sane defaults; TODO: Consider "default"?
+  BootMode = BOOT_WITH_FULL_CONFIGURATION;

-  switch (SleepType) {
-    case V_PCH_ACPI_PM1_CNT_S3:
-      return BOOT_ON_S3_RESUME;
-    case V_PCH_ACPI_PM1_CNT_S4:
-      return BOOT_ON_S4_RESUME;
-//    case V_PCH_ACPI_PM1_CNT_S5:
-//      return BOOT_ON_S5_RESUME;
-    default:
-      return BOOT_WITH_FULL_CONFIGURATION;
+  // TODO: Perform advanced detection (capsule/recovery)
+  // TODO: Perform "IsFirstBoot" test with VariablePpi for "minimal"/"assume"
+  if (GetSleepTypeAfterWakeup (&SleepType)) {
+    switch (SleepType) {
+      case V_PCH_ACPI_PM1_CNT_S3:
+        BootMode = BOOT_ON_S3_RESUME;
+        break;
+      case V_PCH_ACPI_PM1_CNT_S4:
+        BootMode = BOOT_ON_S4_RESUME;
+        break;
+      case V_PCH_ACPI_PM1_CNT_S5:
+        BootMode = BOOT_ON_S5_RESUME;
+        break;
+    }
  }
+
+  DEBUG ((DEBUG_INFO, "BootMode is 0x%x\n", BootMode));
+
+  return BootMode;
 }
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
@@ -25,11 +25,14 @@
  TimerLib
  PchCycleDecodingLib
  PchResetLib
+  PciLib
  IoLib
  EcLib
  BoardEcLib
  GpioLib
  PeiLib
+  PeiServicesLib
+  PchPmcLib

 [Packages]
  MinPlatformPkg/MinPlatformPkg.dec
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc
@@ -239,6 +239,7 @@
  # Silicon Package
  #######################################
  ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+  SmmAccessLib|IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSmramc/PeiSmmAccessLib.inf

  #######################################
  # Platform Package
@@ -663,6 +664,26 @@
      !endif
  }

+!if gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable == TRUE
+  MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf {
+    <LibraryClasses>
+      # On S3 resume, RSC is in end-of-BS state
+      # - Moreover: Library cannot effectively use some end-of-BS events
+      DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+      SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
+      # Reverse-ranked priority list
+# TODO: Requires testing
+# - Strongly suspect DebugLibSerialPort constructor presents PeiDxeSerialPortLibMem dependency on services as a bug
+!if FALSE  # $(USE_MEMORY_LOGGING) == TRUE
+      SerialPortLib|MdeModulePkg/Library/PeiDxeSerialPortLibMem/DxeSerialPortLibMem.inf
+!endif
+      # Also, can debug CpuExceptionHandlerLib
+!if $(USE_HDMI_DEBUG_PORT) == TRUE
+      SerialPortLib|$(PLATFORM_BOARD_PACKAGE)/Library/I2cHdmiDebugSerialPortLib/BootScriptExecutorDxeI2cHdmiDebugSerialPortLib.inf
+!endif
+  }
+!endif
+
 !endif

  #######################################
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
@@ -127,10 +127,7 @@
  # PcdIpmiFeatureEnable will not be enabled (no BMC)
  # TODO: Can be build-time (user) choice
  gNetworkFeaturePkgTokenSpaceGuid.PcdNetworkFeatureEnable                |FALSE
-  # TODO: Continue developing support. Broken at present.
-  # - PeiSmmAccessLib in IntelSiliconPkg seems like a stub
-  #   - May require a PeiSmmControlLib to SMM communicate
-  gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable                          |FALSE
+  gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable                          |TRUE
  # TODO: Definitions (now added SmbiosDxe)
  gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosFeatureEnable                  |TRUE
  # Requires actual hook-up
@@ -333,6 +330,7 @@
  gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|4
  gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2
  gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000
+  gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000

  #
  # The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags
@@ -358,13 +356,8 @@
  #      0x7F, 0xFF, 0x04, 0x00}<BR>
  gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleInputDevicePath|{0x02, 0x01, 0x0C, 0x00,  0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00,  0x00, 0x1F, 0x02, 0x01, 0x0C, 0x00,  0xd0, 0x41, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x7F, 0xFF, 0x04, 0x00}

-!if $(TARGET) == RELEASE
-  gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x800
-!else
-  gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x188B  # TODO
-!endif
-  # TODO: Consider using reserved space instead for debug log
-  gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x200
+  gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x4800
+  gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x100
 !if $(TARGET) == RELEASE
  gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x70
 !else
@@ -415,7 +408,6 @@
  # Edk2 Configuration
  ######################################
  gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148
-  gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000

  ######################################
  # Platform Configuration
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c
@@ -20,6 +20,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Library/DebugLib.h>
 #include <Library/ConfigBlockLib.h>
 #include <Library/PeiLib.h>
+#include <Library/PeiServicesLib.h>
 #include <Library/BaseMemoryLib.h>
 #include <Library/MemoryAllocationLib.h>
 #include <Library/CpuPlatformLib.h>
@@ -549,6 +550,7 @@ SiliconPolicyUpdatePostMem (
  )
 {
  EFI_STATUS                      Status;
+  EFI_BOOT_MODE                   BootMode;
  VOID                            *Buffer;
  VOID                            *MemBuffer;
  UINT32                          Size;
@@ -557,6 +559,9 @@ SiliconPolicyUpdatePostMem (

  DEBUG((DEBUG_INFO, "\nUpdating Policy in Post Mem\n"));

+  Status = PeiServicesGetBootMode (&BootMode);
+  ASSERT_EFI_ERROR (Status);
+
  GtConfig = NULL;
  Status = GetConfigBlock ((VOID *) Policy, &gGraphicsPeiConfigGuid, (VOID *)&GtConfig);
  ASSERT_EFI_ERROR (Status);
@@ -571,7 +576,11 @@ SiliconPolicyUpdatePostMem (
    PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RAW, 0, &Buffer, &Size);
    if (Buffer == NULL) {
      DEBUG((DEBUG_WARN, "Could not locate VBT\n"));
-    } else {
+    //
+    // Graphics initialization is unnecessary,
+    // OS has present framebuffer.
+    //
+    } else if (BootMode != BOOT_ON_S3_RESUME) {
      MemBuffer = (VOID *)AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Size));
      if ((MemBuffer != NULL) && (Buffer != NULL)) {
        CopyMem (MemBuffer, (VOID *)Buffer, (UINTN)Size);
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
@@ -23,6 +23,7 @@
  BaseMemoryLib
  MemoryAllocationLib
  PeiLib
+  PeiServicesLib
  CpuPlatformLib
  PchPcieRpLib
  PchInfoLib
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
@@ -11,6 +11,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Library/DebugLib.h>
 #include <Library/PeiLib.h>
 #include <Library/ConfigBlockLib.h>
+#include <Library/PeiServicesLib.h>

 #include <FspEas.h>
 #include <FspmUpd.h>
@@ -36,11 +37,15 @@ PeiFspMiscUpdUpdatePreMem (
  )
 {
  EFI_STATUS                        Status;
+  EFI_BOOT_MODE                     BootMode;
  UINTN                             VariableSize;
  VOID                              *FspNvsBufferPtr;
  UINT8                             MorControl;
  VOID                              *MorControlPtr;

+  Status = PeiServicesGetBootMode (&BootMode);
+  ASSERT_EFI_ERROR (Status);
+
  //
  // Initialize S3 Data variable (S3DataPtr). It may be used for warm and fast boot paths.
  //
@@ -75,7 +80,11 @@ PeiFspMiscUpdUpdatePreMem (
             &VariableSize
             );
  DEBUG ((DEBUG_INFO, "MorControl - 0x%x (%r)\n", MorControl, Status));
-  if (MOR_CLEAR_MEMORY_VALUE (MorControl)) {
+  //
+  // Do not set CleanMemory on S3 resume
+  // TODO: Handle advanced features later - capsule update is in-memory list
+  //
+  if (MOR_CLEAR_MEMORY_VALUE (MorControl) && BootMode != BOOT_ON_S3_RESUME) {
    FspmUpd->FspmConfig.CleanMemory = (BOOLEAN)(MorControl & MOR_CLEAR_MEMORY_BIT_MASK);
  }

--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
@@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Library/MemoryAllocationLib.h>
 #include <Library/PeiSaPolicyLib.h>
 #include <Library/PeiLib.h>
+#include <Library/PeiServicesLib.h>

 /**
  Performs FSP SA PEI Policy initialization.
@@ -33,12 +34,17 @@ PeiFspSaPolicyUpdate (
  IN OUT FSPS_UPD    *FspsUpd
  )
 {
+  EFI_STATUS                      Status;
+  EFI_BOOT_MODE                   BootMode;
  VOID                            *Buffer;
  VOID                            *MemBuffer;
  UINT32                          Size;

  DEBUG((DEBUG_INFO, "\nUpdating SA Policy in Post Mem\n"));

+  Status = PeiServicesGetBootMode (&BootMode);
+  ASSERT_EFI_ERROR (Status);
+
    FspsUpd->FspsConfig.PeiGraphicsPeimInit = 1;

    Size   = 0;
@@ -46,7 +52,11 @@ PeiFspSaPolicyUpdate (
    PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RAW, 0, &Buffer, &Size);
    if (Buffer == NULL) {
      DEBUG((DEBUG_WARN, "Could not locate VBT\n"));
-    } else {
+    //
+    // Graphics initialization is unnecessary,
+    // OS has present framebuffer.
+    //
+    } else if (BootMode != BOOT_ON_S3_RESUME) {
      MemBuffer = (VOID *)AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Size));
      if ((MemBuffer != NULL) && (Buffer != NULL)) {
        CopyMem (MemBuffer, (VOID *)Buffer, (UINTN)Size);
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
@@ -23,6 +23,7 @@
  PcdLib
  SiliconInitLib
  PchResetLib
+  PchPmcLib

 [Packages]
  MinPlatformPkg/MinPlatformPkg.dec
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/PeiGalagoPro3InitPreMemLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/PeiGalagoPro3InitPreMemLib.c
@@ -14,6 +14,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Library/HobLib.h>
 #include <Library/PcdLib.h>
 #include <Library/PchCycleDecodingLib.h>
+#include <Library/PchPmcLib.h>
 #include <Library/PciLib.h>
 #include <Library/PcdLib.h>
 #include <Library/BaseMemoryLib.h>
@@ -236,5 +237,29 @@ GalagoPro3BoardBootModeDetect (
  VOID
  )
 {
-  return BOOT_WITH_FULL_CONFIGURATION;
+  EFI_BOOT_MODE  BootMode;
+  UINT32         SleepType;
+
+  DEBUG ((DEBUG_INFO, "Performing boot mode detection\n"));
+
+  // Known sane defaults
+  BootMode = BOOT_WITH_FULL_CONFIGURATION;
+
+  if (GetSleepTypeAfterWakeup (&SleepType)) {
+    switch (SleepType) {
+      case V_PCH_ACPI_PM1_CNT_S3:
+        BootMode = BOOT_ON_S3_RESUME;
+        break;
+      case V_PCH_ACPI_PM1_CNT_S4:
+        BootMode = BOOT_ON_S4_RESUME;
+        break;
+      case V_PCH_ACPI_PM1_CNT_S5:
+        BootMode = BOOT_ON_S5_RESUME;
+        break;
+    }
+  }
+
+  DEBUG ((DEBUG_INFO, "BootMode is 0x%x\n", BootMode));
+
+  return BootMode;
 }
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
@@ -25,6 +25,7 @@
  SiliconInitLib
  MultiBoardInitSupportLib
  PchResetLib
+  PchPmcLib

 [Packages]
  MinPlatformPkg/MinPlatformPkg.dec
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
@@ -180,6 +180,7 @@
  # Silicon Package
  #######################################
  ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+  SmmAccessLib|IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSmramc/PeiSmmAccessLib.inf

  #######################################
  # Platform Package
@@ -494,6 +495,20 @@
      !endif
  }

+!if gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable == TRUE
+  MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf {
+    <LibraryClasses>
+      # On S3 resume, RSC is in end-of-BS state
+      # - Moreover: Libraries cannot effectively use some end-of-BS events
+      DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+      SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
+      # Reverse-ranked priority list
+!if gKabylakeOpenBoardPkgTokenSpaceGuid.PcdI2cHdmiDebugPortEnable == TRUE
+      SerialPortLib|$(PLATFORM_BOARD_PACKAGE)/Library/I2cHdmiDebugSerialPortLib/BootScriptExecutorDxeI2cHdmiDebugSerialPortLib.inf
+!endif
+  }
+!endif
+
 !endif

  #######################################
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
@@ -279,6 +279,7 @@
  gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8
  gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2
  gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000
+  gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000

  #
  # The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags
@@ -380,7 +381,6 @@
  ######################################
  gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0
  gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148
-  gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000

  ######################################
  # Platform Configuration
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c
@@ -11,11 +11,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Library/DebugLib.h>
 #include <Library/PeiLib.h>
 #include <Library/ConfigBlockLib.h>
+#include <Library/PeiServicesLib.h>

 #include <FspEas.h>
 #include <FspmUpd.h>
 #include <FspsUpd.h>
-
 #include <Library/DebugLib.h>
 #include <Library/DebugPrintErrorLevelLib.h>
 #include <Library/PciLib.h>
@@ -36,11 +36,15 @@ PeiFspMiscUpdUpdatePreMem (
  )
 {
  EFI_STATUS                        Status;
+  EFI_BOOT_MODE                     BootMode;
  UINTN                             VariableSize;
  VOID                              *FspNvsBufferPtr;
  UINT8                             MorControl;
  VOID                              *MorControlPtr;

+  Status = PeiServicesGetBootMode (&BootMode);
+  ASSERT_EFI_ERROR (Status);
+
  //
  // Initialize S3 Data variable (S3DataPtr). It may be used for warm and fast boot paths.
  //
@@ -73,7 +77,11 @@ PeiFspMiscUpdUpdatePreMem (
             &VariableSize
             );
  DEBUG ((DEBUG_INFO, "MorControl - 0x%x (%r)\n", MorControl, Status));
-  if (MOR_CLEAR_MEMORY_VALUE (MorControl)) {
+  //
+  // Do not set CleanMemory on S3 resume
+  // TODO: Handle advanced features later - capsule update is in-memory list
+  //
+  if (MOR_CLEAR_MEMORY_VALUE (MorControl) && BootMode != BOOT_ON_S3_RESUME) {
    FspmUpd->FspmConfig.CleanMemory = (BOOLEAN)(MorControl & MOR_CLEAR_MEMORY_BIT_MASK);
  }

--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c
@@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Library/MemoryAllocationLib.h>
 #include <Library/PeiSaPolicyLib.h>
 #include <Library/PeiLib.h>
+#include <Library/PeiServicesLib.h>

 /**
  Performs FSP SA PEI Policy initialization.
@@ -33,12 +34,17 @@ PeiFspSaPolicyUpdate (
  IN OUT FSPS_UPD    *FspsUpd
  )
 {
+  EFI_STATUS                      Status;
+  EFI_BOOT_MODE                   BootMode;
  VOID                            *Buffer;
  VOID                            *MemBuffer;
  UINT32                          Size;

  DEBUG((DEBUG_INFO, "\nUpdating SA Policy in Post Mem\n"));

+  Status = PeiServicesGetBootMode (&BootMode);
+  ASSERT_EFI_ERROR (Status);
+
    FspsUpd->FspsConfig.PeiGraphicsPeimInit = 1;

    Size   = 0;
@@ -46,7 +52,11 @@ PeiFspSaPolicyUpdate (
    PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RAW, 0, &Buffer, &Size);
    if (Buffer == NULL) {
      DEBUG((DEBUG_WARN, "Could not locate VBT\n"));
-    } else {
+    //
+    // Graphics initialization is unnecessary,
+    // OS has present framebuffer.
+    //
+    } else if (BootMode != BOOT_ON_S3_RESUME) {
      MemBuffer = (VOID *)AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Size));
      if ((MemBuffer != NULL) && (Buffer != NULL)) {
        CopyMem (MemBuffer, (VOID *)Buffer, (UINTN)Size);
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
@@ -24,6 +24,7 @@
  SiliconInitLib
  EcLib
  PchResetLib
+  PchPmcLib

 [Packages]
  MinPlatformPkg/MinPlatformPkg.dec
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiKabylakeRvp3InitPreMemLib.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiKabylakeRvp3InitPreMemLib.c
@@ -13,6 +13,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Library/HobLib.h>
 #include <Library/PcdLib.h>
 #include <Library/PchCycleDecodingLib.h>
+#include <Library/PchPmcLib.h>
 #include <Library/PciLib.h>
 #include <Library/PcdLib.h>
 #include <Library/BaseMemoryLib.h>
@@ -330,5 +331,29 @@ KabylakeRvp3BoardBootModeDetect (
  VOID
  )
 {
-  return BOOT_WITH_FULL_CONFIGURATION;
+  EFI_BOOT_MODE  BootMode;
+  UINT32         SleepType;
+
+  DEBUG ((DEBUG_INFO, "Performing boot mode detection\n"));
+
+  // Known sane defaults
+  BootMode = BOOT_WITH_FULL_CONFIGURATION;
+
+  if (GetSleepTypeAfterWakeup (&SleepType)) {
+    switch (SleepType) {
+      case V_PCH_ACPI_PM1_CNT_S3:
+        BootMode = BOOT_ON_S3_RESUME;
+        break;
+      case V_PCH_ACPI_PM1_CNT_S4:
+        BootMode = BOOT_ON_S4_RESUME;
+        break;
+      case V_PCH_ACPI_PM1_CNT_S5:
+        BootMode = BOOT_ON_S5_RESUME;
+        break;
+    }
+  }
+
+  DEBUG ((DEBUG_INFO, "BootMode is 0x%x\n", BootMode));
+
+  return BootMode;
 }
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
@@ -26,6 +26,7 @@
  MultiBoardInitSupportLib
  EcLib
  PchResetLib
+  PchPmcLib

 [Packages]
  MinPlatformPkg/MinPlatformPkg.dec
--- a/Show More
+++ b/Show More