dasharo/edk2-platforms
0
0
Fork 0
mirror of https://github.com/Dasharo/edk2-platforms.git synced 2026-03-06 14:51:43 -08:00
Code Issues Packages Projects Releases Wiki Activity

Ampere: Initial support for Ampere Altra processor and Mt. Jade platform

Browse Source 
This commit adds the support for Ampere’s Altra processor-based Mt. Jade
platform that provides up to 160 processor cores in a dual socket
configuration. The essential modules are wired up enough to boot system
to EDK2 UiApp.

Cc: Thang Nguyen <thang@os.amperecomputing.com>
Cc: Chuong Tran <chuong@os.amperecomputing.com>
Cc: Phong Vo <phong@os.amperecomputing.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
This commit is contained in:
Vu Nguyen
2021-03-19 12:53:22 +07:00
committed by Leif Lindholm
parent 60d6b7c751
commit 2f01bcb86a
46 changed files with 6549 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

101
Platform/Ampere/JadePkg/Jade.dsc Normal file
View File

@@ -0,0 +1,101 @@
## @file
#
# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
################################################################################
#
# Defines Section - statements that will be processed to create a Makefile.
#
################################################################################
[Defines]
PLATFORM_NAME = Jade
PLATFORM_GUID = 7BDD00C0-68F3-4CC1-8775-F0F00572019F
PLATFORM_VERSION = 0.1
DSC_SPECIFICATION = 0x0001001B
OUTPUT_DIRECTORY = Build/Jade
SUPPORTED_ARCHITECTURES = AARCH64
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
FLASH_DEFINITION = Platform/Ampere/JadePkg/Jade.fdf
#
# Defines for default states. These can be changed on the command line.
# -D FLAG=VALUE
#
# DEBUG_INIT 0x00000001 // Initialization
# DEBUG_WARN 0x00000002 // Warnings
# DEBUG_LOAD 0x00000004 // Load events
# DEBUG_FS 0x00000008 // EFI File system
# DEBUG_POOL 0x00000010 // Alloc & Free (pool)
# DEBUG_PAGE 0x00000020 // Alloc & Free (page)
# DEBUG_INFO 0x00000040 // Informational debug messages
# DEBUG_DISPATCH 0x00000080 // PEI/DXE/SMM Dispatchers
# DEBUG_VARIABLE 0x00000100 // Variable
# DEBUG_BM 0x00000400 // Boot Manager
# DEBUG_BLKIO 0x00001000 // BlkIo Driver
# DEBUG_NET 0x00004000 // SNP Driver
# DEBUG_UNDI 0x00010000 // UNDI Driver
# DEBUG_LOADFILE 0x00020000 // LoadFile
# DEBUG_EVENT 0x00080000 // Event messages
# DEBUG_GCD 0x00100000 // Global Coherency Database changes
# DEBUG_CACHE 0x00200000 // Memory range cachability changes
# DEBUG_VERBOSE 0x00400000 // Detailed debug messages that may
# // significantly impact boot performance
# DEBUG_ERROR 0x80000000 // Error
DEFINE DEBUG_PRINT_ERROR_LEVEL = 0x8000000F
DEFINE FIRMWARE_VER = 0.01.001
DEFINE SECURE_BOOT_ENABLE = FALSE
DEFINE INCLUDE_TFTP_COMMAND = TRUE
#
# Network definition
#
DEFINE NETWORK_IP6_ENABLE = FALSE
DEFINE NETWORK_HTTP_BOOT_ENABLE = TRUE
DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS = TRUE
DEFINE NETWORK_TLS_ENABLE = FALSE
!include MdePkg/MdeLibs.dsc.inc
# Include default Ampere Platform DSC file
!include Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
################################################################################
#
# Specific Platform Library
#
################################################################################
[LibraryClasses]
#
# RTC Library: Common RTC
#
RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf
################################################################################
#
# Specific Platform Pcds
#
################################################################################
[PcdsFeatureFlag.common]
[PcdsFixedAtBuild.common]
!if $(SECURE_BOOT_ENABLE) == TRUE
# Override the default values from SecurityPkg to ensure images
# from all sources are verified in secure boot
gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04
gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04
gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04
!endif
################################################################################
#
# Specific Platform Component
#
################################################################################
[Components.common]

228
Platform/Ampere/JadePkg/Jade.fdf Normal file
View File

@@ -0,0 +1,228 @@
## @file
#
# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
################################################################################
#
# FD Section
# The [FD] Section is made up of the definition statements and a
# description of what goes into the Flash Device Image. Each FD section
# defines one flash "device" image. A flash device image may be one of
# the following: Removable media bootable image (like a boot floppy
# image,) an Option ROM image (that would be "flashed" into an add-in
# card,) a System "Flash" image (that would be burned into a system's
# flash) or an Update ("Capsule") image that will be used to update and
# existing system flash.
#
################################################################################
[FD.BL33_JADE_UEFI]
BaseAddress = 0x92000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
Size = 0x007C0000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
ErasePolarity = 1
# This one is tricky, it must be: BlockSize * NumBlocks = Size
BlockSize = 0x10000
NumBlocks = 0x7C
################################################################################
#
# Following are lists of FD Region layout which correspond to the locations of different
# images within the flash device.
#
# Regions must be defined in ascending order and may not overlap.
#
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
# the pipe "|" character, followed by the size of the region, also in hex with the leading
# "0x" characters. Like:
# Offset|Size
# PcdOffsetCName|PcdSizeCName
# RegionType <FV, DATA, or FILE>
#
################################################################################
#
# FV MAIN
# Offset: 0x00000000
# Size: 0x00740000
#
0x00000000|0x00740000
gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
FV = FVMAIN_COMPACT
#
# NV Variables
# Placeholder
#
################################################################################
#
# FV Section
#
# [FV] section is used to define what components or modules are placed within a flash
# device file. This section also defines order the components and modules are positioned
# within the image. The [FV] section consists of define statements, set statements and
# module statements.
#
################################################################################
[FV.FVMAIN_COMPACT]
FvAlignment = 16
ERASE_POLARITY = 1
MEMORY_MAPPED = TRUE
STICKY_WRITE = TRUE
LOCK_CAP = TRUE
LOCK_STATUS = TRUE
WRITE_DISABLED_CAP = TRUE
WRITE_ENABLED_CAP = TRUE
WRITE_STATUS = TRUE
WRITE_LOCK_CAP = TRUE
WRITE_LOCK_STATUS = TRUE
READ_DISABLED_CAP = TRUE
READ_ENABLED_CAP = TRUE
READ_STATUS = TRUE
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
FvNameGuid = 61C0F511-A691-4F54-974F-B9A42172CE53
APRIORI PEI {
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf
}
INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
INF MdeModulePkg/Core/Pei/PeiMain.inf
INF UefiCpuPkg/CpuIoPei/CpuIoPei.inf
INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
INF Silicon/Ampere/AmpereAltraPkg/Drivers/ATFHobPei/ATFHobPeim.inf
INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
INF ArmPkg/Drivers/CpuPei/CpuPei.inf
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf
#
# Print platform information before passing control into the Driver Execution Environment (DXE) phase
#
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
SECTION FV_IMAGE = FVMAIN
}
}
[FV.FvMain]
FvAlignment = 16
ERASE_POLARITY = 1
MEMORY_MAPPED = TRUE
STICKY_WRITE = TRUE
LOCK_CAP = TRUE
LOCK_STATUS = TRUE
WRITE_DISABLED_CAP = TRUE
WRITE_ENABLED_CAP = TRUE
WRITE_STATUS = TRUE
WRITE_LOCK_CAP = TRUE
WRITE_LOCK_STATUS = TRUE
READ_DISABLED_CAP = TRUE
READ_ENABLED_CAP = TRUE
READ_STATUS = TRUE
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
FvNameGuid = 5C60F367-A505-419A-859E-2A4FF6CA6FE5
APRIORI DXE {
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
INF ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf
}
INF MdeModulePkg/Core/Dxe/DxeMain.inf
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
#
# PI DXE Drivers producing Architectural Protocols (EFI Services)
#
INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
!if $(SECURE_BOOT_ENABLE) == TRUE
INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
!endif
INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
INF ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf
#
# Environment Variables Protocol
#
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
#
# Multiple Console IO support
#
INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
#
# Timer
#
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
#
# ARM GIC Dxe
#
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
#
# FAT filesystem + GPT/MBR partitioning
#
INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
INF FatPkg/EnhancedFatDxe/Fat.inf
INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
#
# UEFI application (Shell Embedded Boot Loader)
#
INF ShellPkg/Application/Shell/Shell.inf
!if $(INCLUDE_TFTP_COMMAND) == TRUE
INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
!endif
#
# Bds
#
INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
INF MdeModulePkg/Application/UiApp/UiApp.inf
#
# Networking stack
#
!include NetworkPkg/Network.fdf.inc
!include Silicon/Ampere/AmpereSiliconPkg/FvRules.fdf.inc

45
Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec Normal file
View File

@@ -0,0 +1,45 @@
## @file
#
# Copyright (c) 2020-2021, Ampere Computing LLC. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
[Defines]
DEC_SPECIFICATION = 0x0001001B
PACKAGE_NAME = AmpereAltraPkg
PACKAGE_GUID = 481F7D0D-7525-4B76-AF12-58E7B82C46C2
PACKAGE_VERSION = 0.1
[Includes]
Include
[LibraryClasses]
## @libraryclass Defines a set of methods to retrieve CPU info.
AmpereCpuLib|Silicon/Ampere/AmpereAltraPkg/Include/Library/AmpereCpuLib.h
## @libraryclass Defines a set of methods to get/set NVParam.
NVParamLib|Silicon/Ampere/AmpereAltraPkg/Include/Library/NVParamLib.h
## @libraryclass Defines a set of methods to access Mailbox interface.
MailboxInterfaceLib|Silicon/Ampere/AmpereAltraPkg/Include/Library/MailboxInterfaceLib.h
## @libraryclass Defines a set of methods to communicate with SCP.
SystemFirmwareInterfaceLib|Silicon/Ampere/AmpereAltraPkg/Include/Library/SystemFirmwareInterfaceLib.h
## @libraryclass Defines a set of methods to communicate with secure parition over MM interface.
MmCommunicationLib|Silicon/Ampere/AmpereAltraPkg/Include/Library/MmCommunicationLib.h
## @libraryclass Defines a set of methods to generate random numbers by using Hardware RNG.
TrngLib|Silicon/Ampere/AmpereAltraPkg/Include/Library/TrngLib.h
[Guids]
## NVParam MM GUID
gNVParamMmGuid = { 0xE4AC5024, 0x29BE, 0x4ADC, { 0x93, 0x36, 0x87, 0xB5, 0xA0, 0x76, 0x23, 0x2D } }
## SPI NOR Proxy MM GUID
gSpiNorMmGuid = { 0xC8D76438, 0x4D3C, 0x4BEA, { 0xBF, 0x86, 0x92, 0x6B, 0x83, 0x07, 0xA2, 0x39 } }
## Include/Guid/PlatformInfoHob.h
gPlatformInfoHobGuid = { 0x7f73e372, 0x7183, 0x4022, { 0xb3, 0x76, 0x78, 0x30, 0x32, 0x6d, 0x79, 0xb4 } }

677
Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc Normal file
View File

File diff suppressed because it is too large Load Diff

51
Silicon/Ampere/AmpereAltraPkg/Drivers/ATFHobPei/ATFHobPeim.c Normal file
View File

@@ -0,0 +1,51 @@
/** @file
Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <PiPei.h>
#include <Guid/PlatformInfoHob.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/HobLib.h>
#include <Library/PcdLib.h>
#include <Library/PeimEntryPoint.h>
#include <Library/PeiServicesLib.h>
#include <Uefi/UefiBaseType.h>
VOID
BuildPlatformInformationHob (
VOID
)
{
VOID *Hob;
/* The ATF HOB handoff base is at PcdSystemMemoryBase */
Hob = GetNextGuidHob (
&gPlatformInfoHobGuid,
(CONST VOID *)FixedPcdGet64 (PcdSystemMemoryBase)
);
if (Hob != NULL) {
BuildGuidDataHob (
&gPlatformInfoHobGuid,
GET_GUID_HOB_DATA (Hob),
GET_GUID_HOB_DATA_SIZE (Hob)
);
}
}
EFI_STATUS
EFIAPI
InitializeATFHobPeim (
IN EFI_PEI_FILE_HANDLE FileHandle,
IN CONST EFI_PEI_SERVICES **PeiServices
)
{
BuildPlatformInformationHob ();
return EFI_SUCCESS;
}

41
Silicon/Ampere/AmpereAltraPkg/Drivers/ATFHobPei/ATFHobPeim.inf Normal file
View File

@@ -0,0 +1,41 @@
## @file
#
# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
[Defines]
INF_VERSION = 0x0001001B
BASE_NAME = ATFHobPeim
FILE_GUID = B1975734-77C2-4827-9617-914883F3B578
MODULE_TYPE = PEIM
VERSION_STRING = 1.0
ENTRY_POINT = InitializeATFHobPeim
[Sources]
ATFHobPeim.c
[FixedPcd]
gArmTokenSpaceGuid.PcdSystemMemoryBase
[Packages]
ArmPkg/ArmPkg.dec
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
[LibraryClasses]
BaseLib
DebugLib
HobLib
PcdLib
PeiServicesLib
PeimEntryPoint
[Guids]
gPlatformInfoHobGuid
[Depex]
TRUE

188
Silicon/Ampere/AmpereAltraPkg/Include/Guid/PlatformInfoHob.h Normal file
View File

@@ -0,0 +1,188 @@
/** @file
Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef PLATFORM_INFO_HOB_H_
#define PLATFORM_INFO_HOB_H_
#include <IndustryStandard/Tpm20.h>
#include <Platform/Ac01.h>
#define PLATFORM_INFO_HOB_GUID \
{ 0x7f73e372, 0x7183, 0x4022, { 0xb3, 0x76, 0x78, 0x30, 0x32, 0x6d, 0x79, 0xb4 } }
extern EFI_GUID gPlatformInfoHobGuid;
//
// DIMM type
//
#define UDIMM 0x00
#define RDIMM 0x01
#define SODIMM 0x02
#define RSODIMM 0x03
#define LRDIMM 0x04
#define NVRDIMM 0x05
//
// DIMM status
//
#define DIMM_NOT_INSTALLED 0x00
#define DIMM_INSTALLED_OPERATIONAL 0x01 // installed and operational
#define DIMM_INSTALLED_NONOPERATIONAL 0x02 // installed and non-operational
#define DIMM_INSTALLED_FAILED 0x03 // installed and failed
typedef struct {
UINT32 NumRegion;
UINT64 TotalSize;
UINT64 Base[PLATFORM_DRAM_INFO_MAX_REGION];
UINT64 Size[PLATFORM_DRAM_INFO_MAX_REGION];
UINT64 Node[PLATFORM_DRAM_INFO_MAX_REGION];
UINT64 Socket[PLATFORM_DRAM_INFO_MAX_REGION];
UINT32 MaxSpeed;
UINT32 McuMask[PLATFORM_CPU_MAX_SOCKET];
UINT32 NvdRegion[PLATFORM_DRAM_INFO_MAX_REGION];
UINT32 NvdimmMode[PLATFORM_CPU_MAX_SOCKET];
} PLATFORM_DRAM_INFO;
typedef struct {
CHAR8 PartNumber[32];
UINT64 DimmSize;
UINT16 DimmMfcId;
UINT16 Reserved;
UINT8 DimmNrRank;
UINT8 DimmType;
UINT8 DimmStatus;
UINT8 DimmDevType;
} PLATFORM_DIMM_INFO;
typedef struct {
UINT8 Data[512];
} PLATFORM_DIMM_SPD_DATA;
typedef struct {
PLATFORM_DIMM_INFO Info;
PLATFORM_DIMM_SPD_DATA SpdData;
UINT32 NodeId;
} PLATFORM_DIMM;
typedef struct {
UINT32 BoardDimmSlots;
PLATFORM_DIMM Dimm[PLATFORM_DIMM_INFO_MAX_SLOT];
} PLATFORM_DIMM_LIST;
typedef struct {
UINT32 EnableMask[4];
} PLATFORM_CLUSTER_EN;
//
// Algorithm ID defined in pre-UEFI firmware
//
typedef enum {
PlatformAlgorithmSha1 = 1,
PlatformAlgorithmSha256,
PlatformAlgorithmMax,
} PLATFORM_ALGORITHM_ID;
//
// Platform digest data definition
//
typedef union {
unsigned char Sha1[SHA1_DIGEST_SIZE];
unsigned char Sha256[SHA256_DIGEST_SIZE];
} PLATFORM_TPM_DIGEST;
#define MAX_VIRTUAL_PCR_INDEX 0x0002
#pragma pack(1)
typedef struct {
PLATFORM_ALGORITHM_ID AlgorithmId;
struct {
PLATFORM_TPM_DIGEST Hash;
} VPcr[MAX_VIRTUAL_PCR_INDEX]; // vPCR 0 or 1
} PLATFORM_VPCR_HASH_INFO;
typedef struct {
UINT8 InterfaceType; // If I/F is CRB then CRB parameters are expected
UINT64 InterfaceParametersAddress; // Physical address of interface, by Value */
UINT64 InterfaceParametersLength;
UINT32 SupportedAlgorithmsBitMask;
UINT64 EventLogAddress;
UINT64 EventLogLength;
UINT8 Reserved[3];
} PLATFORM_TPM2_CONFIG_DATA;
typedef struct {
UINT32 CurrentRequest;
UINT32 LastRequest;
UINT32 LastRequestStatus;
} PLATFORM_TPM2_PPI_REQUEST;
typedef struct {
UINT64 AddressOfControlArea;
UINT64 ControlAreaLength;
UINT8 InterruptMode;
UINT8 Reserved[3];
UINT32 InterruptNumber; // Should have a value of zero polling
UINT32 SmcFunctionId; // SMC Function ID
UINT64 PpiRequestNotifyAddress; // Doorbell/Interrupt Address
PLATFORM_TPM2_PPI_REQUEST *PpiRequest; // PPI Request
} PLATFORM_TPM2_CRB_INTERFACE_PARAMETERS;
typedef struct {
PLATFORM_TPM2_CONFIG_DATA Tpm2ConfigData;
PLATFORM_TPM2_CRB_INTERFACE_PARAMETERS Tpm2CrbInterfaceParams;
PLATFORM_VPCR_HASH_INFO Tpm2VPcrHashInfo;
} PLATFORM_TPM2_INFO;
#pragma pack()
typedef struct {
UINT8 MajorNumber;
UINT8 MinorNumber;
UINT64 PcpClk;
UINT64 CpuClk;
UINT64 SocClk;
UINT64 AhbClk;
UINT64 SysClk;
UINT8 CpuInfo[128];
UINT8 CpuVer[32];
UINT8 SmPmProVer[32];
UINT8 SmPmProBuild[32];
PLATFORM_DRAM_INFO DramInfo;
PLATFORM_DIMM_LIST DimmList;
PLATFORM_CLUSTER_EN ClusterEn[2];
UINT32 FailSafeStatus;
UINT32 RcDisableMask[2];
UINT8 ResetStatus;
UINT16 CoreVoltage[2];
UINT16 SocVoltage[2];
UINT16 Dimm1Voltage[2];
UINT16 Dimm2Voltage[2];
/* Chip information */
UINT32 ScuProductId[2];
UINT8 MaxNumOfCore[2];
UINT8 Warranty[2];
UINT8 SubNumaMode[2];
UINT8 AvsEnable[2];
UINT32 AvsVoltageMV[2];
UINT8 TurboCapability[2];
UINT32 TurboFrequency[2];
UINT8 SkuMaxTurbo[2];
UINT8 SkuMaxCore[2];
UINT32 AHBCId[2];
/* TPM2 Info */
PLATFORM_TPM2_INFO Tpm2Info;
/* 2P link info for RCA0/RCA1 */
UINT8 Link2PSpeed[2];
UINT8 Link2PWidth[2];
} PLATFORM_INFO_HOB;
#endif /* PLATFORM_INFO_HOB_H_ */

276
Silicon/Ampere/AmpereAltraPkg/Include/Library/AmpereCpuLib.h Normal file
View File

@@ -0,0 +1,276 @@
/** @file
Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef AMPERE_CPU_LIB_H_
#define AMPERE_CPU_LIB_H_
#define SUBNUMA_MODE_MONOLITHIC 0
#define SUBNUMA_MODE_HEMISPHERE 1
#define SUBNUMA_MODE_QUADRANT 2
#define MONOLITIC_NUM_OF_REGION 1
#define HEMISPHERE_NUM_OF_REGION 2
#define QUADRANT_NUM_OF_REGION 4
#define SUBNUMA_CPM_REGION_SIZE 4
#define NUM_OF_CPM_PER_MESH_ROW 8
#define CPM_PER_ROW_OFFSET(CpmId) ((CpmId) % NUM_OF_CPM_PER_MESH_ROW)
#define CPM_ROW_NUMBER(CpmId) ((CpmId) / NUM_OF_CPM_PER_MESH_ROW)
#define SOCKET_ID(CpuId) ((CpuId) / (PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM))
#define CLUSTER_ID(CpuId) (((CpuId) / PLATFORM_CPU_NUM_CORES_PER_CPM) % PLATFORM_CPU_MAX_CPM)
/**
Get current CPU frequency.
@param Socket Socket index.
@return UINTN Current CPU frequency.
**/
UINTN
EFIAPI
CpuGetCurrentFreq (
UINT8 Socket
);
/**
Get maximum CPU frequency.
@param Socket Socket index.
@return UINTN Maximum CPU frequency.
**/
UINTN
EFIAPI
CpuGetMaxFreq (
UINT8 Socket
);
/**
Get CPU voltage.
@param Socket Socket index.
@return UINT8 CPU voltage.
**/
UINT8
EFIAPI
CpuGetVoltage (
UINT8 Socket
);
/**
Get the SubNUMA mode.
@return UINT8 The SubNUMA mode.
**/
UINT8
EFIAPI
CpuGetSubNumaMode (
VOID
);
/**
Get the number of SubNUMA region.
@return UINT8 The number of SubNUMA region.
**/
UINT8
EFIAPI
CpuGetNumberOfSubNumaRegion (
VOID
);
/**
Get the SubNUMA node of a CPM.
@param SocketId Socket index.
@param Cpm CPM index.
@return UINT8 The SubNUMA node of a CPM.
**/
UINT8
EFIAPI
CpuGetSubNumNode (
UINT8 Socket,
UINT16 Cpm
);
/**
Get the number of supported socket.
@return UINT8 Number of supported socket.
**/
UINT8
EFIAPI
GetNumberOfSupportedSockets (
VOID
);
/**
Get the number of active socket.
@return UINT8 Number of active socket.
**/
UINT8
EFIAPI
GetNumberOfActiveSockets (
VOID
);
/**
Get the number of active CPM per socket.
@param SocketId Socket index.
@return UINT16 Number of CPM.
**/
UINT16
EFIAPI
GetNumberOfActiveCPMsPerSocket (
UINT8 SocketId
);
/**
Get the number of configured CPM per socket.
@param SocketId Socket index.
@return UINT16 Number of configured CPM.
**/
UINT16
EFIAPI
GetNumberOfConfiguredCPMs (
UINT8 SocketId
);
/**
Set the number of configured CPM per socket.
@param SocketId Socket index.
@param NumberOfCPMs Number of CPM to be configured.
@return EFI_SUCCESS Operation succeeded.
@return Others An error has occurred.
**/
EFI_STATUS
EFIAPI
SetNumberOfConfiguredCPMs (
UINT8 SocketId,
UINT16 NumberOfCPMs
);
/**
Get the maximum number of core per socket. This number
should be the same for all sockets.
@return UINT16 Maximum number of core.
**/
UINT16
EFIAPI
GetMaximumNumberOfCores (
VOID
);
/**
Get the maximum number of CPM per socket. This number
should be the same for all sockets.
@return UINT32 Maximum number of CPM.
**/
UINT16
EFIAPI
GetMaximumNumberOfCPMs (
VOID
);
/**
Get the number of active cores of a sockets.
@return UINT16 Number of active core.
**/
UINT16
EFIAPI
GetNumberOfActiveCoresPerSocket (
UINT8 SocketId
);
/**
Get the number of active cores of all socket.
@return UINT16 Number of active core.
**/
UINT16
EFIAPI
GetNumberOfActiveCores (
VOID
);
/**
Check if the logical CPU is enabled or not.
@param CpuId The logical Cpu ID. Started from 0.
@return BOOLEAN TRUE if the Cpu enabled
FALSE if the Cpu disabled.
**/
BOOLEAN
EFIAPI
IsCpuEnabled (
UINT16 CpuId
);
/**
Check if the slave socket is present
@return BOOLEAN TRUE if the Slave Cpu is present
FALSE if the Slave Cpu is not present
**/
BOOLEAN
EFIAPI
IsSlaveSocketAvailable (
VOID
);
/**
Check if the slave socket is active
@return BOOLEAN TRUE if the Slave CPU Socket is active.
FALSE if the Slave CPU Socket is not active.
**/
BOOLEAN
EFIAPI
IsSlaveSocketActive (
VOID
);
/**
Check if the CPU product ID is Ac01
@return BOOLEAN TRUE if the Product ID is Ac01
FALSE otherwise.
**/
BOOLEAN
EFIAPI
IsAc01Processor (
VOID
);
#endif /* AMPERE_CPU_LIB_H_ */

172
Silicon/Ampere/AmpereAltraPkg/Include/Library/MailboxInterfaceLib.h Normal file
View File

@@ -0,0 +1,172 @@
/** @file
The library implements the hardware Mailbox (Doorbell) interface for communication
between the Application Processor (ARMv8) and the System Control Processors (SMpro/PMpro).
A transfer to SMpro/PMpro is performed on a doorbell channel which is implemented through
hardware doorbell registers. Each transfer can be up to 12 bytes long, including 4 bytes
for the message and two 4 bytes for additional data.
Copyright (c) 2021, Ampere Computing LLC. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef MAILBOX_INTERFACE_LIB_H_
#define MAILBOX_INTERFACE_LIB_H_
#define SMPRO_DB_MAX 8
#define PMPRO_DB_MAX 8
#define NUMBER_OF_DOORBELLS_PER_SOCKET (SMPRO_DB_MAX + PMPRO_DB_MAX)
//
// General address offset of Doorbell registers
//
#define DB_IN_REG_OFST 0x00000000 // Doorbell In
#define DB_DIN0_REG_OFST 0x00000004 // Doorbell In Data
#define DB_DIN1_REG_OFST 0x00000008 // Doorbell In Data
#define DB_OUT_REG_OFST 0x00000010 // Doorbell Out
#define DB_DOUT0_REG_OFST 0x00000014 // Doorbell Out Data
#define DB_DOUT1_REG_OFST 0x00000018 // Doorbell Out Data
#define DB_STATUS_REG_OFST 0x00000020 // Doorbell Interrupt Status
#define DB_STATUS_MASK_REG_OFST 0x00000024 // Doorbell Interrupt Status Mask
//
// List of supported doorbells
//
typedef enum {
//
// PMpro Doorbells
//
PMproDoorbellChannel0 = 0,
PMproDoorbellChannel1,
PMproDoorbellChannel2,
PMproDoorbellChannel3,
PMproDoorbellChannel4,
PMproDoorbellChannel5,
PMproDoorbellChannel6,
PMproDoorbellChannel7,
//
// SMpro Doorbells
//
SMproDoorbellChannel0 = PMPRO_DB_MAX,
SMproDoorbellChannel1,
SMproDoorbellChannel2,
SMproDoorbellChannel3,
SMproDoorbellChannel4,
SMproDoorbellChannel5,
SMproDoorbellChannel6,
SMproDoorbellChannel7
} DOORBELL_CHANNELS;
#pragma pack(1)
//
// Mailbox Message Data
//
// A mailbox transaction supports up to 12 bytes long,
// including 4 bytes for message and two 4 bytes for extended data.
//
typedef struct {
UINT32 Data;
UINT32 ExtendedData[2];
} MAILBOX_MESSAGE_DATA;
#pragma pack()
//
// Timeout configuration when waiting for an doorbell interrupt status
//
#define MAILBOX_POLL_TIMEOUT_US 10000000
#define MAILBOX_POLL_INTERVAL_US 1000
#define MAILBOX_POLL_COUNT (MAILBOX_POLL_TIMEOUT_US / MAILBOX_POLL_INTERVAL_US)
/**
Get the base address of a doorbell.
@param[in] Socket Active socket index.
@param[in] Doorbell Doorbell channel for communication with the SMpro/PMpro.
@retval UINT32 The base address of the doorbell.
The returned value is 0 indicate that the input parameters are invalid.
**/
UINTN
EFIAPI
MailboxGetDoorbellAddress (
IN UINT8 Socket,
IN DOORBELL_CHANNELS Doorbell
);
/**
Get the interrupt number of a doorbell.
@param[in] Socket Active socket index.
@param[in] Doorbell Doorbell channel for communication with the SMpro/PMpro.
@retval UINT32 The interrupt number.
The returned value is 0 indicate that the input parameters are invalid.
**/
UINT32
EFIAPI
MailboxGetDoorbellInterruptNumber (
IN UINT8 Socket,
IN DOORBELL_CHANNELS Doorbell
);
/**
Read a message via the hardware Doorbell interface.
@param[in] Socket Active socket index.
@param[in] Doorbell Doorbell channel for communication with the SMpro/PMpro.
@param[out] Message Pointer to the Mailbox message.
@retval EFI_SUCCESS Read the message successfully.
@retval EFI_TIMEOUT Timeout occurred when waiting for available message in the mailbox.
@retval EFI_INVALID_PARAMETER A parameter is invalid.
**/
EFI_STATUS
EFIAPI
MailboxRead (
IN UINT8 Socket,
IN DOORBELL_CHANNELS Doorbell,
OUT MAILBOX_MESSAGE_DATA *Message
);
/**
Write a message via the hardware Doorbell interface.
@param[in] Socket Active socket index.
@param[in] Doorbell Doorbel channel for communication with the SMpro/PMpro.
@param[in] Message Pointer to the Mailbox message.
@retval EFI_SUCCESS Write the message successfully.
@retval EFI_TIMEOUT Timeout occurred when waiting for acknowledge signal from the mailbox.
@retval EFI_INVALID_PARAMETER A parameter is invalid.
**/
EFI_STATUS
EFIAPI
MailboxWrite (
IN UINT8 Socket,
IN DOORBELL_CHANNELS Doorbell,
IN MAILBOX_MESSAGE_DATA *Message
);
/**
Unmask the Doorbell interrupt status.
@param Socket Active socket index.
@param Doorbell Doorbel channel for communication with the SMpro/PMpro.
@retval EFI_SUCCESS Unmask the Doorbell interrupt successfully.
@retval EFI_INVALID_PARAMETER A parameter is invalid.
**/
EFI_STATUS
EFIAPI
MailboxUnmaskInterrupt (
IN UINT8 Socket,
IN UINT16 Doorbell
);
#endif /* MAILBOX_INTERFACE_LIB_H_ */

44
Silicon/Ampere/AmpereAltraPkg/Include/Library/MmCommunicationLib.h Normal file
View File

@@ -0,0 +1,44 @@
/** @file
Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef MM_COMMUNICATION_LIB_H_
#define MM_COMMUNICATION_LIB_H_
/**
Communicates with a registered handler.
This function provides an interface to send and receive messages to the
Standalone MM environment in UEFI PEI phase.
@param[in, out] CommBuffer A pointer to the buffer to convey
into MMRAM.
@param[in, out] CommSize The size of the data buffer being
passed in. This is optional.
@retval EFI_SUCCESS The message was successfully posted.
@retval EFI_INVALID_PARAMETER The CommBuffer was NULL.
@retval EFI_BAD_BUFFER_SIZE The buffer size is incorrect for the MM
implementation. If this error is
returned, the MessageLength field in
the CommBuffer header or the integer
pointed by CommSize are updated to reflect
the maximum payload size the
implementation can accommodate.
@retval EFI_ACCESS_DENIED The CommunicateBuffer parameter
or CommSize parameter, if not omitted,
are in address range that cannot be
accessed by the MM environment
**/
EFI_STATUS
EFIAPI
MmCommunicationCommunicate (
IN OUT VOID *CommBuffer,
IN OUT UINTN *CommSize OPTIONAL
);
#endif /* MM_COMMUNICATION_LIB_H_ */

134
Silicon/Ampere/AmpereAltraPkg/Include/Library/NVParamLib.h Normal file
View File

@@ -0,0 +1,134 @@
/** @file
The non-volatile parameter layout in SPI-NOR is shown below. There is
two copies. The master copy is changeable by the user. The Last Known
copy is handled by the fail safe future. It is a last know bootable copy.
---------------------------
| Master Copy | 16KB
| Pre-boot parameters |
---------------------------
| Master Copy | 16KB
| Pre-boot parameters |
| w/o failsafe support |
---------------------------
| Master Copy |
| Manufactory & | 32KB
| Users parameters |
---------------------------
| Last Known Copy | 16KB
| Pre-boot parameters |
---------------------------
| | 16KB
---------------------------
| Last Known Copy |
| Manufactory & | 32KB
| Users parameters |
---------------------------
As each non-volatile parameter requires 8 bytes, there is a total of 8K
parameters.
Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef NV_PARAM_LIB_H_
#define NV_PARAM_LIB_H_
#define NV_PARAM_MAX_SIZE (64 * 1024)
#define NV_PARAM_ENTRYSIZE 8
#define NV_PERM_ALL 0xFFFF /* Allowed for all */
#define NV_PERM_ATF 0x0001 /* Allowed for EL3 code */
#define NV_PERM_OPTEE 0x0004 /* Allowed for secure El1 */
#define NV_PERM_BIOS 0x0008 /* Allowed for EL2 non-secure */
#define NV_PERM_MANU 0x0010 /* Allowed for manufactory interface */
#define NV_PERM_BMC 0x0020 /* Allowed for BMC interface */
#define NVPARAM_SIZE 0x8
/**
Retrieve a non-volatile parameter.
NOTE: If you need a signed value, cast it. It is expected that the
caller will carry the correct permission over various call sequences.
@param[in] Param Parameter ID to retrieve
@param[in] ACLRd Permission for read operation.
@param[out] Val Pointer to an UINT32 to the return value.
@retval EFI_SUCCESS Operation succeeded.
@retval EFI_ACCESS_DENIED Permission not allowed.
@retval EFI_DEVICE_ERROR Service is unavailable.
@retval EFI_INVALID_PARAMETER Val is NULL or return status is invalid.
@retval EFI_NOT_FOUND NVParam entry is not set.
**/
EFI_STATUS
NVParamGet (
IN UINT32 Param,
IN UINT16 ACLRd,
OUT UINT32 *Val
);
/**
Set a non-volatile parameter.
NOTE: If you have a signed value, cast to unsigned. If the parameter has
not being created before, the provied permission is used to create the
parameter. Otherwise, it is checked for access. It is expected that the
caller will carry the correct permission over various call sequences.
@param[in] Param Parameter ID to set
@param[in] ACLRd Permission for read operation.
@param[in] ACLWr Permission for write operation.
@param[in] Val Unsigned int value to set.
@retval EFI_SUCCESS Operation succeeded.
@retval EFI_ACCESS_DENIED Permission not allowed.
@retval EFI_DEVICE_ERROR Service is unavailable.
@retval EFI_INVALID_PARAMETER Return status is invalid.
**/
EFI_STATUS
NVParamSet (
IN UINT32 Param,
IN UINT16 ACLRd,
IN UINT16 ACLWr,
IN UINT32 Val
);
/**
Clear a non-volatile parameter.
NOTE: It is expected that the caller will carry the correct permission
over various call sequences.
@param[in] Param Parameter ID to set
@param[in] ACLWr Permission for write operation.
@retval EFI_SUCCESS Operation succeeded.
@retval EFI_ACCESS_DENIED Permission not allowed.
@retval EFI_DEVICE_ERROR Service is unavailable.
@retval EFI_INVALID_PARAMETER Return status is invalid.
**/
EFI_STATUS
NVParamClr (
IN UINT32 Param,
IN UINT16 ACLWr
);
/**
Clear all non-volatile parameters
@retval EFI_SUCCESS Operation succeeded.
@retval EFI_DEVICE_ERROR Service is unavailable.
@retval EFI_INVALID_PARAMETER Return status is invalid.
**/
EFI_STATUS
NVParamClrAll (
VOID
);
#endif /* NV_PARAM_LIB_H_ */

282
Silicon/Ampere/AmpereAltraPkg/Include/Library/SystemFirmwareInterfaceLib.h Normal file
View File

@@ -0,0 +1,282 @@
/** @file
Provides functions for communication with System Firmware (SMpro/PMpro)
via interfaces like Mailbox.
Copyright (c) 2021, Ampere Computing LLC. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef SYSTEM_FIRMWARE_INTERFACE_LIB_H_
#define SYSTEM_FIRMWARE_INTERFACE_LIB_H_
//
// Common mailbox message format
// Bit 31:28 - Message type
// Bit 27:24 - Message subtype
// Bit 23:16 - Message control byte
// Bit 15:0 - Message data specific
//
#define MAILBOX_MESSAGE_TYPE_SHIFT 28
#define MAILBOX_MESSAGE_SUBTYPE_SHIFT 24
#define MAILBOX_MESSAGE_CONTROL_BYTE_SHIFT 16
#define COMMON_MESSAGE_ENCODE(Type,Subtype,Control) \
( \
((Type) << MAILBOX_MESSAGE_TYPE_SHIFT) | \
((Subtype) << MAILBOX_MESSAGE_SUBTYPE_SHIFT) | \
((Control) << MAILBOX_MESSAGE_CONTROL_BYTE_SHIFT) \
)
#define MAILBOX_MESSAGE_CONTROL_URGENT BIT7
#define MAILBOX_MESSAGE_CONTROL_TYPICAL 0
//
// Mailbox Message Types
//
#define MAILBOX_MESSAGE_TYPE_DEBUG 0x00
#define MAILBOX_MESSAGE_TYPE_ADDRESS 0x05
#define MAILBOX_MESSAGE_TYPE_USER 0x06
//
// Mailbox Message Type 0x00 - Debug message
//
#define MAILBOX_DEBUG_MESSAGE_SUBTYPE_REGISTER_READ 0x01
#define MAILBOX_DEBUG_MESSAGE_SUBTYPE_REGISTER_WRITE 0x02
//
// Debug message data format
// Bit 31:16 - Refer to definition of COMMON_MESSAGE_ENCODE
// Bit 15:0 - Store lower 16-bit of the upper 64-bit address
//
#define MAILBOX_DEBUG_MESSAGE_ENCODE(Subtype,Address) \
( \
(COMMON_MESSAGE_ENCODE ( \
MAILBOX_MESSAGE_TYPE_DEBUG, \
(Subtype), \
MAILBOX_MESSAGE_CONTROL_TYPICAL)) | \
((Address) & 0xFFFF) \
)
//
// Mailbox Message Type 0x05 - Address message
//
#define MAILBOX_ADDRESS_MESSAGE_SUBTYPE_PCC 0x03
//
// Address message data format
// Bit 31:16 - Refer to definition of COMMON_MESSAGE_ENCODE
// Bit 15:8 - Message Parameter
// Bit 7:4 - Address message control bit
// 0x4: 256 alignment
// 0x0: No alignment
// Bit 3:0 - Unused
//
#define MAILBOX_ADDRESS_MESSAGE_ENCODE(Subtype,Param,Align) \
( \
(COMMON_MESSAGE_ENCODE ( \
MAILBOX_MESSAGE_TYPE_ADDRESS, \
(Subtype), \
MAILBOX_MESSAGE_CONTROL_TYPICAL)) | \
((Param) << 8) | \
((Align) << 4) \
)
#define MAILBOX_ADDRESS_URGENT_MESSAGE_ENCODE(Subtype,Param,Align) \
( \
(COMMON_MESSAGE_ENCODE ( \
MAILBOX_MESSAGE_TYPE_ADDRESS, \
(Subtype), \
MAILBOX_MESSAGE_CONTROL_URGENT)) | \
((Param) << 8) | \
((Align) << 4) \
)
#define MAILBOX_ADDRESS_256_ALIGNMENT 0x4
#define MAILBOX_ADDRESS_NO_ALIGNMENT 0x0
#define MAILBOX_ADDRESS_MESSAGE_PARAM_CPPC 0x01
#define MAILBOX_URGENT_CPPC_MESSAGE \
( \
MAILBOX_ADDRESS_URGENT_MESSAGE_ENCODE ( \
MAILBOX_ADDRESS_MESSAGE_SUBTYPE_PCC, \
MAILBOX_ADDRESS_MESSAGE_PARAM_CPPC, \
MAILBOX_ADDRESS_256_ALIGNMENT) \
)
#define MAILBOX_TYPICAL_PCC_MESSAGE \
( \
MAILBOX_ADDRESS_MESSAGE_ENCODE ( \
MAILBOX_ADDRESS_MESSAGE_SUBTYPE_PCC, \
0, \
MAILBOX_ADDRESS_256_ALIGNMENT) \
)
//
// Mailbox Message Type 0x06 - User message
//
#define MAILBOX_USER_MESSAGE_SUBTYPE_SET_CONFIGURATION 0x02
#define MAILBOX_USER_MESSAGE_SUBTYPE_BOOT_PROGRESS 0x06
#define MAILBOX_USER_MESSAGE_SUBTYPE_TRNG_PROXY 0x07
//
// User message data format
// Bit 31:16 - Refer to definition of COMMON_MESSAGE_ENCODE
// Bit 15:8 - Message Parameter 0
// Bit 7:0 - Message Parameter 1
//
#define MAILBOX_USER_MESSAGE_ENCODE(Subtype,Param0,Param1) \
( \
(COMMON_MESSAGE_ENCODE ( \
MAILBOX_MESSAGE_TYPE_USER, \
(Subtype), \
MAILBOX_MESSAGE_CONTROL_TYPICAL)) | \
((Param0) << 8) | \
(Param1) \
)
//
// Parameters for True RNG Proxy Message
// Param0: 1 - Get a random number
// Param1: Unused
//
#define MAILBOX_TRNG_PROXY_GET_RANDOM_NUMBER 1
//
// Parameters for Boot Progress
// Param0: 1 - Set boot state
// Param1: Boot stage value
// 0x08: BL33/UEFI Stage
//
#define MAILBOX_BOOT_PROGRESS_COMMAND_SET 1
#define MAILBOX_BOOT_PROGRESS_STAGE_UEFI 8
//
// Parameters for Set Configuration
// Param0: Configuration type
// 20: Turbo configuration
// Param1: Unused
//
#define MAILBOX_SET_CONFIGURATION_TURBO 20
/**
Read a register which is not accessible from the non-secure world
by sending a mailbox message to the SMpro processor.
Note that not all addresses are allowed.
@param[in] Socket Active socket index.
@param[in] Address A 64-bit register address to be read.
@param[out] Value A pointer to the read value.
@retval EFI_SUCCESS Read the register successfully.
@retval EFI_UNSUPPORTED The register is not allowed.
@retval Otherwise Errors returned from MailboxWrite/MailboxRead() functions.
**/
EFI_STATUS
EFIAPI
MailboxMsgRegisterRead (
IN UINT8 Socket,
IN UINTN Address,
OUT UINT32 *Value
);
/**
Write a value to a register which is not accessible from the non-secure world
by sending a mailbox message to the SMpro processor.
Note that not all addresses are allowed.
@param[in] Socket Active socket index.
@param[in] Address A 64-bit register address to be written.
@param[in] Value The value to be written to the register.
@retval EFI_SUCCESS Write the register successfully.
@retval EFI_INVALID_PARAMETER A parameter is invalid.
@retval Otherwise Errors returned from the MailboxWrite() function.
**/
EFI_STATUS
EFIAPI
MailboxMsgRegisterWrite (
IN UINT8 Socket,
IN UINTN Address,
IN UINT32 Value
);
/**
Set the PCC shared Memory Address to service handlers in the System Control Processors,
using for communication between the System Firmware and OSPM.
@param[in] Socket Active socket index.
@param[in] Doorbell Doorbell index which is numbered like DOORBELL_CHANNELS.
@param[in] AddressAlign256 Enable/Disable 256 alignment.
@param[in] Address The shared memory address.
@retval EFI_SUCCESS Set the shared memory address successfully.
@retval EFI_INVALID_PARAMETER A parameter is invalid.
@retval Otherwise Errors returned from the MailboxWrite() functions.
**/
EFI_STATUS
EFIAPI
MailboxMsgSetPccSharedMem (
IN UINT8 Socket,
IN UINT8 Doorbell,
IN BOOLEAN AddressAlign256,
IN UINTN Address
);
/**
The True RNG is provided by the SMpro processor. This function is to send a mailbox
message to the SMpro to request a 64-bit random number.
@param[out] Buffer A pointer to the read 64-bit random number.
@retval EFI_SUCCESS The operation succeeds.
@retval EFI_INVALID_PARAMETER A parameter is invalid.
@retval Otherwise Errors returned from the MailboxWrite/MailboxRead() functions.
**/
EFI_STATUS
EFIAPI
MailboxMsgGetRandomNumber64 (
OUT UINT8 *Buffer
);
/**
Report the UEFI boot progress to the SMpro.
@param[in] Socket Active socket index.
@param[in] BootStatus The status of the UEFI boot.
@param[in] Checkpoint The UEFI Checkpoint value.
@retval EFI_SUCCESS Set the boot progress successfully.
@retval EFI_INVALID_PARAMETER A parameter is invalid.
@retval Otherwise Errors returned from the MailboxWrite() functions.
**/
EFI_STATUS
EFIAPI
MailboxMsgSetBootProgress (
IN UINT8 Socket,
IN UINT8 BootStatus,
IN UINT32 Checkpoint
);
/**
Configure the Turbo (Max Performance) mode.
@param[in] Socket Active socket index.
@param[in] Enable Enable/Disable the Turbo (Max performance) mode.
@retval EFI_SUCCESS Configure the Turbo successfully.
@retval EFI_INVALID_PARAMETER A parameter is invalid.
@retval Otherwise Errors returned from the MailboxWrite() functions.
**/
EFI_STATUS
EFIAPI
MailboxMsgTurboConfig (
IN UINT8 Socket,
IN BOOLEAN Enable
);
#endif /* SYSTEM_FIRMWARE_INTERFACE_LIB_H_ */

31
Silicon/Ampere/AmpereAltraPkg/Include/Library/TrngLib.h Normal file
View File

@@ -0,0 +1,31 @@
/** @file
RNG (Random Number Generator) Library that uses Hardware RNG in SMpro.
Copyright (c) 2021, Ampere Computing LLC. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef TRNG_LIB_H_
#define TRNG_LIB_H_
/**
Generates a random number by using Hardware RNG in SMpro.
@param[out] Buffer Buffer to receive the random number.
@param[in] BufferSize Number of bytes in Buffer.
@retval EFI_SUCCESS The random value was returned successfully.
@retval EFI_DEVICE_ERROR A random value could not be retrieved
due to a hardware or firmware error.
@retval EFI_INVALID_PARAMETER Buffer is NULL or BufferSize is zero.
**/
EFI_STATUS
EFIAPI
GenerateRandomNumbers (
OUT UINT8 *Buffer,
IN UINTN BufferSize
);
#endif /* TRNG_LIB_H_ */

534
Silicon/Ampere/AmpereAltraPkg/Include/NVParamDef.h Normal file
View File

File diff suppressed because it is too large Load Diff

62
Silicon/Ampere/AmpereAltraPkg/Include/Platform/Ac01.h Normal file
View File

@@ -0,0 +1,62 @@
/** @file
Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef PLATFORM_AC01_H_
#define PLATFORM_AC01_H_
//
// Number of supported sockets in the platform
//
#define PLATFORM_CPU_MAX_SOCKET 2
//
// Maximum number of CPMs in the chip.
//
#define PLATFORM_CPU_MAX_CPM (FixedPcdGet32 (PcdClusterCount))
//
// Number of cores per CPM.
//
#define PLATFORM_CPU_NUM_CORES_PER_CPM (FixedPcdGet32 (PcdCoreCount) / PLATFORM_CPU_MAX_CPM)
//
// Maximum number of cores supported.
//
#define PLATFORM_CPU_MAX_NUM_CORES (PLATFORM_CPU_MAX_SOCKET * PLATFORM_CPU_MAX_CPM * PLATFORM_CPU_NUM_CORES_PER_CPM)
//
// Maximum number of memory region
//
#define PLATFORM_DRAM_INFO_MAX_REGION 16
//
// Maximum number of DDR slots supported
//
#define PLATFORM_DIMM_INFO_MAX_SLOT 32
//
// CSR Address base for slave socket
//
#define SLAVE_SOCKET_BASE_ADDRESS_OFFSET 0x400000000000
//
// SMpro EFUSE Shadow register
//
#define SMPRO_EFUSE_SHADOW0 (FixedPcdGet64 (PcdSmproEfuseShadow0))
//
// 2P Configuration Register
//
#define CFG2P_OFFSET 0x200
//
// Slave socket present
//
#define SLAVE_PRESENT_N BIT1
#endif /* PLATFORM_AC01_H_ */

42
Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/AmpereCpuLib.c Normal file
View File

@@ -0,0 +1,42 @@
/** @file
Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <PiPei.h>
#include <Uefi.h>
#include <Guid/PlatformInfoHob.h>
#include <Library/AmpereCpuLib.h>
#include <Library/DebugLib.h>
#include <Library/HobLib.h>
VOID *mPlatformInfoHob = NULL;
/**
Get the platform HOB data.
@return PLATFORM_INFO_HOB The pointer to the platform HOB data.
**/
PLATFORM_INFO_HOB *
GetPlatformHob (
VOID
)
{
if (mPlatformInfoHob == NULL) {
mPlatformInfoHob = GetNextGuidHob (
&gPlatformInfoHobGuid,
(CONST VOID *)FixedPcdGet64 (PcdSystemMemoryBase)
);
if (mPlatformInfoHob == NULL) {
DEBUG ((DEBUG_ERROR, "%a: Failed to get gPlatformInfoHobGuid!\n", __FUNCTION__));
return NULL;
}
}
return ((PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (mPlatformInfoHob));
}

45
Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/AmpereCpuLib.inf Normal file
View File

@@ -0,0 +1,45 @@
## @file
#
# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
[Defines]
INF_VERSION = 0x0001001B
BASE_NAME = AmpereCpuLib
FILE_GUID = 4ACE898C-4DDC-4EF7-BB6C-91549BDF5B9C
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = AmpereCpuLib
[Sources]
AmpereCpuLibCommon.c
AmpereCpuLib.c
[Packages]
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec
[LibraryClasses]
ArmLib
BaseLib
HobLib
IoLib
NVParamLib
[FixedPcd]
gArmPlatformTokenSpaceGuid.PcdCoreCount
gArmPlatformTokenSpaceGuid.PcdClusterCount
gAmpereTokenSpaceGuid.PcdSmproEfuseShadow0
gArmTokenSpaceGuid.PcdSystemMemoryBase
[Guids]
gPlatformInfoHobGuid

637
Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/AmpereCpuLibCommon.c Normal file
View File

File diff suppressed because it is too large Load Diff

137
Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/RuntimeAmpereCpuLib.c Normal file
View File

@@ -0,0 +1,137 @@
/** @file
Copyright (c) 2021, Ampere Computing LLC. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <PiPei.h>
#include <Uefi.h>
#include <Guid/PlatformInfoHob.h>
#include <Library/AmpereCpuLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/HobLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiRuntimeLib.h>
EFI_EVENT mRuntimeAmpereCpuLibVirtualNotifyEvent = NULL;
VOID *mPlatformInfoHob = NULL;
/**
Get the platform HOB data.
@return PLATFORM_INFO_HOB The pointer to the platform HOB data.
**/
PLATFORM_INFO_HOB *
GetPlatformHob (
VOID
)
{
ASSERT (mPlatformInfoHob != NULL);
return (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (mPlatformInfoHob);
}
/**
Notification function of EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE.
@param Event Event whose notification function is being invoked.
@param Context Pointer to the notification function's context
**/
VOID
EFIAPI
RuntimeAmpereCpuLibVirtualNotify (
IN EFI_EVENT Event,
IN VOID *Context
)
{
EFI_STATUS Status;
//
// Convert the platform HOB address to a virtual address.
//
Status = EfiConvertPointer (0, (VOID **)&mPlatformInfoHob);
ASSERT_EFI_ERROR (Status);
}
/**
Constructor of Runtime Ampere CPU Library Instance.
@param ImageHandle The firmware allocated handle for the EFI image.
@param SystemTable A pointer to the EFI System Table.
@retval EFI_SUCCESS The constructor completed successfully.
@retval Others The constructor did not complete successfully.
**/
EFI_STATUS
EFIAPI
RuntimeAmpereCpuLibConstructor (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
VOID *Hob;
Hob = GetNextGuidHob (
&gPlatformInfoHobGuid,
(CONST VOID *)FixedPcdGet64 (PcdSystemMemoryBase)
);
if (Hob == NULL) {
DEBUG ((DEBUG_ERROR, "%a: Failed to get gPlatformInfoHobGuid!\n", __FUNCTION__));
return EFI_DEVICE_ERROR;
}
mPlatformInfoHob = AllocateRuntimeCopyPool (sizeof (PLATFORM_INFO_HOB), Hob);
ASSERT (mPlatformInfoHob != NULL);
//
// Register notify function for EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE
//
Status = gBS->CreateEventEx (
EVT_NOTIFY_SIGNAL,
TPL_NOTIFY,
RuntimeAmpereCpuLibVirtualNotify,
NULL,
&gEfiEventVirtualAddressChangeGuid,
&mRuntimeAmpereCpuLibVirtualNotifyEvent
);
ASSERT_EFI_ERROR (Status);
return Status;
}
/**
Destructor of Runtime Ampere CPU Library Instance.
@param ImageHandle The firmware allocated handle for the EFI image.
@param SystemTable A pointer to the EFI System Table.
@retval EFI_SUCCESS The destructor completed successfully.
@retval Others The destructor did not complete successfully.
**/
EFI_STATUS
EFIAPI
RuntimeAmpereCpuLibDestructor (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
//
// Close the Set Virtual Address Map event
//
Status = gBS->CloseEvent (mRuntimeAmpereCpuLibVirtualNotifyEvent);
ASSERT_EFI_ERROR (Status);
return Status;
}

50
Silicon/Ampere/AmpereAltraPkg/Library/AmpereCpuLib/RuntimeAmpereCpuLib.inf Normal file
View File

@@ -0,0 +1,50 @@
## @file
#
# Copyright (c) 2021, Ampere Computing LLC. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
[Defines]
INF_VERSION = 0x0001001B
BASE_NAME = RuntimeAmpereCpuLib
FILE_GUID = 5BE8FCAD-5D7E-4696-948A-E90970CA442E
MODULE_TYPE = DXE_RUNTIME_DRIVER
VERSION_STRING = 1.0
LIBRARY_CLASS = AmpereCpuLib
CONSTRUCTOR = RuntimeAmpereCpuLibConstructor
DESTRUCTOR = RuntimeAmpereCpuLibDestructor
[Sources]
AmpereCpuLibCommon.c
RuntimeAmpereCpuLib.c
[Packages]
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec
[LibraryClasses]
ArmLib
BaseLib
HobLib
IoLib
MemoryAllocationLib
NVParamLib
UefiRuntimeLib
[FixedPcd]
gArmPlatformTokenSpaceGuid.PcdCoreCount
gArmPlatformTokenSpaceGuid.PcdClusterCount
gAmpereTokenSpaceGuid.PcdSmproEfuseShadow0
gArmTokenSpaceGuid.PcdSystemMemoryBase
[Guids]
gEfiEventVirtualAddressChangeGuid
gPlatformInfoHobGuid

Some files were not shown because too many files have changed in this diff Show More