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docs/variants/asus_kgpe_d16/setup.md: improvements
Signed-off-by: Maciej Pijanowski <maciej.pijanowski@3mdeb.com>
This commit is contained in:
@@ -18,8 +18,9 @@ able to attach to various SPI modules footprints and sockets. The DIP-8 adapter
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is put into the DIP-8 socket on the mainboard, which allows attaching the
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qspimux SPI multiplexer. The multiplexer is responsible for switching between
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the external SPI lines and the mainboard lines routed to the external SPi flash
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chip. The external flash chip is soldered an a SOIC8 adapter, which is
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connected to the qspimux. The connection of the RTE and qspimux is as follows:
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chip. The external flash chip is soldered on a SOIC8 adapter, which is
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connected to the qspimux. The connection of the
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[RTE](https://3mdeb.com/open-source-hardware/#rte)and qspimux is as follows:
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RTE header J7 pin | qspimux J101 pin
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:-----------------:|:-------------------:
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@@ -32,13 +33,15 @@ connected to the qspimux. The connection of the RTE and qspimux is as follows:
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7 (NC) | Not connected
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8 (NC) | Not connected
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Additionally one has to tie the IO3_HOLD_PROG (qspimux pin 4) high, so connect
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it to the 3.3V permanently. One more additional GPIO is required in order to
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control the routing of SPI lines. The MUX_SEL (qsppimux pin 9) decides whether
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Additionally, one has to tie the IO3_HOLD_PROG (qspimux pin 4) high, so connect
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it to the 3.3V permanently. One more additional GPIO is required to control the
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routing of SPI lines. The MUX_SEL (qsppimux pin 9) decides whether
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the programmer is allowed to access the SPI flash or the mainboard.
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The proposed connection used RTE GPIO400 to control MUX_SEL and RTE GPIO401 to
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control IO3_HOLD_PROG. Simple flashing script looks as follows:
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The proposed connection used [RTE](https://3mdeb.com/open-source-hardware/#rte)
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GPIO400 to control MUX_SEL and
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[RTE](https://3mdeb.com/open-source-hardware/#rte) GPIO401 to control
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IO3_HOLD_PROG. Simple flashing script looks as follows:
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```
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# select flash <-> programmer
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@@ -61,7 +64,7 @@ echo "1" > /sys/class/gpio/gpio400/value
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> qspimux schematics: https://github.com/felixheld/qspimux/blob/master/qspimux/qspimux.pdf
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> qspimux schematic is available [here](https://github.com/felixheld/qspimux/blob/master/qspimux/qspimux.pdf)
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#### Serial
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@@ -75,8 +78,10 @@ via RS232 DB9 cable.
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Asus KGPE-D16 has a LPC header for TPM or debugging. Since there is no other
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option to connect a TPM, we use the header for that purpose.
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Example connection of PC Engines TPM 20pin module (tpm1a) to TPM header on
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KGPE-D16:
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Example connection of the
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[PC Engines TPM 20pin module](https://3mdeb.com/shop/modules/modules-lpn-plant/tpm-2-0/)
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([tpm1a](https://www.pcengines.ch/schema/tpm1a.pdf)) to the TPM header on the
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KGPE-D16 board:
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@@ -93,7 +98,7 @@ KGPE-D16:
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| V3 pin 18 | TPM pin 9 (+3V) |
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| SERIRQ pin 19 | TPM pin 16 (SERIRQ) |
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> For PC Engines TPM pinout refer to https://www.pcengines.ch/schema/tpm1a.pdf
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> PC Engines TPM schematic is available [here](//www.pcengines.ch/schema/tpm1a.pdf)
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#### Power management
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@@ -106,13 +111,13 @@ Asus KGPE-D16 provides a front panel pin header (PANEL1):
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| 8 (OC buffer output) | PANEL1 pin 11 (PWR) |
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| 9 (OC buffer output) | PANEL1 pin 17 (RESET) |
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Additionally connect one of the PANEL1 ground pins to one of the ground pins on
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Additionally, connect one of the PANEL1 ground pins to one of the ground pins on
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RTE.
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### MANUAL
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### Manunal
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For more details about KGPE-D16 refer to the manual:
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https://dlcdnets.asus.com/pub/ASUS/mb/SocketG34(1944)/KGPE-D16/Menual_QVL/E8847_KGPE-D16.pdf
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For more details about the KGPE-D16, refer to
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[the manual](https://raw.githubusercontent.com/Dasharo/docs/master/pdf/E8847_KGPE-D16.pdf).
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### Theory of operation
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@@ -178,7 +183,7 @@ else
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fi
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```
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To turn off the pwoer from the platform `./sonoff.sh off` and to turn it on
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To turn off the power from the platform `./sonoff.sh off` and to turn it on
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`./sonoff.sh on`. Invoking the script without any argument will print the
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current state of the switch.
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@@ -203,12 +208,20 @@ A short demo presenting RTE capabilities with KGPE-D16:
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### Remote access
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if you are interested in developing coreboot on KGPE-D16 and have some spare
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If you are interested in developing coreboot on KGPE-D16 and have some spare
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time, there is a possibility to obtain the access to the hardware. Drop us an
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email to [leads@3mdeb.com](mailto:leads@3mdeb.com) with a request.
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### Newsletter
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If you are interested in this project, you can subscribe to the
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[Dasharo KGPE-D16 Newsletter](https://newsletter.3mdeb.com/subscription/ozes4Jxuo).
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If you are interested in the Dasharo in general, you are welcome to subscribe
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to the [Dasharo Newsletter](https://newsletter.3mdeb.com/subscription/wwL90UkXP).
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### Gallery
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