protectli/vault_glk: Add VP2410 blobs and FSP with license

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
This commit is contained in:
Michał Żygowski
2024-01-03 14:20:24 +01:00
committed by Maciej Pijanowski
parent df076ac620
commit c23faebc6b
13 changed files with 5104 additions and 0 deletions
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INTEL END USER SOFTWARE LICENSE AGREEMENT
IMPORTANT - READ BEFORE COPYING, INSTALLING OR USING.
THE FOLLOWING NOTICE, OR TERMS AND CONDITIONS SUBSTANTIALLY IDENTICAL IN NATURE AND EFFECT, MUST APPEAR IN THE DOCUMENTATION ASSOCIATED WITH THE INTEL-BASED PRODUCT INTO WHICH THE SOFTWARE IS INSTALLED. MINIMALLY, SUCH NOTICE MUST APPEAR IN THE USER GUIDE FOR THE PRODUCT. THE TERM “LICENSEE IN THIS TEXT REFERS TO THE END USER OF THE PRODUCT.
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(b) Licensee may not reverse engineer, decompile, or disassemble the Software.
(c) Licensee may not sublicense the Software.
(d) The Software may contain the software and other intellectual property of third party suppliers, some of which may be identified in, and licensed in accordance with, an enclosed license.txt file or other text or file.
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EXPORT LAWS. Licensee agrees that neither Licensee nor Licensees subsidiaries will export/re-export the Software, directly or indirectly, to any country for which the U.S. Department of Commerce or any other agency or department of the U.S. Government or the foreign government from where it is shipping requires an export license, or other governmental approval, without first obtaining any such required license or approval. In the event the Software is exported from the U.S.A. or re-exported from a foreign destination by Licensee, Licensee will ensure that the distribution and export/re-export or import of the Software complies with all laws, regulations, orders, or other restrictions of the U.S. Export Administration Regulations and the appropriate foreign government.
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Licensees specific rights may vary from country to country.
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Platform-specific blobs are placed in respective directories:
- [vault_cml](vault_cml) - Protectli VP4630/VP4650/VP4670 blobs
- [vault_glk](vault_glk) - Protectli VP2410 blobs
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/** @file
Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or
other materials provided with the distribution.
* Neither the name of Intel Corporation nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGE.
This file is automatically generated. Please do NOT modify !!!
**/
#ifndef __FSPUPD_H__
#define __FSPUPD_H__
#include <FspEas.h>
#pragma pack(1)
#define FSPT_UPD_SIGNATURE 0x545F4450554B4C47 /* 'GLKUPD_T' */
#define FSPM_UPD_SIGNATURE 0x4D5F4450554B4C47 /* 'GLKUPD_M' */
#define FSPS_UPD_SIGNATURE 0x535F4450554B4C47 /* 'GLKUPD_S' */
#pragma pack()
#endif
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/** @file
Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or
other materials provided with the distribution.
* Neither the name of Intel Corporation nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGE.
This file is automatically generated. Please do NOT modify !!!
**/
#ifndef __FSPTUPD_H__
#define __FSPTUPD_H__
#include <FspUpd.h>
#pragma pack(1)
/** Fsp T Common UPD
**/
typedef struct {
/** Offset 0x0020
**/
UINT8 Revision;
/** Offset 0x0021
**/
UINT8 Reserved2[3];
/** Offset 0x0024
**/
UINT32 MicrocodeRegionBase;
/** Offset 0x0028
**/
UINT32 MicrocodeRegionLength;
/** Offset 0x002C
**/
UINT32 CodeRegionBase;
/** Offset 0x0030
**/
UINT32 CodeRegionLength;
/** Offset 0x0034
**/
UINT8 Reserved1[12];
} FSPT_COMMON_UPD;
/** Fsp T Configuration
**/
typedef struct {
/** Offset 0x0040
**/
UINT8 ReservedFsptUpd;
/** Offset 0x0041
**/
UINT8 ReservedFsptUpd1[15];
} FSP_T_CONFIG;
/** Fsp T UPD Configuration
**/
typedef struct {
/** Offset 0x0000
**/
FSP_UPD_HEADER FspUpdHeader;
/** Offset 0x0020
**/
FSPT_COMMON_UPD FsptCommonUpd;
/** Offset 0x0040
**/
FSP_T_CONFIG FsptConfig;
/** Offset 0x0050
**/
UINT8 UnusedUpdSpace0[6];
/** Offset 0x0056
**/
UINT16 UpdTerminator;
} FSPT_UPD;
#pragma pack()
#endif
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# Protectli VP2410 blobs
The directory contains blobs to produce a full Dasharo firmware image
for Protectli VP2410 platform.
Do not use or load software from this repository until you have carefully read
the licenses assigned to the relevant components. By downloading or using the
software component from this repository, you agree to the terms of license
associated with the given software component. If you do not wish to so agree,
do not install or use the software from this repository. Association of the
software components and licenses is presented below.
* `ifwi.bin` - Intel Management Engine/Trusted Execution Engine
* Version: v4.0.50.2083,
* License: [PV Intel OBL Software License Agreement 11.2.2017][INTEL SLA]
* `descriptor.bin` - Intel Flash Descriptor
* Version: v1.0,
* License: [PV Intel OBL Software License Agreement 11.2.2017][INTEL SLA]
* `GeminiLakeFspBinPkg` - Intel Firmware Support Package for GeminiLake, based
on the GeminiLake Silicon Initialization Code 2.2.1.3 obtained from Intel
* Version: v2.2.1.3.2,
* License: [Intel FSP/SIC Software License Agreement][INTEL FSP SIC SLA]
with permission to use only on Protectli VP2410 platform
* Changelog:
* v2.2.1.3.2
* Improved memory information reporting
* v2.2.1.3.1
* Fixed the scripts and code to build FSP with EDK2 vUDK2017 and GCC
* Added proper debug libraries to all modules allowing complete
debugging of the FSP during boot
* Fixed handling MRC cache when CSE boot assistance is not leveraged
* Updated Graphics PEIM to a newer version
* Program CLKREQ GPIO RX/TX bits only when PCIe power sequencing is not
skipped
* Disable DPTF BAR programming by FSP, breaking the PCI enumeration in
coreboot and conflicting PCI resources with graphics
* Fixed VT-d initialization as per Geminilake IAFW Specification
* Skip setting IA untrusted mode in FSP, coreboot already does it
* Allow configuring USB SSIC ports with FSP UPDs
* v2.2.1.3.0 - unmodified GeminiLake Silicon Initialization Code 2.2.1.3
Intel Management Engine/Trusted Execution Engine and Flash Descriptor have
been generated from Intel TXE 4.0.50.2083 software kit using genuine
components provided by Intel, subject to the
[PV Intel OBL Software License Agreement 11.2.2017][INTEL SLA].
You can verify the binary hashes using signatures made by the Dasharo release
keys for given platform available on [3mdeb-secpack](https://github.com/3mdeb/3mdeb-secpack).
Current signing key: [Dasharo release 1.1.x for Protectli signing key][KEY].
```bash
gpg -v --verify SHA256SUMS.sig SHA256SUMS
sha256sum -c SHA256SUMS
```
[INTEL SLA]: ../../licenses/pv%20intel%20obl%20software%20license%20agreement%2011.2.2017.pdf
[INTEL FSP SIC SLA]: ../../licenses/INTEL_FSP_SIC_LICENSE.txt
[KEY]: https://github.com/3mdeb/3mdeb-secpack/blob/master/customer-keys/protectli/release-keys/dasharo-release-1.1.x-for-protectli-signing-key.asc
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2182981c8d83b550690c6d66ea3fd53f435026822e513cfe5583b13690852da9 descriptor.bin
6badaa887169222a2d396af0a8532cb9abac57eadc5e902473ffe294847b0e79 ifwi.bin
d17964490c8e6ee550ca52140b59bce02c5e04c334216496725e09463dcb02fa GeminilakeFspBinPkg/Fsp.fd
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-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEaRbDbskCU6zvH0Zd/Nj72IHpb0MFAmWVXtQACgkQ/Nj72IHp
b0PLwg//boVxIS70/93mApRLnumhv+RvLuHtYhBqbwYlAXtEmmanM7NmfCA0qhiN
F3DXs+0aFSDWH/Mc3o2z72dPH4tgWTqulA7nq10pY13H4QiQKMPZ7QZCNPucLv0q
T68R4vWiGmXFPCExl3rqo6D2ddEPK94Q+xQyI/m0fNqyLHETLoBAFEbwl1OyCjog
dWLeQfMWmdYJglPweCYRDhqkP5uHbEj+zLx5KbwlE/JDBUkvQ2VlK97I/Ie23Blo
ywr0AMjWOoZEHUNhp7a3BEne9Irh1l972yG5w0wk2d19RFfpOJXih1Vbfdf1MUHy
InikZteieKLEJZ0oEGGoyK8Ry2h/MQASgHwxRIWQNxzBZrydjM+qV8dGvOQiWs/O
9zy7MskphYHmKxvGbv4e2CwjjpytqWCfuJv5d2UYybR4ioeGW3/rlIyXEOSjrFuc
T1kpeBAeynWQFWLYI8pgrnvx7e3lU489c3DPbgAj65KU6HQ4sVRf4aeOhEjg/ird
6yy7MKx9+w6Pu6vrf2fRyWDqJLHQD6BYgQQGpqfOz4rAGi9viYXNgzQhNEiOBgTI
Jejl0LGvVrqhMopMFcHVer8KHv0S6l8RwaQYSSk6nRoBAqOSvqDSq8ZeHwCmgIGj
P65h3xKFGv+zvK5A9DbdWGLegMRvWoE6gFe5MULZOTzsgRDkP9g=
=++WD
-----END PGP SIGNATURE-----
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