Implement a TPM 2.0 menu item that allows a user to toggle the activation
of PCR banks of the TPM 2.0. After successful activation we shut down the
TPM 2.0 and reset the machine.
Background:
A TPM 2.0 may have multiple PCR banks, such as for SHA1, SHA256, SHA384,
SHA512, and SM3-256. One or multiple of those banks may be active (by
factory for example) and modifying the set of active PCR banks is only
possible while in the firmware since it requires platform authorization.
Platform authorization is not possible for a user when in the OS since
the firmware generates a random password for the platform authorization
before booting the system and it throws that password away.
Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
Specifically added support for 16 and 32bpp files, in addition to
24bpp. The function bmp_show() in bmp.c has had the hardcoded check
for 24bpp replaced with a general bpp check that uses a % to check for
remainder, and returns 1 if the remainder is >0. The previous method
for adjusting the BMP data (raw_data_format_adjust_24bpp) relied on a
preset 3*bytes_per_line_src, this has been changed and the
multiplication is now performed in the function's arguments. This
change still allows someone else to reuse the same function for
1/2/4bpp support if necessary. The file util.h has been modified to
reflect this decision.
The changes to raw_data_format_adjust() is based on an abandoned patch
by Gert Menke (submitted March 14, 2017), credit to them for that
change and the addition of *bpp to bmp_get_info().
Signed-off-by: Joseph S. Pacheco-Corwin <hammersamatom@gmail.com>
It is not necessary to call the vgabios if no vgabios has been
installed. This reduces the amount of hardware accesses on qemu when
the bios is not initializing the display hardware, and it can reduce
the boot time by a couple of milliseconds.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
In order to speed up the boot phase, we can check the QEMU
debugcon device, and disable the writes if it is not recognized.
This patch allow us to save around 10 msec (time measured
between SeaBIOS entry point and "linuxboot" entry point)
when CONFIG_DEBUG_LEVEL=1 and debugcon is not enabled.
Signed-off-by: Stefano Garzarella <sgarzare@redhat.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
In contrast to other allocations made by pvscsi_init_rings(),
ring_desc is only used internally by SeaBIOS (not passed to
device-controller) and there is not restriction which force
it to be page aligned.
Reviewed-by: Mark Kanda <mark.kanda@oracle.com>
Signed-off-by: Liran Alon <liran.alon@oracle.com>
The max number of targets per PVSCSI controller is 64, not 7.
This can easily be seen in QEMU PVSCSI emulation code
(hw/scsi/vmw_pvscsi.c) as PVSCSI_MAX_DEVS, which defines the
number of targets, have value of 64.
Fixes: 83d60b3c47 ("Add pvscsi boot support")
Reviewed-by: Liran Alon <liran.alon@oracle.com>
Reviewed-by: Mark Kanda <mark.kanda@oracle.com>
Signed-off-by: Shmuel Eiderman <shmuel.eiderman@oracle.com>
Commit 4b42cc4 [SeaVGABios/cbvga: Advertise correct pixel format] neglected
to wrap the cbfb mask size components in GET_FARVAR(), which resulted in a
bogus value for bpp, breaking output on most/all devices. Fix this by
adding GET_FARVAR() as appropriate.
Additionally, some newer ChromeOS devices still fail even with this fix,
so fall back to using the coreboot reported bit depth if the calculated
valid is invalid.
TEST: build/boot a variety of devices (google/[reef,eve], purism/librem_skl)
using coreboot framebuffer init, verify SeaBIOS boot menu prompt visible.
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
It appears some sd cards need additional time to initialize after
power on.
Reported-by: Chris <coderight@gmail.com>.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Commit cd47172 changed the I/O queue length calculation to use the
Maximum Queue Entries Supported (MQES) value from the capabilities
register, plus one, with a maximum value of NVME_PAGE_SIZE.
An unintended effect from this is that due to length being an unsigned
16-bit int, a MQES value of 0xFFFF yields a length of zero, resulting
in the queue allocation failing. Fix this by changing length to a u32.
TEST: build/boot on a Purism Librem13v2 with a MyDigitalSSD BPX NVMe
drive, which reports a MQES of 0xFFFF. Verify NVMe drive present in
boot menu and OS boots successfully.
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Recent versions of the iasl compiler raise an error if the table id is
longer than 8 characters. Older versions of iasl would silently
truncate the table id to 8 characters. Change the ssdt-misc and
ssdt-pcihp files to use an 8 character id - this should not directly
impact the generated aml code as the table id was already being
truncated - but may help those wishing to manually compile the tables.
Reported by Michael Tokarev, Vivia Nikolaidou, and several others.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
There is no need to skip text mode clearing.
Clearing the framebuffer should be safe on legacy calls too.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Add support for qemu ramfb. This is a simple boot framebuffer device,
with normal ram being used to back the framebuffer and fw_cfg being used
to configure the device.
Use case (on x86): boot display for vgpu devices (which neither emulate
vga nor have a vgabios).
Sharing fw_cfg code with seabios turned out to be difficuilt due to
various dependencies the code has on infrastructure which only seabios
has. So include a copy of the code here, with those dependencies
removed and also stripped down because we don't need a non-dma fallback
here.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Stefan Berger
Kevin O'Connor
Joseph Pacheco-Corwin
Stefano Garzarella
Liran Alon
Stephen Douthit
Shmuel Eiderman
Gerd Hoffmann
Matt DeVillier
Jing Liu