mirror of
https://github.com/ARMSX2/ARMSX3.git
synced 2026-08-24 16:58:52 -07:00
[SPU ASMJIT] Optimize FCGT, FM, FCMGT
Optimize the float multiply and compare methods by taking advantage of the `denormals-are-zero` flag, removing duplicated logic, and generally doing things more efficiently.
This commit is contained in:
Walter
Elad
@@ -3505,51 +3505,45 @@ void spu_recompiler::ANDC(spu_opcode_t op)
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void spu_recompiler::FCGT(spu_opcode_t op)
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{
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const auto last_exp_bit = XmmConst(v128::from32p(0x00800000));
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const auto all_exp_bits = XmmConst(v128::from32p(0x7f800000));
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// denormals are implicitly treated as zero (DAZ flag)
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const XmmLink& tmp0 = XmmAlloc();
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const XmmLink& tmp1 = XmmAlloc();
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const XmmLink& tmp2 = XmmAlloc();
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const XmmLink& tmp3 = XmmAlloc();
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const XmmLink& tmpv = XmmAlloc();
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const XmmLink& va = XmmAlloc();
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const XmmLink& vb = XmmAlloc();
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c->movaps(va, SPU_OFF_128(gpr, op.ra));
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c->movaps(vb, SPU_OFF_128(gpr, op.rb));
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c->pxor(tmp0, tmp0);
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c->pxor(tmp1, tmp1);
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c->cmpps(tmp0, SPU_OFF_128(gpr, op.ra), 3); //tmp0 is true if a is extended (nan/inf)
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c->cmpps(tmp1, SPU_OFF_128(gpr, op.rb), 3); //tmp1 is true if b is extended (nan/inf)
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if (utils::has_avx512())
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{
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const XmmLink& v0 = XmmAlloc();
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const XmmLink& v1 = XmmAlloc();
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c->vxorps(v0, v0, v0);
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c->vmovaps(v1, XmmConst(v128::from32p(0x111111ff)));
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c->vfixupimmps(v0, va, v1, 0); // NaN -> -FLT_MAX, else src2
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c->vfixupimmps(v1, vb, v1, 0);
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c->vandps(va, va, v0); // -FLT_MAX = ~(1<<23)
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c->vandps(vb, vb, v1);
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c->vcmpps(va, vb, va, 1 /* < */);
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c->vmovaps(SPU_OFF_128(gpr, op.rt), va);
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return;
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}
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//compute lower a and b
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c->movaps(tmp2, last_exp_bit);
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c->movaps(tmp3, last_exp_bit);
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c->pandn(tmp2, SPU_OFF_128(gpr, op.ra)); //tmp2 = lowered_a
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c->pandn(tmp3, SPU_OFF_128(gpr, op.rb)); //tmp3 = lowered_b
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const XmmLink& v0 = XmmAlloc();
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const XmmLink& v1 = XmmAlloc();
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const XmmLink& vt = XmmAlloc();
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c->xorps(v0, v0);
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c->xorps(v1, v1);
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c->cmpps(v0, va, 3 /* isNaN */);
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c->cmpps(v1, vb, 3);
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//lower a if extended
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c->movaps(tmpv, tmp0);
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c->pand(tmpv, tmp2);
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c->pandn(tmp0, SPU_OFF_128(gpr, op.ra));
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c->orps(tmp0, tmpv);
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// decrease exponent if in extended range
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c->movaps(vt, XmmConst(v128::from32p(1<<23)));
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c->andps(v0, vt);
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c->andps(v1, vt);
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c->andnps(v0, va);
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c->andnps(v1, vb);
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//lower b if extended
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c->movaps(tmpv, tmp1);
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c->pand(tmpv, tmp3);
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c->pandn(tmp1, SPU_OFF_128(gpr, op.rb));
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c->orps(tmp1, tmpv);
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//flush to 0 if denormalized
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c->pxor(tmpv, tmpv);
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c->movaps(tmp2, SPU_OFF_128(gpr, op.ra));
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c->movaps(tmp3, SPU_OFF_128(gpr, op.rb));
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c->andps(tmp2, all_exp_bits);
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c->andps(tmp3, all_exp_bits);
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c->cmpps(tmp2, tmpv, 0);
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c->cmpps(tmp3, tmpv, 0);
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c->pandn(tmp2, tmp0);
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c->pandn(tmp3, tmp1);
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c->cmpps(tmp3, tmp2, 1);
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c->movaps(SPU_OFF_128(gpr, op.rt), tmp3);
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c->cmpps(v1, v0, 1 /* < */);
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c->movaps(SPU_OFF_128(gpr, op.rt), v1);
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}
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void spu_recompiler::DFCGT(spu_opcode_t op)
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@@ -3573,55 +3567,47 @@ void spu_recompiler::FS(spu_opcode_t op)
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void spu_recompiler::FM(spu_opcode_t op)
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{
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const auto sign_bits = XmmConst(v128::from32p(0x80000000));
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const auto all_exp_bits = XmmConst(v128::from32p(0x7f800000));
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const XmmLink& va = XmmGet(op.ra, XmmType::Float);
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const XmmLink& vb = XmmGet(op.rb, XmmType::Float);
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const XmmLink& tmp0 = XmmAlloc();
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const XmmLink& tmp1 = XmmAlloc();
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const XmmLink& tmp2 = XmmAlloc();
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const XmmLink& tmp3 = XmmAlloc();
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const XmmLink& tmp4 = XmmGet(op.ra, XmmType::Float);
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const XmmLink& tmp5 = XmmGet(op.rb, XmmType::Float);
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if (utils::has_avx512())
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{
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const XmmLink& v0 = XmmAlloc();
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const XmmLink& v1 = XmmAlloc();
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const XmmLink& v2 = XmmAlloc();
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c->vxorps(v1, v1, v1);
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c->vcmpps(v2, va, v1, 0 /* == */);
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c->vcmpps(v1, vb, v1, 0);
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c->vmulps(v0, va, vb);
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c->vpternlogd(va, vb, XmmConst(v128::from32p(0x7fffffff)), 0xbe /* orCxorAB */);
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c->vfixupimmps(va, v0, XmmConst(v128::from32p(0x11001800)), 0); // inf & NaN -> src1, denormals/0 -> +0.0, finite -> src2
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c->vpternlogd(v1, v2, va, 0x2 /*andC!orAB*/);
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c->vmovaps(SPU_OFF_128(gpr, op.rt), v1);
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return;
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}
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//check denormals
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c->pxor(tmp0, tmp0);
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c->movaps(tmp1, all_exp_bits);
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c->movaps(tmp2, all_exp_bits);
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c->andps(tmp1, tmp4);
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c->andps(tmp2, tmp5);
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c->cmpps(tmp1, tmp0, 0);
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c->cmpps(tmp2, tmp0, 0);
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c->orps(tmp1, tmp2); //denormal operand mask
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const XmmLink& v0 = XmmAlloc();
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const XmmLink& v1 = XmmAlloc();
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c->xorps(v0, v0);
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c->xorps(v1, v1);
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c->cmpps(v0, va, 0 /* == */);
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c->cmpps(v1, vb, 0 /* == */);
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c->orps(v1, v0);
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//compute result with flushed denormal inputs
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c->movaps(tmp2, tmp4);
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c->mulps(tmp2, tmp5); //primary result
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c->movaps(tmp3, tmp2);
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c->andps(tmp3, all_exp_bits);
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c->cmpps(tmp3, tmp0, 0); //denom mask from result
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c->orps(tmp3, tmp1);
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c->andnps(tmp3, tmp2); //flushed result
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c->movaps(v0, va);
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c->mulps(v0, vb);
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c->xorps(va, vb);
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c->orps(va, XmmConst(v128::from32p(0x7fffffff)));
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//compute results for the extended path
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c->andps(tmp2, all_exp_bits);
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c->cmpps(tmp2, all_exp_bits, 0); //extended mask
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c->movaps(tmp4, sign_bits);
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c->movaps(tmp5, sign_bits);
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c->movaps(tmp0, sign_bits);
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c->andps(tmp4, SPU_OFF_128(gpr, op.ra));
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c->andps(tmp5, SPU_OFF_128(gpr, op.rb));
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c->xorps(tmp4, tmp5); //sign mask
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c->pandn(tmp0, tmp2);
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c->orps(tmp4, tmp0); //add result sign back to original extended value
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c->movaps(tmp5, tmp1); //denormal mask (operands)
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c->andnps(tmp5, tmp4); //max_float with sign bit (nan/-nan) where not denormal or zero
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//select result
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c->movaps(tmp0, tmp2);
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c->andnps(tmp0, tmp3);
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c->andps(tmp2, tmp5);
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c->orps(tmp0, tmp2);
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c->movaps(SPU_OFF_128(gpr, op.rt), tmp0);
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// saturate extended to copysign(XFLT_MAX, a ^ b)
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c->movaps(vb, XmmConst(v128::from32p(0xff << 23)));
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c->orps(vb, v0);
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c->pcmpeqd(vb, v0);
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c->andps(va, vb);
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c->andnps(vb, v0);
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c->addps(va, vb); // +0.0 + -0.0 -> +0.0 (IEEE rules). SSE propagates QNaN/extended exactly
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c->andnps(v1, va); // zero if either input is denormal/0
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c->movaps(SPU_OFF_128(gpr, op.rt), v1);
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}
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void spu_recompiler::CLGTH(spu_opcode_t op)
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@@ -3656,42 +3642,40 @@ void spu_recompiler::FCMGT(spu_opcode_t op)
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{
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// reverted less-than
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// since comparison is absoulte, a > b if a is extended and b is not extended
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// flush denormals to zero to make zero == zero work
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const auto all_exp_bits = XmmConst(v128::from32p(0x7f800000));
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const auto remove_sign_bits = XmmConst(v128::from32p(0x7fffffff));
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// denormals are implicitly treated as zero (DAZ flag)
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const XmmLink& tmp0 = XmmAlloc();
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const XmmLink& tmp1 = XmmAlloc();
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const XmmLink& tmp2 = XmmAlloc();
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const XmmLink& tmp3 = XmmAlloc();
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const XmmLink& tmpv = XmmAlloc();
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const XmmLink& va = XmmAlloc();
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const XmmLink& vb = XmmAlloc();
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c->movaps(va, SPU_OFF_128(gpr, op.ra));
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c->movaps(vb, SPU_OFF_128(gpr, op.rb));
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c->pxor(tmp0, tmp0);
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c->pxor(tmp1, tmp1);
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c->cmpps(tmp0, SPU_OFF_128(gpr, op.ra), 3); //tmp0 is true if a is extended (nan/inf)
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c->cmpps(tmp1, SPU_OFF_128(gpr, op.rb), 3); //tmp1 is true if b is extended (nan/inf)
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if (utils::has_avx512())
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{
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const XmmLink& vt = XmmAlloc();
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c->vrangeps(vt, va, vb, 0x7 /* maxMagnitude */);
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c->vcmpps(vt, vb, vt, 4 /* != */);
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c->vcmpps(va, va, va, 3 /* isNaN */);
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c->vcmpps(vb, vb, vb, 3);
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c->vpternlogd(va, vb, vt, 0x32 /* orAB?nandBA:C */);
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c->vmovaps(SPU_OFF_128(gpr, op.rt), va);
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return;
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}
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//flush to 0 if denormalized
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c->pxor(tmpv, tmpv);
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c->movaps(tmp2, SPU_OFF_128(gpr, op.ra));
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c->movaps(tmp3, SPU_OFF_128(gpr, op.rb));
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c->andps(tmp2, all_exp_bits);
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c->andps(tmp3, all_exp_bits);
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c->cmpps(tmp2, tmpv, 0);
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c->cmpps(tmp3, tmpv, 0);
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c->pandn(tmp2, SPU_OFF_128(gpr, op.ra));
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c->pandn(tmp3, SPU_OFF_128(gpr, op.rb));
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//Set tmp1 to true where a is extended but b is not extended
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//This is a simplification since absolute values remove necessity of lowering
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c->xorps(tmp0, tmp1); //tmp0 is true when either a or b is extended
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c->pandn(tmp1, tmp0); //tmp1 is true if b is not extended and a is extended
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c->andps(tmp2, remove_sign_bits);
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c->andps(tmp3, remove_sign_bits);
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c->cmpps(tmp3, tmp2, 1);
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c->orps(tmp3, tmp1); //Force result to all true if a is extended but b is not
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c->movaps(SPU_OFF_128(gpr, op.rt), tmp3);
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const XmmLink& v0 = XmmAlloc();
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const XmmLink& v1 = XmmAlloc();
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const XmmLink& vt = XmmAlloc();
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c->pxor(v0, v0);
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c->pxor(v1, v1);
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c->cmpps(v0, va, 3 /* isNaN */);
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c->cmpps(v1, vb, 3);
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c->movaps(vt, XmmConst(v128::from32p(0x7fffffff)));
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c->andps(va, vt);
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c->andps(vb, vt);
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c->cmpps(vb, va, 1 /* < */);
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c->pandn(v1, v0); // a is extended well b isn't
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c->orps(vb, v1);
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c->movaps(SPU_OFF_128(gpr, op.rt), vb);
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}
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void spu_recompiler::DFCMGT(spu_opcode_t op)
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