mirror of
https://github.com/ARMSX2/ARMSX3.git
synced 2026-08-24 16:58:52 -07:00
Improve ARM64 CPU detection and Android device diagnostics
The fallback CPU table was missing cores found in recent handheld SoCs (Cortex-A510, A715, X3, A520, A720, X4). Because get_cpu_name() bails out when any detected MIDR is unknown, a single missing core sent the whole lookup to the cortex-a78 fallback whenever LLVM host detection returned "generic". Display names were also reused as LLVM -mcpu values, which happens to work for the Cortex names but not for Qualcomm Oryon: the display name lowercased to "x-elite", which is not an LLVM processor, so the JIT silently lost per-CPU scheduling. Entries now carry an explicit canonical LLVM name alongside the human-readable one; get_cpu_brand() keeps using the latter. The Qualcomm entry is named "Oryon" rather than "X-Elite" because MIDR 0x51/0x001 only identifies an Oryon core, not the SoC it sits in. MIDRs cannot identify the SoC at all, which made bug reports ambiguous. Android's own SOC_MANUFACTURER/SOC_MODEL are now passed to the core and logged as a separate "SoC:" line, so SoC identity, core topology and the resolved LLVM target are three distinct values. The LLVM target reported by system info now comes from the same resolution path the JIT uses, rather than from the fallback alone, so it no longer disagrees with the target actually compiled for. The Vulkan renderer logs one verdict for the adapter it selected, recording whether BC1-BC3 support keeps DXT textures compressed or whether they are decoded on the CPU. It sits in render_device::create rather than where the flag is resolved, because physical_device::create runs for every GPU of every instance, and not in TextureUtils, whose fallback branches run per texture and per mip level. SoC information travels through a new optional _rpcsx_setSocInfo export instead of an added _rpcsx_initialize parameter. The core is dlopen()ed and can be updated independently of the JNI glue, so changing an existing export's signature would make older glue call it with a garbage argument. Older glue simply never calls the setter, and newer glue null-checks the symbol against older cores. No JIT feature policy and no texture decoding behaviour changed. Verified on an AYN Odin 3 (ayn CQ8725S, 8x Oryon, Adreno 830) running Turnip 26.2.99: SoC line reads "ayn CQ8725S (Snapdragon 8 Elite-class)", the brand line reports Oryon rather than X-Elite, the JIT resolves to oryon-1, and a single BC verdict reports the GPU path. That BC result applies to the Turnip driver tested; stock-driver behaviour is unmeasured.
This commit is contained in:
Zulux91
jpolo1224
@@ -1086,13 +1086,13 @@ const char * fallback_cpu_detection()
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#ifdef ANDROID
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static std::string s_result = []() -> std::string
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{
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// get_cpu_name() already returns a canonical LLVM processor name
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std::string result = aarch64::get_cpu_name();
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if (result.empty())
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{
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return "cortex-a78";
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}
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std::transform(result.begin(), result.end(), result.begin(), ::tolower);
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return result;
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}();
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@@ -20,6 +20,7 @@ struct RPCSXApi {
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bool (*overlayPadData)(int port, int digital1, int digital2, int leftStickX,
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int leftStickY, int rightStickX, int rightStickY);
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bool (*initialize)(std::string_view rootDir, std::string_view user);
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void (*setSocInfo)(std::string_view socInfo);
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bool (*processCompilationQueue)(JNIEnv *env);
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bool (*startMainThreadProcessor)(JNIEnv *env);
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bool (*collectGameInfo)(JNIEnv *env, std::string_view rootDir,
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@@ -104,6 +105,7 @@ struct RPCSXLibrary : RPCSXApi {
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// clang-format off
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result.overlayPadData = reinterpret_cast<decltype(overlayPadData)>(dlsym(handle, "_rpcsx_overlayPadData"));
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result.initialize = reinterpret_cast<decltype(initialize)>(dlsym(handle, "_rpcsx_initialize"));
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result.setSocInfo = reinterpret_cast<decltype(setSocInfo)>(dlsym(handle, "_rpcsx_setSocInfo"));
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result.processCompilationQueue = reinterpret_cast<decltype(processCompilationQueue)>(dlsym(handle, "_rpcsx_processCompilationQueue"));
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result.startMainThreadProcessor = reinterpret_cast<decltype(startMainThreadProcessor)>(dlsym(handle, "_rpcsx_startMainThreadProcessor"));
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result.collectGameInfo = reinterpret_cast<decltype(collectGameInfo)>(dlsym(handle, "_rpcsx_collectGameInfo"));
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@@ -200,7 +202,7 @@ extern "C" JNIEXPORT jboolean JNICALL Java_net_rpcsx_RPCSX_overlayPadData(
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}
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extern "C" JNIEXPORT jboolean JNICALL Java_net_rpcsx_RPCSX_initialize(
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JNIEnv *env, jobject, jstring rootDir, jstring user) {
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JNIEnv *env, jobject, jstring rootDir, jstring user, jstring socInfo) {
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// The core is dlopen()ed separately and may not be up yet -- during
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// onboarding, or if it failed to load. Calling through a null pointer
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// is an instant SIGSEGV, so fail the call instead.
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@@ -208,6 +210,12 @@ extern "C" JNIEXPORT jboolean JNICALL Java_net_rpcsx_RPCSX_initialize(
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return false;
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}
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// Before initialize(), which is where the core assembles its startup log.
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// Null on cores older than this export; the SoC line then reads "unknown".
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if (rpcsxLib.setSocInfo != nullptr) {
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rpcsxLib.setSocInfo(unwrap(env, socInfo));
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}
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return rpcsxLib.initialize(unwrap(env, rootDir), unwrap(env, user));
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}
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@@ -83,4 +83,53 @@ object DeviceTier {
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} catch (_: Throwable) {
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"unknown"
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}
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/** Known annotations for exact SoC model strings. Exact matches only —
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* equivalences are never guessed from CPU topology.
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*
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* CQ8725S is the Qualcomm Dragonwing Q8 part in the AYN Odin 3, confirmed
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* from the device itself (ro.soc.model=CQ8725S, reporting 8 Oryon cores and
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* an Adreno 830). "-class" is deliberate: it is 8 Elite-family silicon, not
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* a claim that the part is identical to the phone SKU. */
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private val socAnnotations = mapOf(
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"QCS8550" to "Snapdragon 8 Gen 2-class",
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"QCS9075" to "Snapdragon 8 Elite-class",
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"CQ8725S" to "Snapdragon 8 Elite-class",
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)
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/** Android reports missing Build fields as the literal [Build.UNKNOWN]
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* ("unknown") rather than null, so that value counts as "not reported" —
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* otherwise diagnostics read "unknown unknown" instead of falling back to
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* Build.HARDWARE. */
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private fun String?.orNotReported(): String? =
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this?.takeIf { it.isNotBlank() && !it.equals(Build.UNKNOWN, ignoreCase = true) }
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/**
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* Pure, JVM-testable formatter for the device's SoC identity, e.g.
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* "Qualcomm QCS8550 (Snapdragon 8 Gen 2-class)".
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*
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* The model is what identifies the SoC, so a manufacturer on its own is not
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* an identity: without a model this falls back to [hardware], the platform
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* codename, which at least names the silicon. Model strings without a known
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* annotation are preserved unchanged. Returns "" when nothing is reported.
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*/
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fun formatSocIdentity(manufacturer: String?, model: String?, hardware: String?): String {
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val socModel = model.orNotReported()
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?: return hardware.orNotReported() ?: ""
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val base = listOfNotNull(manufacturer.orNotReported(), socModel).joinToString(" ")
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val annotation = socAnnotations[socModel]
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return if (annotation != null) "$base ($annotation)" else base
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}
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/** SoC identity from Android's public fields: Build.SOC_MANUFACTURER /
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* Build.SOC_MODEL on API 31+, Build.HARDWARE before that. */
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fun socIdentity(): String = try {
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if (Build.VERSION.SDK_INT >= Build.VERSION_CODES.S)
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formatSocIdentity(Build.SOC_MANUFACTURER, Build.SOC_MODEL, Build.HARDWARE)
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else
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formatSocIdentity(null, null, Build.HARDWARE)
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} catch (_: Throwable) {
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""
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}
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}
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@@ -67,13 +67,8 @@ class AboutViewModel(application: Application) : AndroidViewModel(application) {
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val memoryInfo = ActivityManager.MemoryInfo().also(activityManager::getMemoryInfo)
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val metrics = context.resources.displayMetrics
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val pageBytes = runCatching { Os.sysconf(OsConstants._SC_PAGESIZE) }.getOrDefault(4096L)
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val soc = if (Build.VERSION.SDK_INT >= Build.VERSION_CODES.S) {
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listOf(Build.SOC_MANUFACTURER, Build.SOC_MODEL).filter(String::isNotBlank).joinToString(" ")
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} else {
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Build.HARDWARE
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}
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return DeviceDetails(
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soc = soc.ifBlank { "—" },
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soc = com.armsx2.DeviceTier.socIdentity().ifBlank { "—" },
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gpu = queryGpuRenderer().ifBlank { "—" },
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cpu = Runtime.getRuntime().availableProcessors().toString(),
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memory = String.format(Locale.US, "%.1f GB", memoryInfo.totalMem / 1_073_741_824.0),
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@@ -123,7 +123,7 @@ object Rpcs3Bridge {
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// Discard database configs split by an older build, so a setting later found to
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// break a game is not left applying forever on machines that already downloaded.
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runCatching { com.armsx2.config.ConfigDatabase.purgeIfStale() }
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RPCSX.instance.initialize(RPCSX.rootDirectory, "00000001")
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RPCSX.instance.initialize(RPCSX.rootDirectory, "00000001", com.armsx2.DeviceTier.socIdentity())
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RPCSX.initialized = true
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// Two blocking service loops the core needs someone to run for it.
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@@ -72,7 +72,7 @@ enum class BootResult
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class RPCSX {
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external fun openLibrary(path: String): Boolean
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external fun getLibraryVersion(path: String): String?
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external fun initialize(rootDir: String, user: String): Boolean
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external fun initialize(rootDir: String, user: String, socInfo: String): Boolean
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external fun installFw(fd: Int, progressId: Long): Boolean
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external fun install(fd: Int, progressId: Long): Boolean
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/** Install several .pkg parts of one split package together, in order. */
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@@ -0,0 +1,86 @@
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package com.armsx2
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import org.junit.Assert.assertEquals
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import org.junit.Test
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class DeviceTierTest {
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@Test
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fun qcs8550IsAnnotated() {
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assertEquals(
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"Qualcomm QCS8550 (Snapdragon 8 Gen 2-class)",
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DeviceTier.formatSocIdentity("Qualcomm", "QCS8550", "kalama"),
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)
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}
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@Test
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fun qcs9075IsAnnotated() {
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assertEquals(
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"Qualcomm QCS9075 (Snapdragon 8 Elite-class)",
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DeviceTier.formatSocIdentity("Qualcomm", "QCS9075", "sun"),
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)
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}
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/** AYN Odin 3, as reported by the device: ro.soc.manufacturer=ayn,
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* ro.soc.model=CQ8725S. */
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@Test
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fun cq8725sIsAnnotated() {
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assertEquals(
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"ayn CQ8725S (Snapdragon 8 Elite-class)",
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DeviceTier.formatSocIdentity("ayn", "CQ8725S", "qcom"),
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)
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}
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@Test
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fun unknownModelPassesThroughUnchanged() {
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assertEquals(
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"Qualcomm SM8550",
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DeviceTier.formatSocIdentity("Qualcomm", "SM8550", "kalama"),
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)
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}
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@Test
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fun blankManufacturerKeepsModel() {
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assertEquals(
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"QCS8550 (Snapdragon 8 Gen 2-class)",
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DeviceTier.formatSocIdentity("", "QCS8550", "kalama"),
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)
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}
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@Test
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fun blankModelAndManufacturerFallBackToHardware() {
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assertEquals("kalama", DeviceTier.formatSocIdentity("", "", "kalama"))
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assertEquals("kalama", DeviceTier.formatSocIdentity(null, null, "kalama"))
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}
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/** A manufacturer with no model does not identify the SoC. */
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@Test
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fun manufacturerWithoutModelFallsBackToHardware() {
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assertEquals("kalama", DeviceTier.formatSocIdentity("Qualcomm", "", "kalama"))
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}
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@Test
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fun nothingKnownReturnsEmpty() {
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assertEquals("", DeviceTier.formatSocIdentity("", "", ""))
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assertEquals("", DeviceTier.formatSocIdentity(null, null, null))
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}
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/** Android fills unset Build fields with the literal "unknown". */
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@Test
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fun unknownSentinelFallsBackToHardware() {
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assertEquals("kalama", DeviceTier.formatSocIdentity("unknown", "unknown", "kalama"))
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assertEquals("kalama", DeviceTier.formatSocIdentity("Qualcomm", "unknown", "kalama"))
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}
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@Test
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fun unknownSentinelWithNoHardwareReturnsEmpty() {
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assertEquals("", DeviceTier.formatSocIdentity("unknown", "unknown", "unknown"))
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}
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@Test
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fun unknownManufacturerStillKeepsRealModel() {
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assertEquals(
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"QCS8550 (Snapdragon 8 Gen 2-class)",
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DeviceTier.formatSocIdentity("unknown", "QCS8550", "kalama"),
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)
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}
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}
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@@ -113,6 +113,9 @@ static std::atomic<bool> g_paused_by_surface_loss;
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extern std::string g_android_executable_dir;
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extern std::string g_android_config_dir;
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extern std::string g_android_cache_dir;
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// Exact SoC identity as reported by Android (Build.SOC_MANUFACTURER/SOC_MODEL),
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// handed in through _rpcsx_setSocInfo. MIDRs cannot identify the SoC.
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static std::string g_android_soc_info;
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static std::mutex g_virtual_pad_mutex;
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// One per PS3 pad port. This was a single pad, which silently capped local
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// co-op at one player: every port above the first registered a Pad the app
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@@ -2112,6 +2115,19 @@ extern "C" bool _rpcsx_overlayPadData(int port, int digital1, int digital2,
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return true;
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}
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// Hand the core Android's exact SoC identity. Deliberately a separate export
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// rather than an extra _rpcsx_initialize parameter: the core is dlopen()ed and
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// can be updated independently of the JNI glue that calls it, so changing an
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// existing export's signature would make older glue call it with a garbage
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// argument. Glue that predates this export simply never calls it, and glue that
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// has it null-checks the symbol against older cores.
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//
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// Must be called before _rpcsx_initialize, which is where the startup messages
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// are assembled.
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extern "C" void _rpcsx_setSocInfo(std::string_view socInfo) {
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g_android_soc_info = std::string(socInfo);
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}
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extern "C" bool _rpcsx_initialize(std::string_view rootDir,
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std::string_view user) {
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auto rootDirStr = fix_dir_path(std::string(rootDir));
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@@ -2174,6 +2190,11 @@ extern "C" bool _rpcsx_initialize(std::string_view rootDir,
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logs::stored_message ver{rpcsx_android.always()};
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ver.text = fmt::format("RPCSX-ps3-android v%s", rpcs3::get_version().to_string());
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// Write exact SoC identity (from Android, not inferred from MIDRs)
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logs::stored_message soc{rpcsx_android.always()};
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soc.text = fmt::format(
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"SoC: %s", g_android_soc_info.empty() ? "unknown" : g_android_soc_info);
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// Write System information
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logs::stored_message sys{rpcsx_android.always()};
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sys.text = utils::get_system_info();
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@@ -2186,8 +2207,8 @@ extern "C" bool _rpcsx_initialize(std::string_view rootDir,
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logs::stored_message time{rpcsx_android.always()};
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time.text = fmt::format("Current Time: %s", std::chrono::system_clock::now());
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logs::set_init(
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{std::move(ver), std::move(sys), std::move(os), std::move(time)});
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logs::set_init({std::move(ver), std::move(soc), std::move(sys), std::move(os),
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std::move(time)});
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auto set_rlim = [](int resource, std::uint64_t limit) {
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rlimit64 rlim{};
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@@ -3787,8 +3808,12 @@ extern "C" bool _rpcsx_installKey(JNIEnv *env, int fd, long progressId,
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extern "C" std::string _rpcsx_systemInfo() {
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std::string result;
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fmt::append(result, "%s\n\nLLVM CPU: %s\n\n", utils::get_system_info(),
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fallback_cpu_detection());
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// LLVM CPU reports the same resolution path the JIT actually uses (configured
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// CPU -> LLVM host detection -> project fallback), not just the fallback guess.
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fmt::append(result, "SoC: %s\n\n%s\n\nLLVM CPU: %s\n\n",
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g_android_soc_info.empty() ? "unknown" : g_android_soc_info,
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utils::get_system_info(),
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jit_compiler::cpu(g_cfg.core.llvm_cpu.to_string()));
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{
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vk::instance device_enum_context;
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@@ -17,7 +17,8 @@ namespace aarch64
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u32 part;
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const char* arch;
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const char* family;
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const char* name;
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const char* name; // Human-readable display name
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const char* llvm_name; // Canonical LLVM processor name (valid -mcpu), see 3rdparty/llvm TargetParser/Host.cpp
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};
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struct cpu_vendor_t
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@@ -50,42 +51,50 @@ namespace aarch64
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static cpu_entry_t s_cpu_list[] =
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{
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// ARM
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{ 0x41, 0xd01, "armv8-a+crc+simd", "", "Cortex-A32" },
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{ 0x41, 0xd04, "armv8-a+crc+simd", "", "Cortex-A35" },
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{ 0x41, 0xd03, "armv8-a+crc+simd", "", "Cortex-A53" },
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{ 0x41, 0xd07, "armv8-a+crc+simd", "", "Cortex-A57" },
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{ 0x41, 0xd08, "armv8-a+crc+simd", "", "Cortex-A72" },
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{ 0x41, 0xd09, "armv8-a+crc+simd", "", "Cortex-A73" },
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{ 0x41, 0xd05, "armv8.2-a+fp16+dotprod", "", "Cortex-A55" },
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{ 0x41, 0xd0a, "armv8.2-a+fp16+dotprod", "", "Cortex-A75" },
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{ 0x41, 0xd0b, "armv8.2-a+fp16+dotprod", "", "Cortex-A76" },
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{ 0x41, 0xd0e, "armv8.2-a+fp16+dotprod", "", "Cortex-A76ae" },
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{ 0x41, 0xd0d, "armv8.2-a+fp16+dotprod", "", "Cortex-A77" },
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{ 0x41, 0xd41, "armv8.2-a+fp16+dotprod", "", "Cortex-A78" },
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{ 0x41, 0xd42, "armv8.2-a+fp16+dotprod", "", "Cortex-A78ae" },
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{ 0x41, 0xd4b, "armv8.2-a+fp16+dotprod", "", "Cortex-A78c" },
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{ 0x41, 0xd47, "armv9-a+fp16+bf16+i8mm", "", "Cortex-A710" },
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{ 0x41, 0xd44, "armv8.2-a+fp16+dotprod", "", "Cortex-X1" },
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{ 0x41, 0xd4c, "armv8.2-a+fp16+dotprod", "", "Cortex-X1c" },
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{ 0x41, 0xd0c, "armv8.2-a+fp16+dotprod", "", "Neoverse-N1" },
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{ 0x41, 0xd40, "armv8.4-a+fp16+bf16+i8mm", "", "Neoverse-V1" },
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{ 0x41, 0xd49, "armv8.5-a+fp16+bf16+i8mm", "", "Neoverse-N2" },
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{ 0x41, 0xd23, "armv8.1-m.main+pacbti+mve.fp+fp.dp", "", "Cortex-M85" },
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{ 0x41, 0xd13, "armv8-r+crc+simd", "", "Cortex-R52" },
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{ 0x41, 0xd16, "armv8-r+crc+simd", "", "Cortex-R52+" },
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{ 0x41, 0xd01, "armv8-a+crc+simd", "", "Cortex-A32", "cortex-a32" },
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{ 0x41, 0xd04, "armv8-a+crc+simd", "", "Cortex-A35", "cortex-a35" },
|
||||
{ 0x41, 0xd03, "armv8-a+crc+simd", "", "Cortex-A53", "cortex-a53" },
|
||||
{ 0x41, 0xd07, "armv8-a+crc+simd", "", "Cortex-A57", "cortex-a57" },
|
||||
{ 0x41, 0xd08, "armv8-a+crc+simd", "", "Cortex-A72", "cortex-a72" },
|
||||
{ 0x41, 0xd09, "armv8-a+crc+simd", "", "Cortex-A73", "cortex-a73" },
|
||||
{ 0x41, 0xd05, "armv8.2-a+fp16+dotprod", "", "Cortex-A55", "cortex-a55" },
|
||||
{ 0x41, 0xd0a, "armv8.2-a+fp16+dotprod", "", "Cortex-A75", "cortex-a75" },
|
||||
{ 0x41, 0xd0b, "armv8.2-a+fp16+dotprod", "", "Cortex-A76", "cortex-a76" },
|
||||
{ 0x41, 0xd0e, "armv8.2-a+fp16+dotprod", "", "Cortex-A76ae", "cortex-a76ae" },
|
||||
{ 0x41, 0xd0d, "armv8.2-a+fp16+dotprod", "", "Cortex-A77", "cortex-a77" },
|
||||
{ 0x41, 0xd41, "armv8.2-a+fp16+dotprod", "", "Cortex-A78", "cortex-a78" },
|
||||
{ 0x41, 0xd42, "armv8.2-a+fp16+dotprod", "", "Cortex-A78ae", "cortex-a78ae" },
|
||||
{ 0x41, 0xd4b, "armv8.2-a+fp16+dotprod", "", "Cortex-A78c", "cortex-a78c" },
|
||||
{ 0x41, 0xd46, "armv9-a+fp16+bf16+i8mm", "", "Cortex-A510", "cortex-a510" },
|
||||
{ 0x41, 0xd47, "armv9-a+fp16+bf16+i8mm", "", "Cortex-A710", "cortex-a710" },
|
||||
{ 0x41, 0xd4d, "armv9-a+fp16+bf16+i8mm", "", "Cortex-A715", "cortex-a715" },
|
||||
{ 0x41, 0xd4e, "armv9-a+fp16+bf16+i8mm", "", "Cortex-X3", "cortex-x3" },
|
||||
{ 0x41, 0xd80, "armv9.2-a+fp16+bf16+i8mm", "", "Cortex-A520", "cortex-a520" },
|
||||
{ 0x41, 0xd81, "armv9.2-a+fp16+bf16+i8mm", "", "Cortex-A720", "cortex-a720" },
|
||||
{ 0x41, 0xd82, "armv9.2-a+fp16+bf16+i8mm", "", "Cortex-X4", "cortex-x4" },
|
||||
{ 0x41, 0xd44, "armv8.2-a+fp16+dotprod", "", "Cortex-X1", "cortex-x1" },
|
||||
{ 0x41, 0xd4c, "armv8.2-a+fp16+dotprod", "", "Cortex-X1c", "cortex-x1c" },
|
||||
{ 0x41, 0xd0c, "armv8.2-a+fp16+dotprod", "", "Neoverse-N1", "neoverse-n1" },
|
||||
{ 0x41, 0xd40, "armv8.4-a+fp16+bf16+i8mm", "", "Neoverse-V1", "neoverse-v1" },
|
||||
{ 0x41, 0xd49, "armv8.5-a+fp16+bf16+i8mm", "", "Neoverse-N2", "neoverse-n2" },
|
||||
{ 0x41, 0xd23, "armv8.1-m.main+pacbti+mve.fp+fp.dp", "", "Cortex-M85", "cortex-m85" },
|
||||
{ 0x41, 0xd13, "armv8-r+crc+simd", "", "Cortex-R52", "cortex-r52" },
|
||||
{ 0x41, 0xd16, "armv8-r+crc+simd", "", "Cortex-R52+", "cortex-r52plus" },
|
||||
|
||||
// APPLE
|
||||
{ 0x61, 0x22, "armv8.5-a", "M1", "Firestorm" },
|
||||
{ 0x61, 0x23, "armv8.5-a", "M1", "IceStorm" },
|
||||
{ 0x61, 0x28, "armv8.5-a", "M1 Max", "Firestorm" },
|
||||
{ 0x61, 0x29, "armv8.5-a", "M1 Max", "Icestorm" },
|
||||
{ 0x61, 0x24, "armv8.5-a", "M1 Pro", "Firestorm" },
|
||||
{ 0x61, 0x25, "armv8.5-a", "M1 Pro", "Icestorm" },
|
||||
{ 0x61, 0x32, "armv8.5-a", "M2", "Avalanche" },
|
||||
{ 0x61, 0x33, "armv8.5-a", "M2", "Blizzard" },
|
||||
{ 0x61, 0x22, "armv8.5-a", "M1", "Firestorm", "apple-m1" },
|
||||
{ 0x61, 0x23, "armv8.5-a", "M1", "IceStorm", "apple-m1" },
|
||||
{ 0x61, 0x28, "armv8.5-a", "M1 Max", "Firestorm", "apple-m1" },
|
||||
{ 0x61, 0x29, "armv8.5-a", "M1 Max", "Icestorm", "apple-m1" },
|
||||
{ 0x61, 0x24, "armv8.5-a", "M1 Pro", "Firestorm", "apple-m1" },
|
||||
{ 0x61, 0x25, "armv8.5-a", "M1 Pro", "Icestorm", "apple-m1" },
|
||||
{ 0x61, 0x32, "armv8.5-a", "M2", "Avalanche", "apple-m2" },
|
||||
{ 0x61, 0x33, "armv8.5-a", "M2", "Blizzard", "apple-m2" },
|
||||
|
||||
// QUALCOMM
|
||||
{ 0x51, 0x01, "armv8.5-a", "Snapdragon", "X-Elite" },
|
||||
// MIDR 0x51/0x001 only identifies an Oryon core; it appears in X Elite and
|
||||
// 8 Elite/QCS9075-class SoCs alike, so the display name stays generic.
|
||||
{ 0x51, 0x01, "armv8.5-a", "Snapdragon", "Oryon", "oryon-1" },
|
||||
};
|
||||
|
||||
static const cpu_vendor_t* find_cpu_vendor(u64 id)
|
||||
@@ -173,7 +182,7 @@ namespace aarch64
|
||||
}
|
||||
}
|
||||
|
||||
return lowest_part_info ? lowest_part_info->name : "";
|
||||
return lowest_part_info ? lowest_part_info->llvm_name : "";
|
||||
}
|
||||
|
||||
std::string get_cpu_brand()
|
||||
|
||||
@@ -580,6 +580,20 @@ namespace vk
|
||||
float queue_priorities[1] = { 0.f };
|
||||
pgpu = &pdev;
|
||||
|
||||
// Verdict for the adapter actually in use. Logged here rather than where the
|
||||
// flag is resolved, because physical_device::create() runs for every GPU of
|
||||
// every VkInstance (system-info queries make their own), and rather than in
|
||||
// TextureUtils, whose fallback branches run per texture and per mip level.
|
||||
// Reads the resolved flag, so the V3DV/PanVK exceptions still apply.
|
||||
if (get_texture_compression_bc_support())
|
||||
{
|
||||
rsx_log.notice("BC1-BC3 texture compression supported; compressed DXT uploads use the GPU path.");
|
||||
}
|
||||
else
|
||||
{
|
||||
rsx_log.warning("BC1-BC3 texture compression unavailable; compressed DXT textures use CPU decoding.");
|
||||
}
|
||||
|
||||
ensure(graphics_queue_idx == present_queue_idx || present_queue_idx == umax); // TODO
|
||||
std::vector<VkDeviceQueueCreateInfo> device_queues;
|
||||
|
||||
|
||||
Reference in New Issue
Block a user