Brian DegenhardtandClaude Fable 5
852cfef30a
A block whose terminal branch targets its own startpc (the scanner's backward-split rule makes loop heads block starts) now compiles with a register-resident back-edge instead of the per-iteration full flush + linked-B + full reload round trip: - Preheader: the <=5 most-used loop GPRs (EEINST_USED counts; pin-table guests excluded) are allocated MODE_READ|MODE_WRITE (dirty-pessimized so body-emitted evictions always write back), marked loop-pinned (LRU eviction avoids them but may still take them - allocation never fails on a pin), and the loop-top label binds after it. - Back-edge (taken arm via SetBranchImm -> SetBranchBackedge): a two-phase reconcile to the loop-top snapshot (VF-cache flush + constant materialization + writeback/free of non-snapshot entries, then reload of displaced pins from memory), the cycle Adds + b.ge event check side-exiting to a cold spill stub (spill pinned set + Str pc + DispatcherEvent), then a single B to the loop-top. Dirty values ride host registers across iterations. - Mid-body C seams stay correct without any candidacy analysis: iFlushCall frees caller-saved entries coherently and the reconcile restores the snapshot, so a seam only localizes the win away. - recClear safety: the internal back-edge B bypasses the entry redirect stub, so it is registered on BASEBLOCKEX (backedge_site/backedge_stub) and Arm64BaseBlocks::Remove() atomically repoints it to the spill stub (flat-array reads + PatchAtomic; the signal-safety contract holds). Without this a cleared self-loop would run stale code until the next event. - Excluded: manual/SMC-checked blocks (entry check must run per iteration), wait-loop-FF blocks, and JAL/JR/AL-link tails. Motivation: the S0 prize map shows 41% of EErec cycles in loop-shaped blocks (16.6% self-loops) and the tail-only boundary floor already exceeds the whole remaining EErec gap vs the reference. Gates: recompiler_tests 1320/1320 (9 new ee_rec_loop_residency_tests incl. event-mid-loop, const rematerialization, 128-bit MMI carry, SMC recompile, back-edge repoint); 30k-seed sharded EE fuzz soak clean; UYA frames-2 + SotC frames-20 --stepdiff signatures identical to EP-4 baselines (JIT block entries -9.4%/-4.4% = iterations riding the resident back-edge); M2 static census +0.32%, confined to the ~209 UYA self-loop blocks (preheader + cold stub replace the 12-insn tail; the win is dynamic). Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
yaps2
This is a fork of PCSX2 targeting ARM based linux handheld devices. We're aiming to be performant and compatible on lower end ARM hardware, and adopt a "by any means" philosophy.
Thanks
A massive thank you to the PCSX2 team for 20 years of dedication. yaps2 doesn't meet the rigor required of PCSX2 upstream commits, but maybe someday it will.
The following people worked on the yaps2 fork of this project:
- bmdhacks
- tokyovigilante
- pstef
FAQ
Is it good?
A: Yeah. It's pretty fast.
Where do I get builds of this software?
A: Builds are available in nightly releases of Rocknix and Batocera
Did you vibe code it? I see that claude authors your commits you cheater!
A: This fork was written by seasoned developers using LLM devleopment tools. Our philosophy is focused on results, not policing methodology, and modern LLM tools are the most effective way for us to reach our goals.
Can I contribute?
A: Sure. Send a PR. If it's vibe-coded trash we'll reject it. If it's good we'll use it.
Can I fork this project for my own purposes?
A: Sure. If you do cool stuff we'll probably use your code.
Don't you know about XYZ project that already does this
A: Yes we probably copied a lot of their techniques.
Can I make feature requests or tell you that I don't like what you're doing or how you're doing it?
A: Look, we're not trying to be a serious project here so no.
Can I make bug reports?
A: Absolutely, file a github issue and we might look at it.