bmdhacks 5dbb14458d Fix: the fast path never cleared the O and U cause flags
The EE clears the O and U CAUSE bits (the sticky SO/SU survive) on every
op that can raise them, whether or not it does: ADD, SUB, MUL, the four
A-forms, the four multiply-accumulates, and MAX/MIN/ABS/NEG, which clear
the pair and do nothing else. DIV, SQRT, RSQRT and MOV leave both alone.
Measured on FCR31-seeded capture rows: ABS, NEG, ADD, ADDA, MADD, MSUB,
MUL, MULA, MAX and MIN all read back 0x0183C079 where the console gives
0x01830079; SUB, SUBA, MADDA and MSUBA have no seeded row and follow on
the interpreter's authority (checkOverflow/checkUnderflow/clearFPUFlags
clear the pair on all fourteen).

The arm64 fast path cleared the pair only on ABS/NEG, so an O or U raised
by an earlier instruction stayed visible to every later cfc1 in the block.
The interpreter has always cleared them, which made this a live
JIT-vs-interp FCR31 divergence as well as a console one. x86 iFPU.cpp has
the identical defect -- the clear is commented out at 13 sites.

The clear goes FIRST in each emitter, before the op writes anything: the
fast path raises neither flag today so the order is not yet observable,
but an emitter that later learns to raise O must not have its flag wiped
by a clear placed after it. One Bic on the block-resident FCR31 per op.

RAISING O and U is a separate, harder obligation -- a correct raise needs
the exact magnitude of the result, which a saturating single cannot carry
-- and stays with the FULL tier and the DISABLED tripwires in the FCR
conformance file.

Pinned by EeFpuFcrConsoleConformance.EnginesAgreeOnTheOverflowFlagClear:
fourteen clearing ops plus the four leave-alone controls, both engines,
seeded with the capture's word.

Idea by pstef.
2026-08-02 22:35:45 -07:00
2022-11-29 09:46:18 +00:00
2012-04-18 14:09:18 +00:00
2024-01-14 14:18:03 -05:00
2026-04-03 12:41:47 -04:00
2026-07-18 12:04:18 -04:00

ARMSX2 — Native ARM64 JIT Fork of PCSX2

All Platforms

ARMSX2 is a free and open-source PlayStation 2 (PS2) emulator based on PCSX2. Its purpose is to emulate the PS2's hardware, using a combination of MIPS CPU Interpreters, Recompilers and a Virtual Machine which manages hardware states and PS2 system memory. This allows you to play PS2 games on your phone, PC, or gaming handheld, with many additional features and benefits.

Thank You

The ARMSX2 team is eternally indebted to the PCSX2 project it is based on. We are so fortunate to build on their 20 years of hardcore development.

About This Fork

Project Demo

The upstream PCSX2 project ships an ARM64 interpreter build for ARM, but its high-performance JIT recompilers (EE, IOP, VU0, VU1, and vtlb fast memory) are x86-64 only.

This fork exists to close that gap. The goal is to preserve the correctness features of 20 years of PCSX2 development, while generating the fastest native ARM performance possible.

Current status:

  • EE (Emotion Engine) recompiler — integer, float, MMI, COP0/COP1/COP2, branches, load/store
  • IOP (I/O Processor / R3000A) recompiler — full integer, load/store, branches, coprocessors
  • VU (Vector Unit) recompiler — microVU skeleton + Upper FMAC vector ISA complete; Lower ISA and runtime complete
  • vtlb fast memory
  • Native ARM64 binary builds and boots the PS2 BIOS
  • 2D games are already playable
  • 3D games run

Why LLMs / AI Were Used

A word on methodology:

The x86-64 JIT code in upstream ARMSX2 is already proven correct — it has run thousands of PS2 titles for years. The challenge in this port is not emulator design or JIT theory; it is mechanical translation of a large, well-understood x86-64 assembly codebase into equivalent ARM64 assembly (via VIXL) while preserving the exact same register-allocation contracts, block lifecycle, and recompiler semantics.

Large language models (LLMs) were used as an accelerant for this translation work — pattern-matching x86 JIT boilerplate to ARM64 equivalents, scaffolding emit routines, and keeping the porting velocity high. The JIT logic (block compiler, dispatcher, analysis passes, flag pipelines, clamping rules, Tri-Ace hacks, etc.) is taken directly from the upstream x86 implementation and validated against it. Nothing was hallucinated from scratch.

In other words: the hard engineering was done by the PCSX2 team over two decades. The hard typing — translating ~50k lines of x86 emitter code into ARM64 — is what AI helped compress.

System Requirements

ARMSX2 targets ARM64 across desktop (macOS, Windows, Linux) and mobile (Android, iOS/iPadOS), all from the single shared core. Our setup documentation page contains additional details on software and hardware requirements.

Please note that a BIOS dump from a legitimately-owned PS2 console is required to use the emulator. For more information, visit this page.

Building

Check out our github actions for the latest build recipe

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