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https://github.com/ARMSX2/ARMSX2.git
synced 2026-08-24 16:50:16 -07:00
Remove the replaced backend's interpreter-fallback glue
The yaps2 recompilers compile every EE opcode natively, so the per-instruction interpreter fallback the previous arm64 backend relied on is dead code: drop intExecuteOneInst (Interpreter.cpp/R5900.h) and the AndroidEEOpHist fallback-opcode histogram. EEDiffVerify stays — its per-op hooks are worth re-emitting from the new recompiler later. Also hoist the Qt metatype declarations shared by moc'd headers into QtMetaTypes.h: with the debugger sources now optional the autogen bucket layout shifted, exposing a specialization-after-instantiation error when moc_MainWindow preceded moc_QtHost in mocs_compilation.
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@@ -38,6 +38,7 @@ target_sources(pcsx2-qt PRIVATE
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Translations.cpp
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QtHost.cpp
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QtHost.h
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QtMetaTypes.h
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QtKeyCodes.cpp
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QtProgressCallback.cpp
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QtProgressCallback.h
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@@ -36,6 +36,8 @@ namespace Achievements
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enum class LoginRequestReason;
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}
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#include "QtMetaTypes.h"
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namespace GameList
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{
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struct Entry;
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+1
-6
@@ -38,12 +38,7 @@ namespace Achievements
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enum class LoginRequestReason;
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}
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Q_DECLARE_METATYPE(std::shared_ptr<VMBootParameters>);
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Q_DECLARE_METATYPE(std::optional<bool>);
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Q_DECLARE_METATYPE(GSRendererType);
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Q_DECLARE_METATYPE(InputBindingKey);
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Q_DECLARE_METATYPE(CDVD_SourceType);
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Q_DECLARE_METATYPE(Achievements::LoginRequestReason);
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#include "QtMetaTypes.h"
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class EmuThread : public QThread
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{
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@@ -0,0 +1,36 @@
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// SPDX-FileCopyrightText: 2002-2026 PCSX2 Dev Team
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// SPDX-License-Identifier: GPL-3.0+
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#pragma once
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// Q_DECLARE_METATYPE specializations shared by every moc'd header that mentions
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// these types in a signal/slot. They must appear in a common header (not just
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// QtHost.h): AUTOMOC compiles all moc_*.cpp files into one mocs_compilation.cpp
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// TU, and a moc that instantiates QMetaTypeId<T> before another header's
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// specialization is an "explicit specialization after instantiation" error —
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// which moc comes first depends on the autogen bucket layout, so it can flip
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// whenever the source list changes.
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#include <memory>
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#include <optional>
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#include <QtCore/QMetaType>
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#include "pcsx2/Config.h"
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#include "pcsx2/Input/InputManager.h"
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struct VMBootParameters;
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enum class CDVD_SourceType : uint8_t;
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namespace Achievements
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{
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enum class LoginRequestReason;
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}
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Q_DECLARE_METATYPE(std::shared_ptr<VMBootParameters>);
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Q_DECLARE_METATYPE(std::optional<bool>);
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Q_DECLARE_METATYPE(GSRendererType);
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Q_DECLARE_METATYPE(InputBindingKey);
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Q_DECLARE_METATYPE(CDVD_SourceType);
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Q_DECLARE_METATYPE(Achievements::LoginRequestReason);
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@@ -1,29 +0,0 @@
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// SPDX-License-Identifier: GPL-3.0+
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#pragma once
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#include "common/Pcsx2Types.h"
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// Gated EE opcode histogram for diagnosing interpreter-fallback hotspots on the mac
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// ARM64 backend. Counts how often each opcode runs through the two fallback paths:
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// - STEP : block-terminating single-step (intExecuteOneInst) — the expensive one
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// - INLINE : in-block interpreter call (recEmitInterpInline)
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// Every ~8M recorded fallback ops the EE thread prints "@@ANDROID_EE_OPHIST@@" lines
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// listing the hottest primary opcodes + SPECIAL/REGIMM/COP2/MMI sub-ops, then resets.
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// EE-thread-only (no atomics). Default 0 = zero overhead; flip to 1 for a diag build.
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#ifndef ARMSX2_ANDROID_EE_OPHIST
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#define ARMSX2_ANDROID_EE_OPHIST 0
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#endif
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#if ARMSX2_ANDROID_EE_OPHIST
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namespace AndroidEEOpHist
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{
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// path: 0 = STEP (single-step), 1 = INLINE (in-block interp).
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void Record(int path, u32 op);
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// Emit-time tally of natively-compiled trap ops (proves the trap codegen engaged).
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void NoteTrapCompiled();
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}
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// Counting thunk emitted by recEmitInterpInline in place of the raw interp handler
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// when the histogram is on: records cpuRegs.code on the INLINE path, then dispatches.
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void recOphistInlineThunk();
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#endif
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@@ -1183,7 +1183,6 @@ if(ANDROID)
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list(APPEND pcsx2Headers
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VU1Fingerprint.h
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EEDiffVerify.h
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AndroidEEOpHist.h
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AndroidPerfBuckets.h
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PS1DrvTrace.h)
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# Oboe is the Android audio backend consumed by Host/OboeAudioStream.cpp.
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@@ -307,38 +307,6 @@ void intDoBranch(u32 target)
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}
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}
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// Interpret exactly one guest instruction at cpuRegs.pc using the interpreter,
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// then return. This is the recompiler's per-instruction fallback: the ARM64 EE
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// rec dispatcher calls it for opcodes it cannot yet compile (likely branches,
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// coprocessor ops, syscalls, traps, ...). It mirrors execI; for branch opcodes
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// the interpreter's own branch functions handle the delay slot and PC redirect.
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// We must flush the accrued cycle count here for EVERY op, branches included:
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// intDoBranch/_doBranch_shared gate their flush on Cpu == &intCpu, so in rec
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// context a taken branch flushes nothing — a guest poll loop made of just a
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// branch (e.g. Burnout's `BC0F .; nop` CPCOND0 wait) would freeze cpuRegs.cycle
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// and the pending event (DMAC completion) would never come due.
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// It must NOT do the interpreter's fastjmp exit (intJmpBuf is not
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// set up in rec context); the rec drives exits through its own event test.
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void intExecuteOneInst()
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{
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const u32 thispc = cpuRegs.pc;
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// Pre-increment PC: exception handlers and branch target math expect cpuRegs.pc
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// to already point at the delay slot (matches execI).
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cpuRegs.pc += 4;
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cpuRegs.code = memRead32(thispc);
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const OPCODE& opcode = GetCurrentInstruction();
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cpuBlockCycles += opcode.cycles * (2 - ((cpuRegs.CP0.n.Config >> 18) & 0x1));
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opcode.interpret();
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// Unconditional: in rec context the interpreter's branch helpers skip their
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// flush (intDoBranch is gated on Cpu == &intCpu), so this is the only place
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// the accrued cycles reach cpuRegs.cycle. Always advances cycle by >= 1,
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// guaranteeing forward progress for branch-only guest wait loops.
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intUpdateCPUCycles();
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}
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void intSetBranch()
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{
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branch2 = /*cpuRegs.branch =*/ 1;
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@@ -323,7 +323,6 @@ void intDoBranch(u32 target);
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// Interpret a single instruction at cpuRegs.pc (recompiler per-opcode fallback).
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// See the implementation in Interpreter.cpp for the contract.
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void intExecuteOneInst();
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// modules loaded at hardcoded addresses by the kernel
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const u32 EEKERNEL_START = 0;
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