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Tests: EE zero-divisor result against hardware, across the clamp modes
DIV.S and RSQRT.S special-case a divisor whose exponent field is zero and saturate instead of dividing. That saturated value differs from the console in two independent ways, magnitude and sign. The capture rows and the rules read off them are in the new file's header. Neither is simply a bug to fix. The console value already ships, in the FULL path, and the fast path's +FLT_MAX is a deliberate compromise. The gap is the interpreter, which has no FULL path at all, so an eeClampMode:3 game gets the console value from the recompiler and the fast-path one from the interpreter. Hence four tests rather than two. One pins the JIT's console-exact FULL-mode result, which nothing covered before; it is the only one enabled here. One pins the fast path's non-console value in the default mode, so a later attempt at either tripwire cannot change that mode by accident. The last two are the tripwires for the interpreter gap, magnitude and sign split apart so they can graduate independently, the sign one carrying the DIV rows as a control. The default-mode test ships disabled as well: the interpreter still reads DIV/RSQRT operands through fpuDouble(), so it cannot agree with the fast path yet. "Fix: DIV.S and RSQRT.S, the last two ops holding the operand clamp" re-enables it.
This commit is contained in:
pstef
@@ -129,6 +129,7 @@ add_pcsx2_test(recompiler_tests
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ee_fpu_overflow_console_conformance_tests.cpp
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ee_fpu_absneg_clamp_tests.cpp
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ee_fpu_minmax_console_tests.cpp
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ee_fpu_zero_divisor_console_tests.cpp
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ee_lsu_console_conformance_tests.cpp
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vu0_macro_console_conformance_tests.cpp
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vu1_efu_console_conformance_tests.cpp
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@@ -0,0 +1,228 @@
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// SPDX-FileCopyrightText: 2026 yaps2 Dev Team
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// SPDX-License-Identifier: GPL-3.0+
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//
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// The EE divide/sqrt unit's zero-divisor result, scored against real hardware
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// across the EE clamp modes.
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//
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// DIV.S and RSQRT.S both special-case a divisor whose exponent field is zero
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// (denormals included) and return a saturated value instead of dividing. Two
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// things about that value differ from the console, and both are here.
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//
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// The hardware rows, from unknownbrackets/ps2autotests -- the explicit hex
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// rows, not the CF_* aliases:
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//
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// tests/cpu/ee_fpu/muldiv.expected tests/cpu/ee_fpu/sqrt.expected
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// div 3f800000, 00000000: 7fffffff rsqrt 3f800000, 00000000: 7fffffff
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// div 00000000, 00000000: 7fffffff rsqrt 00000000, 00000000: 7fffffff
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// div 00000000, 80000000: ffffffff rsqrt 00000000, 80000000: 7fffffff
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// div 80000000, 00000000: ffffffff rsqrt 80000000, 00000000: ffffffff
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// div 80000000, 80000000: 7fffffff rsqrt 80000000, 80000000: ffffffff
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//
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// Read the two columns against each other and the rules fall out.
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//
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// Magnitude: the console saturates to 0x7FFFFFFF, not the 0x7F7FFFFF
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// (+FLT_MAX) PCSX2's fast path uses. On the EE that is not a NaN -- the EE
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// has no Inf/NaN encoding, exponent 255 is an ordinary large exponent, which
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// the capture proves directly: `div 7fffffff, 7fffffff: 3f800000` divides it
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// by itself and gets 1.0.
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//
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// Sign: DIV takes sign(Fs ^ Ft) -- the four signed-zero rows are +,-,-,+.
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// RSQRT takes sign(Fs) alone -- its four rows are +,+,-,-, keyed to the
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// dividend and ignoring Ft's sign, which is the physical rule: RSQRT divides
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// by sqrt(|Ft|), and that is never negative. PCSX2 takes RSQRT's sign from
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// Ft, which agrees with the console on the two rows where Fs and Ft share a
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// sign and is inverted on the two where they differ.
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//
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// Neither is simply a bug to fix. The EE clamp modes (GameDB eeClampMode,
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// EmuConfig.Cpu.Recompiler fpuOverflow/fpuExtraOverflow/fpuFullMode) trade
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// console exactness for speed and host sanity, and they are what users run.
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// Measured here, all four modes, both engines:
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//
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// mode 0/1/2 both engines 0x7F7FFFFF, RSQRT sign from Ft
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// mode 3 FULL arm64 JIT 0x7FFFFFFF, RSQRT sign from Fs <- console
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// mode 3 FULL interpreter 0x7F7FFFFF, RSQRT sign from Ft
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//
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// So the console behaviour already ships, in the FULL path (iFPUd-arm64.cpp
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// SetMaxValueS, whose comment records the same 0x7fffffff-not-0x7f7fffff
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// point), and eeClampMode:3 is not exotic -- FFX, Max Payne, Dark Cloud 2,
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// Klonoa 2, ~150 serials. The fast path's +FLT_MAX is the deliberate
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// compromise: it keeps host-illegal exponent-255 patterns out of an arithmetic
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// pipeline that, unlike the EE's, does have Inf and NaN. The gap is that the
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// interpreter has no FULL path at all, so a user on the EE interpreter running
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// an eeClampMode:3 game gets the fast-path value where the recompiler gives
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// the console one. That is what the two disabled tripwires below pin.
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//
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// The surface a fix would have to cover: pcsx2/FPU.cpp:14 posFmax (used at :68
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// checkOverflow, :111 checkDivideByZero, :346 RSQRT_S), arm64
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// iFPU-arm64.cpp:940 and :1059, iCOP2-arm64.cpp:470 s_cop2MaxFloat and
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// :2603/:2721, microVU_Compile-arm64.inl:674, VUflags.cpp:40,
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// VUops.cpp:451/:966/:1009.
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#include "harness/EeRecTestHarness.h"
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#include "Config.h"
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#include <gtest/gtest.h>
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using namespace recompiler_tests;
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using namespace mips;
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using namespace mips::ee;
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namespace {
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constexpr u32 kFd = 4, kFs = 5, kFt = 6;
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// One capture row. `console` is the full 32-bit hardware result; the tests
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// below split it into sign and magnitude so each defect is asserted alone.
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struct ZeroDivisorRow
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{
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u32 fs, ft;
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bool rsqrt;
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u32 console;
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const char* what;
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};
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constexpr ZeroDivisorRow kRows[] = {
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// muldiv.expected -- DIV.S, sign(Fs ^ Ft)
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{0x3F800000u, 0x00000000u, false, 0x7FFFFFFFu, "div 1.0 / +0"},
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{0x00000000u, 0x00000000u, false, 0x7FFFFFFFu, "div +0 / +0"},
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{0x00000000u, 0x80000000u, false, 0xFFFFFFFFu, "div +0 / -0"},
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{0x80000000u, 0x00000000u, false, 0xFFFFFFFFu, "div -0 / +0"},
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{0x80000000u, 0x80000000u, false, 0x7FFFFFFFu, "div -0 / -0"},
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// sqrt.expected -- RSQRT.S, sign(Fs) alone
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{0x3F800000u, 0x00000000u, true, 0x7FFFFFFFu, "rsqrt 1.0 / sqrt(+0)"},
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{0x00000000u, 0x00000000u, true, 0x7FFFFFFFu, "rsqrt +0 / sqrt(+0)"},
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{0x00000000u, 0x80000000u, true, 0x7FFFFFFFu, "rsqrt +0 / sqrt(-0)"},
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{0x80000000u, 0x00000000u, true, 0xFFFFFFFFu, "rsqrt -0 / sqrt(+0)"},
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{0x80000000u, 0x80000000u, true, 0xFFFFFFFFu, "rsqrt -0 / sqrt(-0)"},
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};
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constexpr int kRowCount = static_cast<int>(sizeof(kRows) / sizeof(kRows[0]));
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// What the fast path produces instead: +FLT_MAX, and RSQRT's sign off Ft.
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u32 FastPathValue(const ZeroDivisorRow& r)
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{
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const u32 sign = r.rsqrt ? (r.ft & 0x80000000u)
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: ((r.fs ^ r.ft) & 0x80000000u);
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return sign | 0x7F7FFFFFu;
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}
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// Runs one row on one engine and returns the result register.
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u32 RunRow(const ZeroDivisorRow& r, bool jit, bool full_mode)
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{
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EeRecTestHarness h;
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h.EnableCop1();
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if (full_mode)
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h.EnableFpuFullMode();
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h.SetFcr31(0);
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h.SetFprBits(kFs, r.fs);
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h.SetFprBits(kFt, r.ft);
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h.LoadProgram({r.rsqrt ? RSQRT_S(kFd, kFs, kFt) : DIV_S(kFd, kFs, kFt)});
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if (jit)
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h.RunJitNoDiff();
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else
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h.RunInterpOnly();
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return jit ? h.GetFprBitsJit(kFd) : h.GetFprBitsInterp(kFd);
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}
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} // namespace
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// ---------------------------------------------------------------------------
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// The compromise, pinned: both engines, default clamp mode, +/-FLT_MAX with
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// RSQRT's sign off Ft. Asserting the non-console value is the point -- it stops
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// a later attempt at the tripwires below from changing the mode nearly every
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// game runs in.
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//
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// Disabled for now: the interpreter still reads DIV/RSQRT operands through
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// fpuDouble() and saturates at FLT_MAX, so it cannot agree with the fast path
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// on this row yet. Re-enabled by "Fix: DIV.S and RSQRT.S, the last two ops
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// holding the operand clamp".
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// ---------------------------------------------------------------------------
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TEST(EeFpuZeroDivisorConsole, DISABLED_DefaultClampModeSaturatesToFltMaxOnBothEngines)
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{
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ASSERT_FALSE(EmuConfig.Cpu.Recompiler.fpuFullMode)
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<< "this test describes the NON-full path; something enabled FULL mode";
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for (int i = 0; i < kRowCount; ++i)
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{
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const ZeroDivisorRow& r = kRows[i];
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for (int jit = 0; jit < 2; ++jit)
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{
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SCOPED_TRACE(::testing::Message()
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<< r.what << (jit ? " [jit]" : " [interp]"));
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EXPECT_EQ(RunRow(r, jit != 0, /*full_mode=*/false), FastPathValue(r));
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}
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}
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}
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// ---------------------------------------------------------------------------
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// In FULL mode the arm64 JIT matches the console on every row, sign and
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// magnitude both, and nothing covered that before.
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//
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// JIT only: the interpreter has no FULL path (see ee_rec_fpu_full_mode_tests.cpp
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// header), which is what the tripwires below are about.
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// ---------------------------------------------------------------------------
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TEST(EeFpuZeroDivisorConsole, FullClampModeJitMatchesConsoleExactly)
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{
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for (int i = 0; i < kRowCount; ++i)
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{
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const ZeroDivisorRow& r = kRows[i];
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SCOPED_TRACE(::testing::Message() << r.what << " [jit, FULL]");
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EXPECT_EQ(RunRow(r, /*jit=*/true, /*full_mode=*/true), r.console);
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}
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}
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// ---------------------------------------------------------------------------
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// Tripwire 1 of 2, magnitude. The console saturates to 0x7FFFFFFF; the
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// interpreter saturates to 0x7F7FFFFF in every mode, including the FULL mode
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// where the JIT beside it produces the console value. Sign is masked off;
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// tripwire 2 owns that.
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//
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// Force-enable to see the current state. Expected today: all ten [jit] rows
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// pass, all ten [interp] rows fail with 7f7fffff against 7fffffff.
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//
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// Graduating it means giving the interpreter a FULL path, not changing posFmax.
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// ---------------------------------------------------------------------------
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TEST(EeFpuZeroDivisorConsole, DISABLED_FullClampModeInterpMissesConsoleSaturation)
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{
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for (int i = 0; i < kRowCount; ++i)
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{
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const ZeroDivisorRow& r = kRows[i];
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for (int jit = 0; jit < 2; ++jit)
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{
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SCOPED_TRACE(::testing::Message()
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<< r.what << (jit ? " [jit]" : " [interp]") << " FULL, magnitude only");
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EXPECT_EQ(RunRow(r, jit != 0, /*full_mode=*/true) & 0x7FFFFFFFu,
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r.console & 0x7FFFFFFFu);
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}
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}
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}
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// ---------------------------------------------------------------------------
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// Tripwire 2 of 2, sign. RSQRT's zero-divisor result takes its sign from Fs on
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// the console; both engines' fast path takes it from Ft, and the JIT's FULL
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// path gets it right. Magnitude is masked off; tripwire 1 owns that.
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//
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// The DIV rows ride along as a control: DIV's sign(Fs ^ Ft) is already correct
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// in both engines and both modes, and these two ops sit next to each other in
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// every emitter and share checkDivideByZero in the interpreter, so a DIV row
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// failing here means the fix broke something that worked.
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//
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// Force-enable to see the current state. Expected today: all five DIV rows pass
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// on both engines, all five [jit] RSQRT rows pass, and the two [interp] RSQRT
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// rows whose Fs and Ft signs differ fail -- +0/sqrt(-0) and -0/sqrt(+0).
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// ---------------------------------------------------------------------------
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TEST(EeFpuZeroDivisorConsole, DISABLED_FullClampModeInterpRsqrtSignFollowsFtNotFs)
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{
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for (int i = 0; i < kRowCount; ++i)
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{
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const ZeroDivisorRow& r = kRows[i];
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for (int jit = 0; jit < 2; ++jit)
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{
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SCOPED_TRACE(::testing::Message()
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<< r.what << (jit ? " [jit]" : " [interp]") << " FULL, sign only"
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<< (r.rsqrt ? "" : " (DIV control: must not regress)"));
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EXPECT_EQ(RunRow(r, jit != 0, /*full_mode=*/true) >> 31,
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r.console >> 31);
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}
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}
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}
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