mirror of
https://github.com/ARMSX2/ARMSX1.git
synced 2026-08-24 16:53:35 -07:00
Implement MVMVA
This commit is contained in:
allkern
@@ -2065,88 +2065,14 @@ uint32_t gte_divide(psx_cpu_t* cpu, uint16_t n, uint16_t d) {
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return MIN(0x1ffff, res);
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}
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void gte_interpolate_color(psx_cpu_t* cpu, int mac1, int mac2, int mac3) {
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// PSX SPX is very convoluted about this and it lacks some info
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// [MAC1, MAC2, MAC3] = MAC + (FC - MAC) * IR0;< --- for NCDx only
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// Note: Above "[IR1,IR2,IR3]=(FC-MAC)" is saturated to - 8000h..+7FFFh(ie. as if lm = 0)
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// Details on "MAC+(FC-MAC)*IR0":
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// [IR1, IR2, IR3] = (([RFC, GFC, BFC] SHL 12) - [MAC1, MAC2, MAC3]) SAR(sf * 12)
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// [MAC1, MAC2, MAC3] = (([IR1, IR2, IR3] * IR0) + [MAC1, MAC2, MAC3])
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// [MAC1, MAC2, MAC3] = [MAC1, MAC2, MAC3] SAR(sf * 12);< --- for NCDx / NCCx
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// [IR1, IR2, IR3] = [MAC1, MAC2, MAC3]
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// R_MAC1 = (int)(gte_clamp_mac(cpu, 1, ((long)R_RFC << 12) - mac1) >> cpu->gte_sf);
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// R_MAC2 = (int)(gte_clamp_mac(cpu, 2, ((long)R_GFC << 12) - mac2) >> cpu->gte_sf);
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// R_MAC3 = (int)(gte_clamp_mac(cpu, 3, ((long)R_BFC << 12) - mac3) >> cpu->gte_sf);
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// R_IR1 = gte_clamp_ir(cpu, 1, R_MAC1, 0);
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// R_IR2 = gte_clamp_ir(cpu, 2, R_MAC2, 0);
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// R_IR3 = gte_clamp_ir(cpu, 3, R_MAC3, 0);
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// R_MAC1 = (int)(gte_clamp_mac(cpu, 1, ((long)R_IR1 * R_IR0) + mac1) >> cpu->gte_sf);
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// R_MAC2 = (int)(gte_clamp_mac(cpu, 2, ((long)R_IR2 * R_IR0) + mac2) >> cpu->gte_sf);
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// R_MAC3 = (int)(gte_clamp_mac(cpu, 3, ((long)R_IR3 * R_IR0) + mac3) >> cpu->gte_sf);
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// R_IR1 = gte_clamp_ir(cpu, 1, R_MAC1, cpu->gte_lm);
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// R_IR2 = gte_clamp_ir(cpu, 2, R_MAC2, cpu->gte_lm);
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// R_IR3 = gte_clamp_ir(cpu, 3, R_MAC3, cpu->gte_lm);
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}
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void gte_ncds(psx_cpu_t* cpu, int r) {
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//Normal color depth cue (single vector) //329048 WIP FLAGS
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//In: V0 = Normal vector(for triple variants repeated with V1 and V2),
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//BK = Background color, RGBC = Primary color / code, LLM = Light matrix, LCM = Color matrix, IR0 = Interpolation value.
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// uint16_t vrx = (&cpu->cop2_dr.v0)[(3 * r) + 0];
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// uint16_t vry = (&cpu->cop2_dr.v0)[(3 * r) + 1];
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// uint16_t vrz = (&cpu->cop2_dr.v0)[(3 * r) + 2];
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// // [IR1, IR2, IR3] = [MAC1, MAC2, MAC3] = (LLM * V0) SAR(sf * 12)
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// R_MAC1 = (int)(gte_clamp_mac(cpu, 1, (long)R_L11 * vrx + R_L12 * vry + R_L13 * vrz) >> cpu->gte_sf);
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// R_MAC2 = (int)(gte_clamp_mac(cpu, 2, (long)R_L21 * vrx + R_L22 * vry + R_L23 * vrz) >> cpu->gte_sf);
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// R_MAC3 = (int)(gte_clamp_mac(cpu, 3, (long)R_L31 * vrx + R_L32 * vry + R_L33 * vrz) >> cpu->gte_sf);
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// R_IR1 = gte_clamp_ir(cpu, 1, R_MAC1, cpu->gte_lm);
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// R_IR2 = gte_clamp_ir(cpu, 2, R_MAC2, cpu->gte_lm);
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// R_IR3 = gte_clamp_ir(cpu, 3, R_MAC3, cpu->gte_lm);
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// [IR1, IR2, IR3] = [MAC1, MAC2, MAC3] = (BK * 1000h + LCM * IR) SAR(sf * 12)
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// WARNING each multiplication can trigger mac flags so the check is needed on each op! Somehow this only affects the color matrix and not the light one
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// R_MAC1 = (int)(gte_clamp_mac(cpu, 1, gte_clamp_mac(cpu, 1, gte_clamp_mac(cpu, 1, (long)R_RBK * 0x1000 + R_LM1R * R_IR1) + (long)R_LM1G * R_IR2) + (long)R_LM1B * R_IR3) >> cpu->gte_sf);
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// R_MAC2 = (int)(gte_clamp_mac(cpu, 2, gte_clamp_mac(cpu, 2, gte_clamp_mac(cpu, 2, (long)R_GBK * 0x1000 + R_LM2R * R_IR1) + (long)R_LM2G * R_IR2) + (long)R_LM2B * R_IR3) >> cpu->gte_sf);
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// R_MAC3 = (int)(gte_clamp_mac(cpu, 3, gte_clamp_mac(cpu, 3, gte_clamp_mac(cpu, 3, (long)R_BBK * 0x1000 + R_LM3R * R_IR1) + (long)R_LM3G * R_IR2) + (long)R_LM3B * R_IR3) >> cpu->gte_sf);
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// R_IR1 = gte_clamp_ir(cpu, 1, R_MAC1, cpu->gte_lm);
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// R_IR2 = gte_clamp_ir(cpu, 2, R_MAC2, cpu->gte_lm);
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// R_IR3 = gte_clamp_ir(cpu, 3, R_MAC3, cpu->gte_lm);
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// [MAC1, MAC2, MAC3] = [R * IR1, G * IR2, B * IR3] SHL 4;< --- for NCDx / NCCx
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// R_MAC1 = (int)gte_clamp_mac(cpu, 1, ((long)R_RGBCR * R_IR1) << 4);
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// R_MAC2 = (int)gte_clamp_mac(cpu, 2, ((long)R_RGBCG * R_IR2) << 4);
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// R_MAC3 = (int)gte_clamp_mac(cpu, 3, ((long)R_RGBCB * R_IR3) << 4);
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// gte_interpolate_color(cpu, R_MAC1, R_MAC2, R_MAC3);
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// // Color FIFO = [MAC1 / 16, MAC2 / 16, MAC3 / 16, CODE]
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// R_RGB0 = R_RGB1;
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// R_RGB1 = R_RGB2;
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// uint32_t rgb2;
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// rgb2 = gte_clamp_rgb(cpu, 1, R_MAC1 >> 4);
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// rgb2 = gte_clamp_rgb(cpu, 2, R_MAC2 >> 4) << 8;
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// rgb2 = gte_clamp_rgb(cpu, 3, R_MAC3 >> 4) << 16;
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// rgb2 = R_RGBCC << 24;
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}
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void psx_cpu_i_gte(psx_cpu_t* cpu) {
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DO_PENDING_LOAD;
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cpu->gte_sf = ((cpu->opcode & 0x80000) != 0) * 12;
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cpu->gte_lm = (cpu->opcode & 0x400) != 0;
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cpu->gte_mmat = (cpu->opcode >> 13) & 3;
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cpu->gte_mvec = (cpu->opcode >> 15) & 3;
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cpu->gte_tvec = (cpu->opcode >> 17) & 3;
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cpu->gte_cv = (cpu->opcode >> 13) & 3;
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cpu->gte_v = (cpu->opcode >> 15) & 3;
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cpu->gte_mx = (cpu->opcode >> 17) & 3;
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g_psx_gte_table[cpu->opcode & 0x3f](cpu);
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}
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@@ -2221,6 +2147,16 @@ void psx_gte_i_invalid(psx_cpu_t* cpu) {
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#define R_GC2 cpu->cop2_dr.rgb[2].c[1]
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#define R_BC2 cpu->cop2_dr.rgb[2].c[2]
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#define R_CD2 cpu->cop2_dr.rgb[2].c[3]
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#define R_L11 cpu->cop2_cr.l.m[0].c[0]
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#define R_L11 cpu->cop2_cr.l.m[0].c[0]
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#define R_L12 cpu->cop2_cr.l.m[0].c[1]
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#define R_L13 cpu->cop2_cr.l.m[1].c[0]
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#define R_L21 cpu->cop2_cr.l.m[1].c[1]
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#define R_L22 cpu->cop2_cr.l.m[2].c[0]
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#define R_L23 cpu->cop2_cr.l.m[2].c[1]
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#define R_L31 cpu->cop2_cr.l.m[3].c[0]
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#define R_L32 cpu->cop2_cr.l.m[3].c[1]
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#define R_L33 cpu->cop2_cr.l.m33
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#define GTE_RTP_DQ(i) { \
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R_FLAG = 0; \
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@@ -2348,12 +2284,142 @@ void psx_gte_i_intpl(psx_cpu_t* cpu) {
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R_BC2 = gte_clamp_rgb(cpu, 3, R_MAC3 >> 4);
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}
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#define R_VX v.p[0]
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#define R_VY v.p[1]
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#define R_VZ v.z
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#define R_MX11 mx.m[0].c[0]
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#define R_MX11 mx.m[0].c[0]
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#define R_MX12 mx.m[0].c[1]
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#define R_MX13 mx.m[1].c[0]
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#define R_MX21 mx.m[1].c[1]
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#define R_MX22 mx.m[2].c[0]
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#define R_MX23 mx.m[2].c[1]
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#define R_MX31 mx.m[3].c[0]
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#define R_MX32 mx.m[3].c[1]
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#define R_MX33 mx.m33
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#define R_CV1 cv.x
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#define R_CV2 cv.y
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#define R_CV3 cv.z
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void psx_gte_i_mvmva(psx_cpu_t* cpu) {
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log_fatal("mvmva: Unimplemented GTE instruction");
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R_FLAG = 0;
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gte_matrix_t mx = { 0 };
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gte_vertex_t v = { 0 };
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gte_vec3_t cv = { 0 };
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switch (cpu->gte_mx) {
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case 0: mx = cpu->cop2_cr.rt; break;
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case 1: mx = cpu->cop2_cr.l; break;
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case 2: mx = cpu->cop2_cr.lr; break;
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case 3: {
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R_MX11 = -R_RC << 4;
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R_MX12 = R_RC << 4;
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R_MX13 = R_IR0;
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R_MX21 = R_RT13;
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R_MX22 = R_RT13;
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R_MX23 = R_RT13;
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R_MX31 = R_RT22;
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R_MX32 = R_RT22;
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R_MX33 = R_RT22;
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} break;
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}
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switch (cpu->gte_v) {
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case 0: case 1: case 2:
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v = cpu->cop2_dr.v[cpu->gte_v];
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break;
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case 3: {
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v.p[0] = R_IR1;
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v.p[1] = R_IR2;
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v.z = R_IR3;
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} break;
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}
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switch (cpu->gte_cv) {
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case 0: cv = cpu->cop2_cr.tr; break;
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case 1: cv = cpu->cop2_cr.bk; break;
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case 2: cv = cpu->cop2_cr.fc; break;
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case 3: {
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cv.x = 0;
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cv.y = 0;
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cv.z = 0;
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} break;
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}
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// Bugged case (CV=FC)
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if (cpu->gte_cv == 2) {
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R_MAC1 = gte_clamp_mac(cpu, 1, (int64_t)(I64(R_MX12) * I64(R_VY)) + (I64(R_MX13) * I64(R_VZ)));
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R_MAC2 = gte_clamp_mac(cpu, 2, (int64_t)(I64(R_MX22) * I64(R_VY)) + (I64(R_MX23) * I64(R_VZ)));
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R_MAC3 = gte_clamp_mac(cpu, 3, (int64_t)(I64(R_MX32) * I64(R_VY)) + (I64(R_MX33) * I64(R_VZ)));
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int64_t mac1 = gte_clamp_mac(cpu, 1, (((int64_t)R_CV1) << 12) + (I64(R_MX11) * I64(R_VX)));
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int64_t mac2 = gte_clamp_mac(cpu, 2, (((int64_t)R_CV2) << 12) + (I64(R_MX21) * I64(R_VX)));
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int64_t mac3 = gte_clamp_mac(cpu, 3, (((int64_t)R_CV3) << 12) + (I64(R_MX31) * I64(R_VX)));
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gte_clamp_ir(cpu, 1, mac1, 0);
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gte_clamp_ir(cpu, 2, mac2, 0);
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gte_clamp_ir(cpu, 3, mac3, 0);
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} else {
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R_MAC1 = gte_clamp_mac(cpu, 1, (((int64_t)R_CV1) << 12) + (I64(R_MX11) * I64(R_VX)) + (I64(R_MX12) * I64(R_VY)) + (I64(R_MX13) * I64(R_VZ)));
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R_MAC2 = gte_clamp_mac(cpu, 2, (((int64_t)R_CV2) << 12) + (I64(R_MX21) * I64(R_VX)) + (I64(R_MX22) * I64(R_VY)) + (I64(R_MX23) * I64(R_VZ)));
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R_MAC3 = gte_clamp_mac(cpu, 3, (((int64_t)R_CV3) << 12) + (I64(R_MX31) * I64(R_VX)) + (I64(R_MX32) * I64(R_VY)) + (I64(R_MX33) * I64(R_VZ)));
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}
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R_IR1 = gte_clamp_ir(cpu, 1, R_MAC1, cpu->gte_lm);
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R_IR2 = gte_clamp_ir(cpu, 2, R_MAC2, cpu->gte_lm);
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R_IR3 = gte_clamp_ir(cpu, 3, R_MAC3, cpu->gte_lm);
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}
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#undef R_VX
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#undef R_VY
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#undef R_VZ
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#undef R_MX11
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#undef R_MX11
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#undef R_MX12
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#undef R_MX13
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#undef R_MX21
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#undef R_MX22
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#undef R_MX23
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#undef R_MX31
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#undef R_MX32
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#undef R_MX33
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#undef R_CV1
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#undef R_CV2
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#undef R_CV3
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void psx_gte_i_ncds(psx_cpu_t* cpu) {
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gte_ncds(cpu, 0);
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R_FLAG = 0;
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// int64_t vx = (int64_t)((int16_t)cpu->cop2_dr.v[0].p[0]);
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// int64_t vy = (int64_t)((int16_t)cpu->cop2_dr.v[0].p[1]);
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// int64_t vz = (int64_t)cpu->cop2_dr.v[0].z;
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// R_MAC1 = gte_clamp_mac(cpu, 1, (int64_t)(R_L11 * vx) + (R_L12 * vy) + (R_L13 * vz));
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// R_MAC2 = gte_clamp_mac(cpu, 2, (int64_t)(R_L21 * vx) + (R_L22 * vy) + (R_L23 * vz));
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// R_MAC3 = gte_clamp_mac(cpu, 3, (int64_t)(R_L31 * vx) + (R_L32 * vy) + (R_L33 * vz));
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// R_IR1 = Lm_B1(R_MAC1, lm);
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// R_IR2 = Lm_B2(R_MAC2, lm);
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// R_IR3 = Lm_B3(R_MAC3, lm);
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// R_MAC1 = A1(int44((int64_t)R_RBK << 12) + (R_LR1 * R_IR1) + (R_LR2 * R_IR2) + (R_LR3 * R_IR3));
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// R_MAC2 = A2(int44((int64_t)R_GBK << 12) + (R_LG1 * R_IR1) + (R_LG2 * R_IR2) + (R_LG3 * R_IR3));
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// R_MAC3 = A3(int44((int64_t)R_BBK << 12) + (R_LB1 * R_IR1) + (R_LB2 * R_IR2) + (R_LB3 * R_IR3));
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// R_IR1 = Lm_B1(R_MAC1, lm);
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// R_IR2 = Lm_B2(R_MAC2, lm);
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// R_IR3 = Lm_B3(R_MAC3, lm);
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// R_MAC1 = A1(((R_RC << 4) * R_IR1) + (R_IR0 * Lm_B1(A1(((int64_t)R_RFC << 12) - ((R_RC << 4) * R_IR1)), 0)));
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// R_MAC2 = A2(((R_GC << 4) * R_IR2) + (R_IR0 * Lm_B2(A2(((int64_t)R_GFC << 12) - ((R_GC << 4) * R_IR2)), 0)));
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// R_MAC3 = A3(((R_BC << 4) * R_IR3) + (R_IR0 * Lm_B3(A3(((int64_t)R_BFC << 12) - ((R_BC << 4) * R_IR3)), 0)));
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// R_IR1 = Lm_B1(R_MAC1, lm);
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// R_IR2 = Lm_B2(R_MAC2, lm);
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// R_IR3 = Lm_B3(R_MAC3, lm);
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// R_RGB0 = R_RGB1;
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// R_RGB1 = R_RGB2;
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// R_CD2 = R_CODE;
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// R_RC2 = Lm_C1(R_MAC1 >> 4);
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// R_GC2 = Lm_C2(R_MAC2 >> 4);
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// R_BC2 = Lm_C3(R_MAC3 >> 4);
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}
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void psx_gte_i_cdp(psx_cpu_t* cpu) {
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@@ -67,7 +67,7 @@ typedef void (*psx_cpu_kcall_hook_t)(psx_cpu_t*);
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typedef struct __attribute__((__packed__)) {
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union {
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uint32_t xy;
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uint16_t p[2];
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int16_t p[2];
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};
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int16_t z;
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@@ -76,7 +76,7 @@ typedef struct __attribute__((__packed__)) {
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typedef struct __attribute__((__packed__)) {
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union {
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uint32_t xy;
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uint16_t p[2];
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int16_t p[2];
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};
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} gte_vec2_t;
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@@ -94,7 +94,7 @@ typedef struct __attribute__((__packed__)) {
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typedef struct __attribute__((__packed__)) {
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union {
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uint32_t u32;
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uint16_t c[2];
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int16_t c[2];
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} m[4];
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int16_t m33;
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@@ -143,9 +143,9 @@ struct __attribute__((__packed__)) psx_cpu_t {
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int gte_lm;
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int gte_sf;
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int gte_mmat;
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int gte_mvec;
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int gte_tvec;
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int gte_mx;
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int gte_v;
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int gte_cv;
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int64_t s_mac0;
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int64_t s_mac3;
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