SerialMUX initial commit (revC)

.gitignore

@@ -0,0 +1,32 @@
+ For PCBs designed using KiCad: http://www.kicad-pcb.org/
+# Format documentation: http://kicad-pcb.org/help/file-formats/
+
+# OSX files/folders
+.AppleDouble
+.DS_Store
+
+# Temporary files
+*.000
+*.bak
+*.bck
+*-bak
+*~
+_autosave-*
+*.tmp
+*-cache.lib
+*-rescue.lib
+*-save.pro
+
+# Netlist files (exported from Eeschema)
+*.net
+
+# Autorouter files (exported from Pcbnew)
+*.dsn
+*.ses
+
+# Exported BOM files
+*.xml
+*.csv
+
+# Intermediate CAM files
+CAM/*

README.md

@@ -1,2 +1,8 @@
 # mpads
 Multiple Power And Data Switch
+
+## Serial MUX board revC
+KiCAD 5.99 (new schematic file format)
+- decoupling added
+- some tweaking of LED control line selection
+

serial-mux/serial-mux.pro

@@ -0,0 +1,358 @@
+update=Sunday, 14 June 2020 at 23:31:56
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+[schematic_editor]
+version=1
+PageLayoutDescrFile=
+PlotDirectoryName=Printouts
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=Pcbnew
+SpiceAjustPassiveValues=0
+LabSize=50
+ERC_TestSimilarLabels=1
+[ModEditFrame]
+version=1
+[SchematicFrame]
+version=1
+[pcbnew]
+version=1
+PageLayoutDescrFile=
+LastNetListRead=
+LastSTEPExportPath=
+LastIDFExportPath=
+LastVRMLExportPath=
+LastSpecctraDSNExportPath=
+LastGenCADExportPath=
+CopperLayerCount=2
+BoardThickness=1.2
+AllowMicroVias=0
+AllowBlindVias=1
+MinClearance=0
+MinTrackWidth=0
+MinViaAnnulus=0.05
+MinViaDiameter=0.5
+MinThroughDrill=0.3
+MinMicroViaDiameter=0.5
+MinMicroViaDrill=0.09999999999999999
+MinHoleToHole=0.25
+Unconnected_items=error
+Track_too_close_to_hole=error
+Track_too_close_to_pad=error
+Track_too_close_to_via=error
+Track_too_close_to_copper_area=error
+Track_too_close_to_copper_item=error
+Vias_too_close=error
+Via_too_close_to_track=error
+Via_too_close_to_copper_item=error
+Track_ends_too_close=error
+Parallel_tracks_too_close=error
+Tracks_crossing=error
+Track_too_close_to_board_edge=error
+Via_too_close_to_board_edge=error
+Pad_too_close_to_board_edge=error
+Pads_too_close=error
+Pad_too_close_to_copper_item=error
+Copper_areas_intersect=error
+Copper_areas_too_close=error
+Copper_zone_net_has_no_pads=error
+Via_is_not_connected=warning
+Track_has_unconnected_end=warning
+Hole_too_close_to_pad=error
+Hole_too_close_to_track=error
+Drilled_holes_too_close_together=error
+Track_width_too_small=error
+Track_width_too_large=error
+Via_size_too_small=error
+Via_annulus_too_small=error
+Via_drill_too_small=error
+Pad_drill_too_small=error
+Via_hole_larger_than_diameter=error
+Micro_via_not_allowed=error
+Micro_via_through_too_many_layers=error
+Micro_via_size_too_small=error
+Micro_via_drill_too_small=error
+Buried_via_not_allowed=error
+NetClass_Track_Width_too_small=error
+NetClass_Clearance_too_small=error
+NetClass_via_annulus_too_small=error
+NetClass_Via_Dia_too_small=error
+NetClass_Via_Drill_too_small=error
+NetClass_uVia_Dia_too_small=error
+NetClass_uVia_Drill_too_small=error
+Via_inside_keepout_area=error
+Micro_via_inside_keepout_area=error
+Buried_via_inside_keepout_area=error
+Track_inside_keepout_area=error
+Pad_inside_keepout_area=error
+Footprint_inside_keepout_area=error
+Hole_inside_keepout_area=error
+Text_inside_keepout_area=error
+Graphic_inside_keepout_area=error
+Courtyards_overlap=error
+Footprint_has_no_courtyard_defined=ignore
+Footprint_has_malformed_courtyard=error
+PTH_inside_courtyard=ignore
+NPTH_inside_courtyard=ignore
+Item_on_a_disabled_layer=error
+Board_has_malformed_outline=error
+Missing_footprint=warning
+Duplicate_footprints=warning
+Extra_footprint=warning
+Unresolved_text_variable=error
+CopperEdgeClearance=0.01
+TrackWidth1=0.17
+TrackWidth2=0.17
+TrackWidth3=0.3
+TrackWidth4=0.5
+TrackWidth5=0.6
+TrackWidth6=0.7
+TrackWidth7=1
+TrackWidth8=2
+TrackWidth9=4
+TrackWidth10=6
+ViaDiameter1=0.5
+ViaDrill1=0.3
+ViaDiameter2=0.5
+ViaDrill2=0.3
+ViaDiameter3=0.8
+ViaDrill3=0.5
+ViaDiameter4=1
+ViaDrill4=0.8
+dPairWidth1=0.2
+dPairGap1=0.25
+dPairViaGap1=0.25
+SilkLineWidth=0.15
+SilkTextSizeV=1
+SilkTextSizeH=1
+SilkTextSizeThickness=0.15
+SilkTextItalic=0
+SilkTextUpright=0
+CopperLineWidth=0.17
+CopperTextSizeV=1
+CopperTextSizeH=1
+CopperTextThickness=0.15
+CopperTextItalic=0
+CopperTextUpright=0
+EdgeCutLineWidth=0.15
+CourtyardLineWidth=0.05
+FabLineWidth=0.09999999999999999
+FabTextSizeV=1
+FabTextSizeH=1
+FabTextSizeThickness=0.15
+FabTextItalic=0
+FabTextUpright=0
+OthersLineWidth=0.09999999999999999
+OthersTextSizeV=1
+OthersTextSizeH=1
+OthersTextSizeThickness=0.15
+OthersTextItalic=0
+OthersTextUpright=0
+DimensionUnits=0
+DimensionPrecision=1
+SolderMaskClearance=0.09999999999999999
+SolderMaskMinWidth=0.3
+SolderPasteClearance=0
+SolderPasteRatio=0
+[pcbnew/Layer.F.Cu]
+Name=F.Cu
+Type=2
+Enabled=1
+[pcbnew/Layer.In1.Cu]
+Name=In1.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In2.Cu]
+Name=In2.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In3.Cu]
+Name=In3.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In4.Cu]
+Name=In4.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In5.Cu]
+Name=In5.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In6.Cu]
+Name=In6.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In7.Cu]
+Name=In7.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In8.Cu]
+Name=In8.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In9.Cu]
+Name=In9.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In10.Cu]
+Name=In10.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In11.Cu]
+Name=In11.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In12.Cu]
+Name=In12.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In13.Cu]
+Name=In13.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In14.Cu]
+Name=In14.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In15.Cu]
+Name=In15.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In16.Cu]
+Name=In16.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In17.Cu]
+Name=In17.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In18.Cu]
+Name=In18.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In19.Cu]
+Name=In19.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In20.Cu]
+Name=In20.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In21.Cu]
+Name=In21.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In22.Cu]
+Name=In22.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In23.Cu]
+Name=In23.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In24.Cu]
+Name=In24.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In25.Cu]
+Name=In25.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In26.Cu]
+Name=In26.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In27.Cu]
+Name=In27.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In28.Cu]
+Name=In28.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In29.Cu]
+Name=In29.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In30.Cu]
+Name=In30.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.B.Cu]
+Name=B.Cu
+Type=2
+Enabled=1
+[pcbnew/Layer.B.Adhes]
+Enabled=1
+[pcbnew/Layer.F.Adhes]
+Enabled=1
+[pcbnew/Layer.B.Paste]
+Enabled=1
+[pcbnew/Layer.F.Paste]
+Enabled=1
+[pcbnew/Layer.B.SilkS]
+Enabled=1
+[pcbnew/Layer.F.SilkS]
+Enabled=1
+[pcbnew/Layer.B.Mask]
+Enabled=1
+[pcbnew/Layer.F.Mask]
+Enabled=1
+[pcbnew/Layer.Dwgs.User]
+Enabled=1
+[pcbnew/Layer.Cmts.User]
+Enabled=1
+[pcbnew/Layer.Eco1.User]
+Enabled=1
+[pcbnew/Layer.Eco2.User]
+Enabled=1
+[pcbnew/Layer.Edge.Cuts]
+Enabled=1
+[pcbnew/Layer.Margin]
+Enabled=1
+[pcbnew/Layer.B.CrtYd]
+Enabled=1
+[pcbnew/Layer.F.CrtYd]
+Enabled=1
+[pcbnew/Layer.B.Fab]
+Enabled=1
+[pcbnew/Layer.F.Fab]
+Enabled=1
+[pcbnew/Layer.Rescue]
+Enabled=0
+[pcbnew/Netclasses]
+[pcbnew/Netclasses/Default]
+Name=Default
+Clearance=0.1
+TrackWidth=0.17
+ViaDiameter=0.5
+ViaDrill=0.3
+uViaDiameter=0.5
+uViaDrill=0.1
+dPairWidth=0.2
+dPairGap=0.25
+dPairViaGap=0.25
+[pcbnew/Netclasses/1]
+Name=Power
+Clearance=0.2
+TrackWidth=0.5
+ViaDiameter=1
+ViaDrill=0.7
+uViaDiameter=0.5
+uViaDrill=0.1
+dPairWidth=0.2
+dPairGap=0.25
+dPairViaGap=0.25
+[sheetnames]
+1=70485e4f-3750-4ad3-9b5b-153842e4fac4: