We need to continue with next microblaze PVR version that's why
I have to remove that ancient version. These version strings not match
any versions. From Microblaze v5.00.a is possible to use this style.
I believe that none use ancients versions. If yes they will be just
labeled as unknown version.
Signed-off-by: Michal Simek <monstr@monstr.eu>
panic_timeout is in BSS section and it is cleared with BSS section.
This means that value is setup to 0.
Signed-off-by: Michal Simek <monstr@monstr.eu>
For simpleImage format we need to compile DTC. There is still possibility
to compile only Linux kernel without DTB compiled-in.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Microblaze uses timer interrupt mode. Microblaze don't have
any performance counter that's why we use just simple implementation.
Signed-off-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Level interrupts need to be ack'd in the unmask handler, as in powerpc.
Among other issues, this bug causes the system clock to appear to run at
double-speed.
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Microblaze v7.20 provides new lwx, swx instructions which bring
possibility to implement lock rutines.
There are some tests in open posix thread LTP part but current
toolchain not support it.
Signed-off-by: Michal Simek <monstr@monstr.eu>
The functions, dev_arch_data_set_node and get_node are missing
and are needed by some device drivers such as I2C.
Signed-off-by: John Linn <john.linn@xilinx.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
The device tree handling for the gpio in the heart beat was not handling
the system when there was no gpio and it wasn't working with a newer version
of the gpio core which does not have the is-bidir property.
Signed-off-by: John Linn <john.linn@xilinx.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
This is first patch which clear part of uaccess.h.
uaccess.h will be clear later.
Signed-off-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
This will ensure that kernels built with no custom CPU settings will still boot
OK on hardware that has additional CPU hardware instructions etc.
Signed-off-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Asm code uses barrel-shifter instruction that's why we have
to protect cases when HW don't have it.
Reported-by: John Linn <john.linn@xilinx.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
This was intended to allow manual override of CPU settings copied automatically
to Kconfig.auto, however it's problematic for several reasons, but mostly:
* If the defconfig doesn't have ALLOW_EDIT_AUTO=y, then it's impossible for
that defconfig to iverride the values in the kernel source tree. This leads
to very strange errors where the kernel is compiled with the wrong CPUFLAGS.
Next patch in the series will back out the default in Kconfig.auto to baseline
settings, so a kernel built with no default values will at least boot on any
hardware, just not make use of additional CPU features.
Signed-off-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Two version are generated.
linux.bin.ub which is created from linux.bin file
and
simpleImage.<dts>.ub which is created from stripped simpleImage.<dts> file
Load address and entry point is for microblaze first instruction
which is CONFIG_KERNEL_BASE_ADDR variable.
There is possible for simpleImage format parse _start symbol too.
simpleImage.<dts> is still stripped elf file
I cleared simpleImage.<dts>.unstrip file because there are so big.
Signed-off-by: Michal Simek <monstr@monstr.eu>
After the signal frame is set up on the userspace stack, ptrace() should
be given an opportunity to single-step into the signal handler
FRV, Blackfin, mn10300 and UM. Worth to look at that patches.
Signed-off-by: Michal Simek <monstr@monstr.eu>
There is missing checking agains PVR but this is not important
for now. There are some missing checking too.
Signed-off-by: Michal Simek <monstr@monstr.eu>
We used cache_line as cache_line_lenght. For this reason
we did cache flushing 4 times longer than was necessary.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Till this patch reset always perform writen to 1.
Now we can use negative logic and perform reset write to 0.
It is opposite level than is currently read from that pin
Signed-off-by: Michal Simek <monstr@monstr.eu>
