mirror of
https://github.com/armbian/linux.git
synced 2026-01-06 10:13:00 -08:00
Merge branch 'next/fixes-non-critical' into next/drivers
Conflicts: arch/arm/mach-lpc32xx/clock.c arch/arm/mach-pxa/pxa25x.c arch/arm/mach-pxa/pxa27x.c The conflicts with pxa are non-obvious, we have multiple branches adding and removing the same clock settings. According to Haojian Zhuang, removing the sa1100 rtc dummy clock is the correct fix here. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
@@ -7,9 +7,9 @@ Each LED is represented as a sub-node of the gpio-leds device. Each
|
||||
node's name represents the name of the corresponding LED.
|
||||
|
||||
LED sub-node properties:
|
||||
- gpios : Should specify the LED's GPIO, see "Specifying GPIO information
|
||||
for devices" in Documentation/devicetree/booting-without-of.txt. Active
|
||||
low LEDs should be indicated using flags in the GPIO specifier.
|
||||
- gpios : Should specify the LED's GPIO, see "gpios property" in
|
||||
Documentation/devicetree/gpio.txt. Active low LEDs should be
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||||
indicated using flags in the GPIO specifier.
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||||
- label : (optional) The label for this LED. If omitted, the label is
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||||
taken from the node name (excluding the unit address).
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||||
- linux,default-trigger : (optional) This parameter, if present, is a
|
||||
|
||||
@@ -30,6 +30,7 @@ national National Semiconductor
|
||||
nintendo Nintendo
|
||||
nvidia NVIDIA
|
||||
nxp NXP Semiconductors
|
||||
picochip Picochip Ltd
|
||||
powervr Imagination Technologies
|
||||
qcom Qualcomm, Inc.
|
||||
ramtron Ramtron International
|
||||
|
||||
@@ -7,21 +7,29 @@ Supported chips:
|
||||
Addresses scanned: I2C 0x18 - 0x1f
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||||
Datasheets:
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||||
http://www.analog.com/static/imported-files/data_sheets/ADT7408.pdf
|
||||
* IDT TSE2002B3, TS3000B3
|
||||
Prefix: 'tse2002b3', 'ts3000b3'
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||||
* Atmel AT30TS00
|
||||
Prefix: 'at30ts00'
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||||
Addresses scanned: I2C 0x18 - 0x1f
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||||
Datasheets:
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||||
http://www.idt.com/products/getdoc.cfm?docid=18715691
|
||||
http://www.idt.com/products/getdoc.cfm?docid=18715692
|
||||
http://www.atmel.com/Images/doc8585.pdf
|
||||
* IDT TSE2002B3, TSE2002GB2, TS3000B3, TS3000GB2
|
||||
Prefix: 'tse2002', 'ts3000'
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||||
Addresses scanned: I2C 0x18 - 0x1f
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Datasheets:
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||||
http://www.idt.com/sites/default/files/documents/IDT_TSE2002B3C_DST_20100512_120303152056.pdf
|
||||
http://www.idt.com/sites/default/files/documents/IDT_TSE2002GB2A1_DST_20111107_120303145914.pdf
|
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http://www.idt.com/sites/default/files/documents/IDT_TS3000B3A_DST_20101129_120303152013.pdf
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http://www.idt.com/sites/default/files/documents/IDT_TS3000GB2A1_DST_20111104_120303151012.pdf
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* Maxim MAX6604
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Prefix: 'max6604'
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Addresses scanned: I2C 0x18 - 0x1f
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Datasheets:
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http://datasheets.maxim-ic.com/en/ds/MAX6604.pdf
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* Microchip MCP9805, MCP98242, MCP98243, MCP9843
|
||||
Prefixes: 'mcp9805', 'mcp98242', 'mcp98243', 'mcp9843'
|
||||
* Microchip MCP9804, MCP9805, MCP98242, MCP98243, MCP9843
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Prefixes: 'mcp9804', 'mcp9805', 'mcp98242', 'mcp98243', 'mcp9843'
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||||
Addresses scanned: I2C 0x18 - 0x1f
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Datasheets:
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http://ww1.microchip.com/downloads/en/DeviceDoc/22203C.pdf
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http://ww1.microchip.com/downloads/en/DeviceDoc/21977b.pdf
|
||||
http://ww1.microchip.com/downloads/en/DeviceDoc/21996a.pdf
|
||||
http://ww1.microchip.com/downloads/en/DeviceDoc/22153c.pdf
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@@ -48,6 +56,12 @@ Supported chips:
|
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Datasheets:
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http://www.st.com/stonline/products/literature/ds/13447/stts424.pdf
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http://www.st.com/stonline/products/literature/ds/13448/stts424e02.pdf
|
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* ST Microelectronics STTS2002, STTS3000
|
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Prefix: 'stts2002', 'stts3000'
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Addresses scanned: I2C 0x18 - 0x1f
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Datasheets:
|
||||
http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATASHEET/CD00225278.pdf
|
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http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATA_BRIEF/CD00270920.pdf
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* JEDEC JC 42.4 compliant temperature sensor chips
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Prefix: 'jc42'
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||||
Addresses scanned: I2C 0x18 - 0x1f
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|
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@@ -13,7 +13,8 @@ Detection
|
||||
|
||||
All ALPS touchpads should respond to the "E6 report" command sequence:
|
||||
E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
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00-00-64.
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||||
00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s
|
||||
if some buttons are pressed.
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||||
|
||||
If the E6 report is successful, the touchpad model is identified using the "E7
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report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is
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|
||||
@@ -2211,6 +2211,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
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||||
|
||||
default: off.
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||||
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||||
printk.always_kmsg_dump=
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Trigger kmsg_dump for cases other than kernel oops or
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||||
panics
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Format: <bool> (1/Y/y=enable, 0/N/n=disable)
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||||
default: disabled
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||||
|
||||
printk.time= Show timing data prefixed to each printk message line
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Format: <bool> (1/Y/y=enable, 0/N/n=disable)
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||||
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@@ -962,7 +962,7 @@ F: drivers/tty/serial/msm_serial.c
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||||
F: drivers/platform/msm/
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F: drivers/*/pm8???-*
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F: include/linux/mfd/pm8xxx/
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T: git git://codeaurora.org/quic/kernel/davidb/linux-msm.git
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm.git
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S: Maintained
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ARM/TOSA MACHINE SUPPORT
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||||
@@ -1310,7 +1310,7 @@ F: drivers/atm/
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F: include/linux/atm*
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ATMEL AT91 MCI DRIVER
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M: Nicolas Ferre <nicolas.ferre@atmel.com>
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M: Ludovic Desroches <ludovic.desroches@atmel.com>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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W: http://www.atmel.com/products/AT91/
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W: http://www.at91.com/
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@@ -1318,7 +1318,7 @@ S: Maintained
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F: drivers/mmc/host/at91_mci.c
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||||
ATMEL AT91 / AT32 MCI DRIVER
|
||||
M: Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
M: Ludovic Desroches <ludovic.desroches@atmel.com>
|
||||
S: Maintained
|
||||
F: drivers/mmc/host/atmel-mci.c
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||||
F: drivers/mmc/host/atmel-mci-regs.h
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|
||||
2
Makefile
2
Makefile
@@ -1,7 +1,7 @@
|
||||
VERSION = 3
|
||||
PATCHLEVEL = 3
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||||
SUBLEVEL = 0
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||||
EXTRAVERSION = -rc6
|
||||
EXTRAVERSION = -rc7
|
||||
NAME = Saber-toothed Squirrel
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||||
|
||||
# *DOCUMENTATION*
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||||
|
||||
@@ -108,7 +108,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
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||||
" lda $31,3b-2b(%0)\n"
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||||
" .previous\n"
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||||
: "+r"(ret), "=&r"(prev), "=&r"(cmp)
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||||
: "r"(uaddr), "r"((long)oldval), "r"(newval)
|
||||
: "r"(uaddr), "r"((long)(int)oldval), "r"(newval)
|
||||
: "memory");
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||||
|
||||
*uval = prev;
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||||
|
||||
@@ -901,6 +901,7 @@ config ARCH_U300
|
||||
|
||||
config ARCH_U8500
|
||||
bool "ST-Ericsson U8500 Series"
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||||
depends on MMU
|
||||
select CPU_V7
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||||
select ARM_AMBA
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||||
select GENERIC_CLOCKEVENTS
|
||||
@@ -1280,7 +1281,7 @@ config ARM_ERRATA_743622
|
||||
depends on CPU_V7
|
||||
help
|
||||
This option enables the workaround for the 743622 Cortex-A9
|
||||
(r2p0..r2p2) erratum. Under very rare conditions, a faulty
|
||||
(r2p*) erratum. Under very rare conditions, a faulty
|
||||
optimisation in the Cortex-A9 Store Buffer may lead to data
|
||||
corruption. This workaround sets a specific bit in the diagnostic
|
||||
register of the Cortex-A9 which disables the Store Buffer
|
||||
@@ -1577,7 +1578,7 @@ config LOCAL_TIMERS
|
||||
config ARCH_NR_GPIO
|
||||
int
|
||||
default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
|
||||
default 350 if ARCH_U8500
|
||||
default 355 if ARCH_U8500
|
||||
default 0
|
||||
help
|
||||
Maximum number of GPIOs in the system.
|
||||
|
||||
1
arch/arm/boot/.gitignore
vendored
1
arch/arm/boot/.gitignore
vendored
@@ -3,3 +3,4 @@ zImage
|
||||
xipImage
|
||||
bootpImage
|
||||
uImage
|
||||
*.dtb
|
||||
|
||||
@@ -69,6 +69,7 @@ CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_ADV_OPTIONS=y
|
||||
CONFIG_MTD_CFI_GEOMETRY=y
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
||||
# CONFIG_MTD_CFI_I2 is not set
|
||||
CONFIG_MTD_CFI_INTELEXT=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
|
||||
145
arch/arm/configs/lpc32xx_defconfig
Normal file
145
arch/arm/configs/lpc32xx_defconfig
Normal file
@@ -0,0 +1,145 @@
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
CONFIG_SYSFS_DEPRECATED_V2=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_SYSCTL_SYSCALL=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
CONFIG_ARCH_LPC32XX=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_AEABI=y
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_CMDLINE="console=ttyS0,115200n81 root=/dev/ram0"
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_FPE_NWFPE=y
|
||||
CONFIG_VFP=y
|
||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
CONFIG_BINFMT_AOUT=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
||||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_INET_LRO is not set
|
||||
# CONFIG_INET_DIAG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_MUSEUM_IDS=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_CRYPTOLOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=1
|
||||
CONFIG_BLK_DEV_RAM_SIZE=16384
|
||||
CONFIG_MISC_DEVICES=y
|
||||
CONFIG_EEPROM_AT25=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_SMSC_PHY=y
|
||||
# CONFIG_WLAN is not set
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=240
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_TOUCHSCREEN_LPC32XX=y
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_PNX=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_PL022=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_PNX4008_WATCHDOG=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ARMCLCD=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
|
||||
CONFIG_LOGO=y
|
||||
# CONFIG_LOGO_LINUX_MONO is not set
|
||||
# CONFIG_LOGO_LINUX_VGA16 is not set
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_SEQUENCER=y
|
||||
CONFIG_SND_MIXER_OSS=y
|
||||
CONFIG_SND_PCM_OSS=y
|
||||
CONFIG_SND_SEQUENCER_OSS=y
|
||||
CONFIG_SND_DYNAMIC_MINORS=y
|
||||
# CONFIG_SND_VERBOSE_PROCFS is not set
|
||||
# CONFIG_SND_DRIVERS is not set
|
||||
# CONFIG_SND_ARM is not set
|
||||
# CONFIG_SND_SPI is not set
|
||||
CONFIG_SND_SOC=y
|
||||
# CONFIG_HID_SUPPORT is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_LIBUSUAL=y
|
||||
CONFIG_MMC=y
|
||||
# CONFIG_MMC_BLOCK_BOUNCE is not set
|
||||
CONFIG_MMC_ARMMMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_INTF_DEV_UIE_EMUL=y
|
||||
CONFIG_RTC_DRV_LPC32XX=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_JFFS2_FS_WBUF_VERIFY=y
|
||||
CONFIG_CRAMFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ASCII=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_NLS_UTF8=y
|
||||
# CONFIG_SCHED_DEBUG is not set
|
||||
# CONFIG_DEBUG_PREEMPT is not set
|
||||
CONFIG_DEBUG_INFO=y
|
||||
# CONFIG_FTRACE is not set
|
||||
# CONFIG_ARM_UNWIND is not set
|
||||
CONFIG_DEBUG_LL=y
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
CONFIG_CRYPTO_ANSI_CPRNG=y
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_CRC_CCITT=y
|
||||
@@ -134,7 +134,7 @@ int __init armpmu_register(struct arm_pmu *armpmu, char *name, int type);
|
||||
|
||||
u64 armpmu_event_update(struct perf_event *event,
|
||||
struct hw_perf_event *hwc,
|
||||
int idx, int overflow);
|
||||
int idx);
|
||||
|
||||
int armpmu_event_set_period(struct perf_event *event,
|
||||
struct hw_perf_event *hwc,
|
||||
|
||||
@@ -242,6 +242,7 @@ static void ecard_init_pgtables(struct mm_struct *mm)
|
||||
|
||||
memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE));
|
||||
|
||||
vma.vm_flags = VM_EXEC;
|
||||
vma.vm_mm = mm;
|
||||
|
||||
flush_tlb_range(&vma, IO_START, IO_START + IO_SIZE);
|
||||
|
||||
@@ -180,7 +180,7 @@ armpmu_event_set_period(struct perf_event *event,
|
||||
u64
|
||||
armpmu_event_update(struct perf_event *event,
|
||||
struct hw_perf_event *hwc,
|
||||
int idx, int overflow)
|
||||
int idx)
|
||||
{
|
||||
struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
|
||||
u64 delta, prev_raw_count, new_raw_count;
|
||||
@@ -193,13 +193,7 @@ again:
|
||||
new_raw_count) != prev_raw_count)
|
||||
goto again;
|
||||
|
||||
new_raw_count &= armpmu->max_period;
|
||||
prev_raw_count &= armpmu->max_period;
|
||||
|
||||
if (overflow)
|
||||
delta = armpmu->max_period - prev_raw_count + new_raw_count + 1;
|
||||
else
|
||||
delta = new_raw_count - prev_raw_count;
|
||||
delta = (new_raw_count - prev_raw_count) & armpmu->max_period;
|
||||
|
||||
local64_add(delta, &event->count);
|
||||
local64_sub(delta, &hwc->period_left);
|
||||
@@ -216,7 +210,7 @@ armpmu_read(struct perf_event *event)
|
||||
if (hwc->idx < 0)
|
||||
return;
|
||||
|
||||
armpmu_event_update(event, hwc, hwc->idx, 0);
|
||||
armpmu_event_update(event, hwc, hwc->idx);
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -232,7 +226,7 @@ armpmu_stop(struct perf_event *event, int flags)
|
||||
if (!(hwc->state & PERF_HES_STOPPED)) {
|
||||
armpmu->disable(hwc, hwc->idx);
|
||||
barrier(); /* why? */
|
||||
armpmu_event_update(event, hwc, hwc->idx, 0);
|
||||
armpmu_event_update(event, hwc, hwc->idx);
|
||||
hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
|
||||
}
|
||||
}
|
||||
@@ -518,7 +512,13 @@ __hw_perf_event_init(struct perf_event *event)
|
||||
hwc->config_base |= (unsigned long)mapping;
|
||||
|
||||
if (!hwc->sample_period) {
|
||||
hwc->sample_period = armpmu->max_period;
|
||||
/*
|
||||
* For non-sampling runs, limit the sample_period to half
|
||||
* of the counter width. That way, the new counter value
|
||||
* is far less likely to overtake the previous one unless
|
||||
* you have some serious IRQ latency issues.
|
||||
*/
|
||||
hwc->sample_period = armpmu->max_period >> 1;
|
||||
hwc->last_period = hwc->sample_period;
|
||||
local64_set(&hwc->period_left, hwc->sample_period);
|
||||
}
|
||||
@@ -679,6 +679,28 @@ static void __init cpu_pmu_init(struct arm_pmu *armpmu)
|
||||
armpmu->type = ARM_PMU_DEVICE_CPU;
|
||||
}
|
||||
|
||||
/*
|
||||
* PMU hardware loses all context when a CPU goes offline.
|
||||
* When a CPU is hotplugged back in, since some hardware registers are
|
||||
* UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
|
||||
* junk values out of them.
|
||||
*/
|
||||
static int __cpuinit pmu_cpu_notify(struct notifier_block *b,
|
||||
unsigned long action, void *hcpu)
|
||||
{
|
||||
if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
|
||||
return NOTIFY_DONE;
|
||||
|
||||
if (cpu_pmu && cpu_pmu->reset)
|
||||
cpu_pmu->reset(NULL);
|
||||
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
||||
static struct notifier_block __cpuinitdata pmu_cpu_notifier = {
|
||||
.notifier_call = pmu_cpu_notify,
|
||||
};
|
||||
|
||||
/*
|
||||
* CPU PMU identification and registration.
|
||||
*/
|
||||
@@ -730,6 +752,7 @@ init_hw_perf_events(void)
|
||||
pr_info("enabled with %s PMU driver, %d counters available\n",
|
||||
cpu_pmu->name, cpu_pmu->num_events);
|
||||
cpu_pmu_init(cpu_pmu);
|
||||
register_cpu_notifier(&pmu_cpu_notifier);
|
||||
armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW);
|
||||
} else {
|
||||
pr_info("no hardware support available\n");
|
||||
|
||||
@@ -467,23 +467,6 @@ armv6pmu_enable_event(struct hw_perf_event *hwc,
|
||||
raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
|
||||
}
|
||||
|
||||
static int counter_is_active(unsigned long pmcr, int idx)
|
||||
{
|
||||
unsigned long mask = 0;
|
||||
if (idx == ARMV6_CYCLE_COUNTER)
|
||||
mask = ARMV6_PMCR_CCOUNT_IEN;
|
||||
else if (idx == ARMV6_COUNTER0)
|
||||
mask = ARMV6_PMCR_COUNT0_IEN;
|
||||
else if (idx == ARMV6_COUNTER1)
|
||||
mask = ARMV6_PMCR_COUNT1_IEN;
|
||||
|
||||
if (mask)
|
||||
return pmcr & mask;
|
||||
|
||||
WARN_ONCE(1, "invalid counter number (%d)\n", idx);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static irqreturn_t
|
||||
armv6pmu_handle_irq(int irq_num,
|
||||
void *dev)
|
||||
@@ -513,7 +496,8 @@ armv6pmu_handle_irq(int irq_num,
|
||||
struct perf_event *event = cpuc->events[idx];
|
||||
struct hw_perf_event *hwc;
|
||||
|
||||
if (!counter_is_active(pmcr, idx))
|
||||
/* Ignore if we don't have an event. */
|
||||
if (!event)
|
||||
continue;
|
||||
|
||||
/*
|
||||
@@ -524,7 +508,7 @@ armv6pmu_handle_irq(int irq_num,
|
||||
continue;
|
||||
|
||||
hwc = &event->hw;
|
||||
armpmu_event_update(event, hwc, idx, 1);
|
||||
armpmu_event_update(event, hwc, idx);
|
||||
data.period = event->hw.last_period;
|
||||
if (!armpmu_event_set_period(event, hwc, idx))
|
||||
continue;
|
||||
|
||||
@@ -809,6 +809,11 @@ static inline int armv7_pmnc_disable_intens(int idx)
|
||||
|
||||
counter = ARMV7_IDX_TO_COUNTER(idx);
|
||||
asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter)));
|
||||
isb();
|
||||
/* Clear the overflow flag in case an interrupt is pending. */
|
||||
asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (BIT(counter)));
|
||||
isb();
|
||||
|
||||
return idx;
|
||||
}
|
||||
|
||||
@@ -955,6 +960,10 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
|
||||
struct perf_event *event = cpuc->events[idx];
|
||||
struct hw_perf_event *hwc;
|
||||
|
||||
/* Ignore if we don't have an event. */
|
||||
if (!event)
|
||||
continue;
|
||||
|
||||
/*
|
||||
* We have a single interrupt for all counters. Check that
|
||||
* each counter has overflowed before we process it.
|
||||
@@ -963,7 +972,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
|
||||
continue;
|
||||
|
||||
hwc = &event->hw;
|
||||
armpmu_event_update(event, hwc, idx, 1);
|
||||
armpmu_event_update(event, hwc, idx);
|
||||
data.period = event->hw.last_period;
|
||||
if (!armpmu_event_set_period(event, hwc, idx))
|
||||
continue;
|
||||
|
||||
@@ -255,11 +255,14 @@ xscale1pmu_handle_irq(int irq_num, void *dev)
|
||||
struct perf_event *event = cpuc->events[idx];
|
||||
struct hw_perf_event *hwc;
|
||||
|
||||
if (!event)
|
||||
continue;
|
||||
|
||||
if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx))
|
||||
continue;
|
||||
|
||||
hwc = &event->hw;
|
||||
armpmu_event_update(event, hwc, idx, 1);
|
||||
armpmu_event_update(event, hwc, idx);
|
||||
data.period = event->hw.last_period;
|
||||
if (!armpmu_event_set_period(event, hwc, idx))
|
||||
continue;
|
||||
@@ -592,11 +595,14 @@ xscale2pmu_handle_irq(int irq_num, void *dev)
|
||||
struct perf_event *event = cpuc->events[idx];
|
||||
struct hw_perf_event *hwc;
|
||||
|
||||
if (!xscale2_pmnc_counter_has_overflowed(pmnc, idx))
|
||||
if (!event)
|
||||
continue;
|
||||
|
||||
if (!xscale2_pmnc_counter_has_overflowed(of_flags, idx))
|
||||
continue;
|
||||
|
||||
hwc = &event->hw;
|
||||
armpmu_event_update(event, hwc, idx, 1);
|
||||
armpmu_event_update(event, hwc, idx);
|
||||
data.period = event->hw.last_period;
|
||||
if (!armpmu_event_set_period(event, hwc, idx))
|
||||
continue;
|
||||
@@ -663,7 +669,7 @@ xscale2pmu_enable_event(struct hw_perf_event *hwc, int idx)
|
||||
static void
|
||||
xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
|
||||
{
|
||||
unsigned long flags, ien, evtsel;
|
||||
unsigned long flags, ien, evtsel, of_flags;
|
||||
struct pmu_hw_events *events = cpu_pmu->get_hw_events();
|
||||
|
||||
ien = xscale2pmu_read_int_enable();
|
||||
@@ -672,26 +678,31 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
|
||||
switch (idx) {
|
||||
case XSCALE_CYCLE_COUNTER:
|
||||
ien &= ~XSCALE2_CCOUNT_INT_EN;
|
||||
of_flags = XSCALE2_CCOUNT_OVERFLOW;
|
||||
break;
|
||||
case XSCALE_COUNTER0:
|
||||
ien &= ~XSCALE2_COUNT0_INT_EN;
|
||||
evtsel &= ~XSCALE2_COUNT0_EVT_MASK;
|
||||
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT0_EVT_SHFT;
|
||||
of_flags = XSCALE2_COUNT0_OVERFLOW;
|
||||
break;
|
||||
case XSCALE_COUNTER1:
|
||||
ien &= ~XSCALE2_COUNT1_INT_EN;
|
||||
evtsel &= ~XSCALE2_COUNT1_EVT_MASK;
|
||||
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT1_EVT_SHFT;
|
||||
of_flags = XSCALE2_COUNT1_OVERFLOW;
|
||||
break;
|
||||
case XSCALE_COUNTER2:
|
||||
ien &= ~XSCALE2_COUNT2_INT_EN;
|
||||
evtsel &= ~XSCALE2_COUNT2_EVT_MASK;
|
||||
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT2_EVT_SHFT;
|
||||
of_flags = XSCALE2_COUNT2_OVERFLOW;
|
||||
break;
|
||||
case XSCALE_COUNTER3:
|
||||
ien &= ~XSCALE2_COUNT3_INT_EN;
|
||||
evtsel &= ~XSCALE2_COUNT3_EVT_MASK;
|
||||
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT3_EVT_SHFT;
|
||||
of_flags = XSCALE2_COUNT3_OVERFLOW;
|
||||
break;
|
||||
default:
|
||||
WARN_ONCE(1, "invalid counter number (%d)\n", idx);
|
||||
@@ -701,6 +712,7 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
|
||||
raw_spin_lock_irqsave(&events->pmu_lock, flags);
|
||||
xscale2pmu_write_event_select(evtsel);
|
||||
xscale2pmu_write_int_enable(ien);
|
||||
xscale2pmu_write_overflow_flags(of_flags);
|
||||
raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
|
||||
}
|
||||
|
||||
|
||||
@@ -95,7 +95,7 @@ static int davinci_target(struct cpufreq_policy *policy,
|
||||
if (freqs.old == freqs.new)
|
||||
return ret;
|
||||
|
||||
dev_dbg(&cpufreq.dev, "transition: %u --> %u\n", freqs.old, freqs.new);
|
||||
dev_dbg(cpufreq.dev, "transition: %u --> %u\n", freqs.old, freqs.new);
|
||||
|
||||
ret = cpufreq_frequency_table_target(policy, pdata->freq_table,
|
||||
freqs.new, relation, &idx);
|
||||
|
||||
@@ -1026,7 +1026,7 @@ static int da850_round_armrate(struct clk *clk, unsigned long rate)
|
||||
}
|
||||
#endif
|
||||
|
||||
int da850_register_pm(struct platform_device *pdev)
|
||||
int __init da850_register_pm(struct platform_device *pdev)
|
||||
{
|
||||
int ret;
|
||||
struct davinci_pm_config *pdata = pdev->dev.platform_data;
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user