mirror of
https://github.com/armbian/linux.git
synced 2026-01-06 10:13:00 -08:00
Merge branch 'merge' into next
Merge a pile of fixes that went into the "merge" branch (3.13-rc's) such as Anton Little Endian fixes. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
@@ -77,7 +77,6 @@
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compatible = "fsl,mpc5121-immr";
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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ranges = <0x0 0x80000000 0x400000>;
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reg = <0x80000000 0x400000>;
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bus-frequency = <66000000>; /* 66 MHz ips bus */
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@@ -58,7 +58,6 @@
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compatible = "fsl,mpc5121-immr";
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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ranges = <0x0 0x80000000 0x400000>;
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reg = <0x80000000 0x400000>;
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bus-frequency = <66000000>; // 66 MHz ips bus
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@@ -189,6 +188,10 @@
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reg = <0xA000 0x1000>;
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};
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// disable USB1 port
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// TODO:
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// correct pinmux config and fix USB3320 ulpi dependency
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// before re-enabling it
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usb@3000 {
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compatible = "fsl,mpc5121-usb2-dr";
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reg = <0x3000 0x400>;
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@@ -197,6 +200,7 @@
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interrupts = <43 0x8>;
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dr_mode = "host";
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phy_type = "ulpi";
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status = "disabled";
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};
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// 5125 PSCs are not 52xx or 5121 PSC compatible
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@@ -12,7 +12,6 @@ CONFIG_EXPERT=y
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CONFIG_PPC_MPC52xx=y
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CONFIG_PPC_MPC5200_SIMPLE=y
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# CONFIG_PPC_PMAC is not set
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CONFIG_PPC_BESTCOMM=y
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CONFIG_SPARSE_IRQ=y
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CONFIG_PM=y
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# CONFIG_PCI is not set
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@@ -71,6 +70,8 @@ CONFIG_USB_DEVICEFS=y
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CONFIG_USB_OHCI_HCD=y
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CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
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CONFIG_USB_STORAGE=y
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CONFIG_DMADEVICES=y
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CONFIG_PPC_BESTCOMM=y
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CONFIG_EXT2_FS=y
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CONFIG_EXT3_FS=y
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# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
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@@ -15,7 +15,6 @@ CONFIG_PPC_MPC52xx=y
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CONFIG_PPC_MPC5200_SIMPLE=y
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CONFIG_PPC_LITE5200=y
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# CONFIG_PPC_PMAC is not set
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CONFIG_PPC_BESTCOMM=y
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CONFIG_NO_HZ=y
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CONFIG_HIGH_RES_TIMERS=y
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CONFIG_SPARSE_IRQ=y
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@@ -59,6 +58,8 @@ CONFIG_I2C_CHARDEV=y
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CONFIG_I2C_MPC=y
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# CONFIG_HWMON is not set
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CONFIG_VIDEO_OUTPUT_CONTROL=m
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CONFIG_DMADEVICES=y
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CONFIG_PPC_BESTCOMM=y
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CONFIG_EXT2_FS=y
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CONFIG_EXT3_FS=y
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# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
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@@ -12,7 +12,6 @@ CONFIG_EXPERT=y
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CONFIG_PPC_MPC52xx=y
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CONFIG_PPC_MPC5200_SIMPLE=y
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# CONFIG_PPC_PMAC is not set
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CONFIG_PPC_BESTCOMM=y
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CONFIG_SPARSE_IRQ=y
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CONFIG_PM=y
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# CONFIG_PCI is not set
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@@ -84,6 +83,8 @@ CONFIG_LEDS_TRIGGERS=y
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CONFIG_LEDS_TRIGGER_TIMER=y
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CONFIG_RTC_CLASS=y
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CONFIG_RTC_DRV_DS1307=y
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CONFIG_DMADEVICES=y
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CONFIG_PPC_BESTCOMM=y
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CONFIG_EXT2_FS=y
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CONFIG_EXT3_FS=y
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# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
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@@ -21,7 +21,6 @@ CONFIG_MODULE_UNLOAD=y
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CONFIG_PPC_MPC52xx=y
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CONFIG_PPC_MPC5200_SIMPLE=y
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# CONFIG_PPC_PMAC is not set
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CONFIG_PPC_BESTCOMM=y
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CONFIG_NO_HZ=y
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CONFIG_HIGH_RES_TIMERS=y
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CONFIG_HZ_100=y
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@@ -87,6 +86,8 @@ CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
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CONFIG_USB_STORAGE=m
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CONFIG_RTC_CLASS=y
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CONFIG_RTC_DRV_PCF8563=m
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CONFIG_DMADEVICES=y
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CONFIG_PPC_BESTCOMM=y
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CONFIG_EXT2_FS=m
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CONFIG_EXT3_FS=m
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# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
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@@ -17,7 +17,6 @@ CONFIG_PPC_MPC52xx=y
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CONFIG_PPC_MPC5200_SIMPLE=y
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CONFIG_PPC_MPC5200_BUGFIX=y
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# CONFIG_PPC_PMAC is not set
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CONFIG_PPC_BESTCOMM=y
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CONFIG_PM=y
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# CONFIG_PCI is not set
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CONFIG_NET=y
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@@ -86,6 +85,8 @@ CONFIG_USB_STORAGE=y
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CONFIG_RTC_CLASS=y
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CONFIG_RTC_DRV_DS1307=y
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CONFIG_RTC_DRV_DS1374=y
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CONFIG_DMADEVICES=y
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CONFIG_PPC_BESTCOMM=y
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CONFIG_EXT2_FS=y
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CONFIG_EXT3_FS=y
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# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
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@@ -15,7 +15,6 @@ CONFIG_PPC_MEDIA5200=y
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CONFIG_PPC_MPC5200_BUGFIX=y
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CONFIG_PPC_MPC5200_LPBFIFO=m
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# CONFIG_PPC_PMAC is not set
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CONFIG_PPC_BESTCOMM=y
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CONFIG_SIMPLE_GPIO=y
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CONFIG_NO_HZ=y
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CONFIG_HIGH_RES_TIMERS=y
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@@ -125,6 +124,8 @@ CONFIG_RTC_CLASS=y
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CONFIG_RTC_DRV_DS1307=y
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CONFIG_RTC_DRV_DS1374=y
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CONFIG_RTC_DRV_PCF8563=m
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CONFIG_DMADEVICES=y
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CONFIG_PPC_BESTCOMM=y
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CONFIG_EXT2_FS=y
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CONFIG_EXT3_FS=y
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# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
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@@ -2,7 +2,6 @@ CONFIG_PPC64=y
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CONFIG_ALTIVEC=y
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CONFIG_SMP=y
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CONFIG_NR_CPUS=2
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CONFIG_EXPERIMENTAL=y
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CONFIG_SYSVIPC=y
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CONFIG_NO_HZ=y
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CONFIG_HIGH_RES_TIMERS=y
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@@ -45,8 +44,9 @@ CONFIG_INET_AH=y
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CONFIG_INET_ESP=y
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# CONFIG_IPV6 is not set
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CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
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CONFIG_DEVTMPFS=y
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CONFIG_DEVTMPFS_MOUNT=y
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CONFIG_MTD=y
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CONFIG_MTD_CHAR=y
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CONFIG_MTD_BLOCK=y
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CONFIG_MTD_SLRAM=y
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CONFIG_MTD_PHRAM=y
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@@ -88,7 +88,6 @@ CONFIG_BLK_DEV_DM=y
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CONFIG_DM_CRYPT=y
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CONFIG_NETDEVICES=y
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CONFIG_DUMMY=y
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CONFIG_MII=y
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CONFIG_TIGON3=y
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CONFIG_E1000=y
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CONFIG_PASEMI_MAC=y
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@@ -174,8 +173,8 @@ CONFIG_NLS_CODEPAGE_437=y
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CONFIG_NLS_ISO8859_1=y
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CONFIG_CRC_CCITT=y
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CONFIG_PRINTK_TIME=y
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CONFIG_MAGIC_SYSRQ=y
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CONFIG_DEBUG_FS=y
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CONFIG_MAGIC_SYSRQ=y
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CONFIG_DEBUG_KERNEL=y
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CONFIG_DETECT_HUNG_TASK=y
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# CONFIG_SCHED_DEBUG is not set
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@@ -284,7 +284,7 @@ do_kvm_##n: \
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subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
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beq- 1f; \
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ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
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1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \
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1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \
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blt+ cr1,3f; /* abort if it is */ \
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li r1,(n); /* will be reloaded later */ \
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sth r1,PACA_TRAP_SAVE(r13); \
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@@ -811,13 +811,13 @@ int64_t opal_pci_next_error(uint64_t phb_id, uint64_t *first_frozen_pe,
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int64_t opal_pci_poll(uint64_t phb_id);
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int64_t opal_return_cpu(void);
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int64_t opal_xscom_read(uint32_t gcid, uint32_t pcb_addr, uint64_t *val);
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int64_t opal_xscom_read(uint32_t gcid, uint32_t pcb_addr, __be64 *val);
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int64_t opal_xscom_write(uint32_t gcid, uint32_t pcb_addr, uint64_t val);
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int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
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uint32_t addr, uint32_t data, uint32_t sz);
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int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type,
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uint32_t addr, uint32_t *data, uint32_t sz);
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uint32_t addr, __be32 *data, uint32_t sz);
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int64_t opal_validate_flash(uint64_t buffer, uint32_t *size, uint32_t *result);
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int64_t opal_manage_flash(uint8_t op);
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int64_t opal_update_flash(uint64_t blk_list);
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@@ -84,10 +84,8 @@ static inline void pgtable_free_tlb(struct mmu_gather *tlb,
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static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
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unsigned long address)
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{
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struct page *page = page_address(table);
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tlb_flush_pgtable(tlb, address);
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pgtable_page_dtor(page);
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pgtable_free_tlb(tlb, page, 0);
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pgtable_page_dtor(table);
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pgtable_free_tlb(tlb, page_address(table), 0);
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}
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#endif /* _ASM_POWERPC_PGALLOC_32_H */
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@@ -148,11 +148,9 @@ static inline void pgtable_free_tlb(struct mmu_gather *tlb,
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static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
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unsigned long address)
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{
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struct page *page = page_address(table);
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tlb_flush_pgtable(tlb, address);
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pgtable_page_dtor(page);
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pgtable_free_tlb(tlb, page, 0);
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pgtable_page_dtor(table);
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pgtable_free_tlb(tlb, page_address(table), 0);
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}
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#else /* if CONFIG_PPC_64K_PAGES */
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@@ -4,13 +4,18 @@
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#ifdef __KERNEL__
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/*
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* The PowerPC can do unaligned accesses itself in big endian mode.
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* The PowerPC can do unaligned accesses itself based on its endian mode.
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*/
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#include <linux/unaligned/access_ok.h>
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#include <linux/unaligned/generic.h>
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#ifdef __LITTLE_ENDIAN__
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#define get_unaligned __get_unaligned_le
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#define put_unaligned __put_unaligned_le
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#else
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#define get_unaligned __get_unaligned_be
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#define put_unaligned __put_unaligned_be
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#endif
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_UNALIGNED_H */
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@@ -124,15 +124,15 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
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void crash_free_reserved_phys_range(unsigned long begin, unsigned long end)
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{
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unsigned long addr;
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const u32 *basep, *sizep;
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const __be32 *basep, *sizep;
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unsigned int rtas_start = 0, rtas_end = 0;
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basep = of_get_property(rtas.dev, "linux,rtas-base", NULL);
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sizep = of_get_property(rtas.dev, "rtas-size", NULL);
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if (basep && sizep) {
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rtas_start = *basep;
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rtas_end = *basep + *sizep;
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rtas_start = be32_to_cpup(basep);
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rtas_end = rtas_start + be32_to_cpup(sizep);
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}
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for (addr = begin; addr < end; addr += PAGE_SIZE) {
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@@ -80,6 +80,7 @@ END_FTR_SECTION(0, 1)
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* of the function that the cpu should jump to to continue
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* initialization.
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*/
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.balign 8
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.globl __secondary_hold_spinloop
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__secondary_hold_spinloop:
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.llong 0x0
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@@ -470,6 +471,7 @@ _STATIC(__after_prom_start)
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mtctr r8
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bctr
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.balign 8
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p_end: .llong _end - _stext
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4: /* Now copy the rest of the kernel up to _end */
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@@ -148,7 +148,7 @@ void __init reserve_crashkernel(void)
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* a small SLB (128MB) since the crash kernel needs to place
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* itself and some stacks to be in the first segment.
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*/
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crashk_res.start = min(0x80000000ULL, (ppc64_rma_size / 2));
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crashk_res.start = min(0x8000000ULL, (ppc64_rma_size / 2));
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#else
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crashk_res.start = KDUMP_KERNELBASE;
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#endif
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@@ -252,8 +252,8 @@ _GLOBAL(__bswapdi2)
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or r3,r7,r9
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blr
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#if defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE)
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#ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX
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_GLOBAL(rmci_on)
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sync
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isync
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@@ -283,6 +283,9 @@ _GLOBAL(rmci_off)
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isync
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sync
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blr
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#endif /* CONFIG_PPC_EARLY_DEBUG_BOOTX */
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#if defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE)
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/*
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* Do an IO access in real mode
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@@ -1555,7 +1555,7 @@ long arch_ptrace(struct task_struct *child, long request,
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flush_fp_to_thread(child);
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if (fpidx < (PT_FPSCR - PT_FPR0))
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memcpy(&tmp, &child->thread.fp_state.fpr,
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memcpy(&tmp, &child->thread.TS_FPR(fpidx),
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sizeof(long));
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else
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tmp = child->thread.fp_state.fpscr;
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@@ -1588,7 +1588,7 @@ long arch_ptrace(struct task_struct *child, long request,
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flush_fp_to_thread(child);
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if (fpidx < (PT_FPSCR - PT_FPR0))
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memcpy(&child->thread.fp_state.fpr, &data,
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memcpy(&child->thread.TS_FPR(fpidx), &data,
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sizeof(long));
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else
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child->thread.fp_state.fpscr = data;
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@@ -479,7 +479,7 @@ void __init smp_setup_cpu_maps(void)
|
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if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
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(dn = of_find_node_by_path("/rtas"))) {
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int num_addr_cell, num_size_cell, maxcpus;
|
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const unsigned int *ireg;
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const __be32 *ireg;
|
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num_addr_cell = of_n_addr_cells(dn);
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num_size_cell = of_n_size_cells(dn);
|
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@@ -489,7 +489,7 @@ void __init smp_setup_cpu_maps(void)
|
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if (!ireg)
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||||
goto out;
|
||||
|
||||
maxcpus = ireg[num_addr_cell + num_size_cell];
|
||||
maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
|
||||
|
||||
/* Double maxcpus for processors which have SMT capability */
|
||||
if (cpu_has_feature(CPU_FTR_SMT))
|
||||
|
||||
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