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Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

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* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (71 commits)
  MIPS: Lasat: Fix botched changes to sysctl code.
  RTC: rtc-cmos.c: Fix warning on MIPS
  MIPS: Cleanup random differences beween lmo and Linus' kernel.
  MIPS: No longer hardwire CONFIG_EMBEDDED to y
  MIPS: Fix and enhance built-in kernel command line
  MIPS: eXcite: Remove platform.
  MIPS: Loongson: Cleanups of serial port support
  MIPS: Lemote 2F: Suspend CS5536 MFGPT Timer
  MIPS: Excite: move iodev_remove to .devexit.text
  MIPS: Lasat: Convert to proc_fops / seq_file
  MIPS: Cleanup signal code initialization
  MIPS: Modularize COP2 handling
  MIPS: Move EARLY_PRINTK to Kconfig.debug
  MIPS: Yeeloong 2F: Cleanup reset logic using the new ec_write function
  MIPS: Yeeloong 2F: Add LID open event as the wakeup event
  MIPS: Yeeloong 2F: Add basic EC operations
  MIPS: Move several variables from .bss to .init.data
  MIPS: Tracing: Make function graph tracer work with -mmcount-ra-address
  MIPS: Tracing: Reserve $12(t0) for mcount-ra-address of gcc 4.5
  MIPS: Tracing: Make ftrace for MIPS work without -fno-omit-frame-pointer
  ...
This commit is contained in:
Linus Torvalds
2009-12-17 16:38:06 -08:00
parent 7c508e50be 606d62fa02
commit dbfc985195
255 changed files with 18312 additions and 4880 deletions
Download Patch File Download Diff File Expand all files Collapse all files

119
arch/mips/Kconfig
View File

@@ -5,9 +5,12 @@ config MIPS
select HAVE_IDE
select HAVE_OPROFILE
select HAVE_ARCH_KGDB
# Horrible source of confusion. Die, die, die ...
select EMBEDDED
select RTC_LIB if !LEMOTE_FULOONG2E
select HAVE_FUNCTION_TRACER
select HAVE_FUNCTION_TRACE_MCOUNT_TEST
select HAVE_DYNAMIC_FTRACE
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_FUNCTION_GRAPH_TRACER
select RTC_LIB if !MACH_LOONGSON
mainmenu "Linux/MIPS Kernel Configuration"
@@ -22,6 +25,7 @@ choice
config MACH_ALCHEMY
bool "Alchemy processor based machines"
select SYS_SUPPORTS_ZBOOT
config AR7
bool "Texas Instruments AR7"
@@ -36,6 +40,7 @@ config AR7
select SYS_HAS_EARLY_PRINTK
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_ZBOOT_UART16550
select GENERIC_GPIO
select GCD
select VLYNQ
@@ -43,23 +48,6 @@ config AR7
Support for the Texas Instruments AR7 System-on-a-Chip
family: TNETD7100, 7200 and 7300.
config BASLER_EXCITE
bool "Basler eXcite smart camera"
select CEVT_R4K
select CSRC_R4K
select DMA_COHERENT
select HW_HAS_PCI
select IRQ_CPU
select IRQ_CPU_RM7K
select IRQ_CPU_RM9K
select MIPS_RM9122
select SYS_HAS_CPU_RM9000
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
help
The eXcite is a smart camera platform manufactured by
Basler Vision Technologies AG.
config BCM47XX
bool "BCM47XX based boards"
select CEVT_R4K
@@ -192,6 +180,7 @@ config LASAT
config MACH_LOONGSON
bool "Loongson family of machines"
select SYS_SUPPORTS_ZBOOT_UART16550
help
This enables the support of Loongson family of machines.
@@ -233,6 +222,7 @@ config MIPS_MALTA
select SYS_SUPPORTS_MIPS_CMP
select SYS_SUPPORTS_MULTITHREADING
select SYS_SUPPORTS_SMARTMIPS
select SYS_SUPPORTS_ZBOOT
help
This enables support for the MIPS Technologies Malta evaluation
board.
@@ -334,6 +324,24 @@ config PMC_YOSEMITE
Yosemite is an evaluation board for the RM9000x2 processor
manufactured by PMC-Sierra.
config POWERTV
bool "Cisco PowerTV"
select BOOT_ELF32
select CEVT_R4K
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_IRQ_EI
select CSRC_POWERTV
select DMA_NONCOHERENT
select HW_HAS_PCI
select SYS_HAS_EARLY_PRINTK
select SYS_HAS_CPU_MIPS32_R2
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_HIGHMEM
select USB_OHCI_LITTLE_ENDIAN
help
This enables support for the Cisco PowerTV Platform.
config SGI_IP22
bool "SGI IP22 (Indy/Indigo2)"
select ARC
@@ -674,11 +682,11 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
endchoice
source "arch/mips/alchemy/Kconfig"
source "arch/mips/basler/excite/Kconfig"
source "arch/mips/bcm63xx/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/lasat/Kconfig"
source "arch/mips/pmc-sierra/Kconfig"
source "arch/mips/powertv/Kconfig"
source "arch/mips/sgi-ip27/Kconfig"
source "arch/mips/sibyte/Kconfig"
source "arch/mips/txx9/Kconfig"
@@ -778,6 +786,9 @@ config CSRC_BCM1480
config CSRC_IOASIC
bool
config CSRC_POWERTV
bool
config CSRC_R4K_LIB
bool
@@ -806,20 +817,6 @@ config DMA_NONCOHERENT
config DMA_NEED_PCI_MAP_STATE
bool
config EARLY_PRINTK
bool "Early printk" if EMBEDDED && DEBUG_KERNEL
depends on SYS_HAS_EARLY_PRINTK
default y
help
This option enables special console drivers which allow the kernel
to print messages very early in the bootup process.
This is useful for kernel debugging when your machine crashes very
early before the console code is initialized. For normal operation,
it is not recommended because it looks ugly on some machines and
doesn't cooperate with an X server. You should normally say N here,
unless you want to debug such a crash.
config SYS_HAS_EARLY_PRINTK
bool
@@ -1069,6 +1066,21 @@ config CPU_LOONGSON2E
The Loongson 2E processor implements the MIPS III instruction set
with many extensions.
It has an internal FPGA northbridge, which is compatiable to
bonito64.
config CPU_LOONGSON2F
bool "Loongson 2F"
depends on SYS_HAS_CPU_LOONGSON2F
select CPU_LOONGSON2
help
The Loongson 2F processor implements the MIPS III instruction set
with many extensions.
Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
have a similar programming interface with FPGA northbridge used in
Loongson2E.
config CPU_MIPS32_R1
bool "MIPS32 Release 1"
depends on SYS_HAS_CPU_MIPS32_R1
@@ -1294,6 +1306,16 @@ config CPU_CAVIUM_OCTEON
endchoice
config SYS_SUPPORTS_ZBOOT
bool
select HAVE_KERNEL_GZIP
select HAVE_KERNEL_BZIP2
select HAVE_KERNEL_LZMA
config SYS_SUPPORTS_ZBOOT_UART16550
bool
select SYS_SUPPORTS_ZBOOT
config CPU_LOONGSON2
bool
select CPU_SUPPORTS_32BIT_KERNEL
@@ -1303,6 +1325,12 @@ config CPU_LOONGSON2
config SYS_HAS_CPU_LOONGSON2E
bool
config SYS_HAS_CPU_LOONGSON2F
bool
select CPU_SUPPORTS_CPUFREQ
select CPU_SUPPORTS_ADDRWINCFG if 64BIT
select CPU_SUPPORTS_UNCACHED_ACCELERATED
config SYS_HAS_CPU_MIPS32_R1
bool
@@ -1411,8 +1439,17 @@ config CPU_SUPPORTS_32BIT_KERNEL
bool
config CPU_SUPPORTS_64BIT_KERNEL
bool
config CPU_SUPPORTS_CPUFREQ
bool
config CPU_SUPPORTS_ADDRWINCFG
bool
config CPU_SUPPORTS_HUGEPAGES
bool
config CPU_SUPPORTS_UNCACHED_ACCELERATED
bool
config MIPS_PGD_C0_CONTEXT
bool
default y if 64BIT && CPU_MIPSR2
#
# Set to y for ptrace access to watch registers.
@@ -2024,15 +2061,6 @@ config STACKTRACE_SUPPORT
source "init/Kconfig"
config PROBE_INITRD_HEADER
bool "Probe initrd header created by addinitrd"
depends on BLK_DEV_INITRD
help
Probe initrd header at the last page of kernel image.
Say Y here if you are using arch/mips/boot/addinitrd.c to
add initrd or initramfs image to the kernel image.
Otherwise, say N.
source "kernel/Kconfig.freezer"
menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
@@ -2104,6 +2132,7 @@ config MMU
config I8253
bool
select MIPS_EXTERNAL_TIMER
config ZONE_DMA32
bool
@@ -2180,6 +2209,8 @@ source "kernel/power/Kconfig"
endmenu
source "arch/mips/kernel/cpufreq/Kconfig"
source "net/Kconfig"
source "drivers/Kconfig"

59
arch/mips/Kconfig.debug
View File

@@ -6,15 +6,66 @@ config TRACE_IRQFLAGS_SUPPORT
source "lib/Kconfig.debug"
config EARLY_PRINTK
bool "Early printk" if EMBEDDED
depends on SYS_HAS_EARLY_PRINTK
default y
help
This option enables special console drivers which allow the kernel
to print messages very early in the bootup process.
This is useful for kernel debugging when your machine crashes very
early before the console code is initialized. For normal operation,
it is not recommended because it looks ugly on some machines and
doesn't cooperate with an X server. You should normally say N here,
unless you want to debug such a crash.
config CMDLINE_BOOL
bool "Built-in kernel command line"
default n
help
For most systems, it is firmware or second stage bootloader that
by default specifies the kernel command line options. However,
it might be necessary or advantageous to either override the
default kernel command line or add a few extra options to it.
For such cases, this option allows you to hardcode your own
command line options directly into the kernel. For that, you
should choose 'Y' here, and fill in the extra boot arguments
in CONFIG_CMDLINE.
The built-in options will be concatenated to the default command
line if CMDLINE_OVERRIDE is set to 'N'. Otherwise, the default
command line will be ignored and replaced by the built-in string.
Most MIPS systems will normally expect 'N' here and rely upon
the command line from the firmware or the second-stage bootloader.
config CMDLINE
string "Default kernel command string"
depends on CMDLINE_BOOL
default ""
help
On some platforms, there is currently no way for the boot loader to
pass arguments to the kernel. For these platforms, you can supply
some command-line options at build time by entering them here. In
other cases you can specify kernel args so that you don't have
to set them up in board prom initialization routines.
pass arguments to the kernel. For these platforms, and for the cases
when you want to add some extra options to the command line or ignore
the default command line, you can supply some command-line options at
build time by entering them here. In other cases you can specify
kernel args so that you don't have to set them up in board prom
initialization routines.
For more information, see the CMDLINE_BOOL and CMDLINE_OVERRIDE
options.
config CMDLINE_OVERRIDE
bool "Built-in command line overrides firware arguments"
default n
depends on CMDLINE_BOOL
help
By setting this option to 'Y' you will have your kernel ignore
command line arguments from firmware or second stage bootloader.
Instead, the built-in command line will be used exclusively.
Normally, you will choose 'N' here.
config DEBUG_STACK_USAGE
bool "Enable stack utilization instrumentation"

57
arch/mips/Makefile
View File

@@ -48,7 +48,16 @@ ifneq ($(SUBARCH),$(ARCH))
endif
endif
ifndef CONFIG_FUNCTION_TRACER
cflags-y := -ffunction-sections
endif
ifdef CONFIG_FUNCTION_GRAPH_TRACER
ifndef KBUILD_MCOUNT_RA_ADDRESS
ifeq ($(call cc-option-yn,-mmcount-ra-address), y)
cflags-y += -mmcount-ra-address -DKBUILD_MCOUNT_RA_ADDRESS
endif
endif
endif
cflags-y += $(call cc-option, -mno-check-zero-division)
ifdef CONFIG_32BIT
@@ -69,6 +78,7 @@ endif
all-$(CONFIG_BOOT_ELF32) := $(vmlinux-32)
all-$(CONFIG_BOOT_ELF64) := $(vmlinux-64)
all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlinuz
#
# GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
@@ -124,6 +134,8 @@ cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
cflags-$(CONFIG_CPU_LOONGSON2) += -Wa,--trap
cflags-$(CONFIG_CPU_LOONGSON2E) += \
$(call cc-option,-march=loongson2e,-march=r4600)
cflags-$(CONFIG_CPU_LOONGSON2F) += \
$(call cc-option,-march=loongson2f,-march=r4600)
cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
-Wa,-mips32 -Wa,--trap
@@ -324,6 +336,7 @@ core-$(CONFIG_MACH_LOONGSON) +=arch/mips/loongson/
cflags-$(CONFIG_MACH_LOONGSON) += -I$(srctree)/arch/mips/include/asm/mach-loongson \
-mno-branch-likely
load-$(CONFIG_LEMOTE_FULOONG2E) +=0xffffffff80100000
load-$(CONFIG_LEMOTE_MACH2F) +=0xffffffff80200000
#
# MIPS Malta board
@@ -331,7 +344,7 @@ load-$(CONFIG_LEMOTE_FULOONG2E) +=0xffffffff80100000
core-$(CONFIG_MIPS_MALTA) += arch/mips/mti-malta/
cflags-$(CONFIG_MIPS_MALTA) += -I$(srctree)/arch/mips/include/asm/mach-malta
load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
all-$(CONFIG_MIPS_MALTA) := vmlinux.bin
all-$(CONFIG_MIPS_MALTA) := vmlinuz.bin
#
# MIPS SIM
@@ -355,13 +368,6 @@ core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
cflags-$(CONFIG_PMC_YOSEMITE) += -I$(srctree)/arch/mips/include/asm/mach-yosemite
load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
#
# Basler eXcite
#
core-$(CONFIG_BASLER_EXCITE) += arch/mips/basler/excite/
cflags-$(CONFIG_BASLER_EXCITE) += -I$(srctree)/arch/mips/include/asm/mach-excite
load-$(CONFIG_BASLER_EXCITE) += 0x80100000
#
# LASAT platforms
#
@@ -440,6 +446,13 @@ cflags-$(CONFIG_SOC_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh
core-$(CONFIG_NEC_MARKEINS) += arch/mips/emma/markeins/
load-$(CONFIG_NEC_MARKEINS) += 0xffffffff88100000
#
# Cisco PowerTV Platform
#
core-$(CONFIG_POWERTV) += arch/mips/powertv/
cflags-$(CONFIG_POWERTV) += -I$(srctree)/arch/mips/include/asm/mach-powertv
load-$(CONFIG_POWERTV) += 0xffffffff90800000
#
# SGI IP22 (Indy/Indigo2)
#
@@ -581,7 +594,7 @@ load-$(CONFIG_SNI_RM) += 0xffffffff80600000
else
load-$(CONFIG_SNI_RM) += 0xffffffff80030000
endif
all-$(CONFIG_SNI_RM) := vmlinux.ecoff
all-$(CONFIG_SNI_RM) := vmlinuz.ecoff
#
# Common TXx9
@@ -699,9 +712,23 @@ vmlinux.64: vmlinux
$(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
makezboot =$(Q)$(MAKE) $(build)=arch/mips/boot/compressed \
VMLINUX_LOAD_ADDRESS=$(load-y) 32bit-bfd=$(32bit-bfd) $(1)
all: $(all-y)
vmlinuz: vmlinux FORCE
+@$(call makezboot,$@)
vmlinuz.bin: vmlinux
+@$(call makezboot,$@)
vmlinuz.ecoff: vmlinux
+@$(call makezboot,$@)
vmlinuz.srec: vmlinux
+@$(call makezboot,$@)
vmlinux.bin: $(vmlinux-32)
+@$(call makeboot,$@)
@@ -726,11 +753,13 @@ endif
install:
$(Q)install -D -m 755 vmlinux $(INSTALL_PATH)/vmlinux-$(KERNELRELEASE)
$(Q)install -D -m 755 vmlinuz $(INSTALL_PATH)/vmlinuz-$(KERNELRELEASE)
$(Q)install -D -m 644 .config $(INSTALL_PATH)/config-$(KERNELRELEASE)
$(Q)install -D -m 644 System.map $(INSTALL_PATH)/System.map-$(KERNELRELEASE)
archclean:
@$(MAKE) $(clean)=arch/mips/boot
@$(MAKE) $(clean)=arch/mips/boot/compressed
@$(MAKE) $(clean)=arch/mips/lasat
define archhelp
@@ -738,10 +767,18 @@ define archhelp
echo ' vmlinux.ecoff - ECOFF boot image'
echo ' vmlinux.bin - Raw binary boot image'
echo ' vmlinux.srec - SREC boot image'
echo ' vmlinuz - Compressed boot(zboot) image'
echo ' vmlinuz.ecoff - ECOFF zboot image'
echo ' vmlinuz.bin - Raw binary zboot image'
echo ' vmlinuz.srec - SREC zboot image'
echo
echo ' These will be default as apropriate for a configured platform.'
endef
CLEAN_FILES += vmlinux.32 \
vmlinux.64 \
vmlinux.ecoff
vmlinux.ecoff \
vmlinuz \
vmlinuz.ecoff \
vmlinuz.bin \
vmlinuz.srec

2
arch/mips/ar7/platform.c
View File

@@ -505,7 +505,7 @@ static int __init ar7_register_devices(void)
int res;
u32 *bootcr, val;
#ifdef CONFIG_SERIAL_8250
static struct uart_port uart_port[2];
static struct uart_port uart_port[2] __initdata;
memset(uart_port, 0, sizeof(struct uart_port) * 2);

9
arch/mips/basler/excite/Kconfig
View File

@@ -1,9 +0,0 @@
config BASLER_EXCITE_PROTOTYPE
bool "Support for pre-release units"
depends on BASLER_EXCITE
default n
help
Pre-series (prototype) units are different from later ones in
some ways. Select this option if you have one of these. Please
note that a kernel built with this option selected will not be
able to run on normal units.

8
arch/mips/basler/excite/Makefile
View File

@@ -1,8 +0,0 @@
#
# Makefile for Basler eXcite
#
obj-$(CONFIG_BASLER_EXCITE) += excite_irq.o excite_prom.o excite_setup.o \
excite_device.o excite_procfs.o
obj-m += excite_iodev.o

403
arch/mips/basler/excite/excite_device.c
View File

@@ -1,403 +0,0 @@
/*
* Copyright (C) 2004 by Basler Vision Technologies AG
* Author: Thomas Koeller <thomas.koeller@baslerweb.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/ioport.h>
#include <linux/err.h>
#include <linux/jiffies.h>
#include <linux/sched.h>
#include <asm/types.h>
#include <asm/rm9k-ocd.h>
#include <excite.h>
#include <rm9k_eth.h>
#include <rm9k_wdt.h>
#include <rm9k_xicap.h>
#include <excite_nandflash.h>
#include "excite_iodev.h"
#define RM9K_GE_UNIT 0
#define XICAP_UNIT 0
#define NAND_UNIT 0
#define DLL_TIMEOUT 3 /* seconds */
#define RINIT(__start__, __end__, __name__, __parent__) { \
.name = __name__ "_0", \
.start = (__start__), \
.end = (__end__), \
.flags = 0, \
.parent = (__parent__) \
}
#define RINIT_IRQ(__irq__, __name__) { \
.name = __name__ "_0", \
.start = (__irq__), \
.end = (__irq__), \
.flags = IORESOURCE_IRQ, \
.parent = NULL \
}
enum {
slice_xicap,
slice_eth
};
static struct resource
excite_ctr_resource __maybe_unused = {
.name = "GPI counters",
.start = 0,
.end = 5,
.flags = 0,
.parent = NULL,
.sibling = NULL,
.child = NULL
},
excite_gpislice_resource __maybe_unused = {
.name = "GPI slices",
.start = 0,
.end = 1,
.flags = 0,
.parent = NULL,
.sibling = NULL,
.child = NULL
},
excite_mdio_channel_resource __maybe_unused = {
.name = "MDIO channels",
.start = 0,
.end = 1,
.flags = 0,
.parent = NULL,
.sibling = NULL,
.child = NULL
},
excite_fifomem_resource __maybe_unused = {
.name = "FIFO memory",
.start = 0,
.end = 767,
.flags = 0,
.parent = NULL,
.sibling = NULL,
.child = NULL
},
excite_scram_resource __maybe_unused = {
.name = "Scratch RAM",
.start = EXCITE_PHYS_SCRAM,
.end = EXCITE_PHYS_SCRAM + EXCITE_SIZE_SCRAM - 1,
.flags = IORESOURCE_MEM,
.parent = NULL,
.sibling = NULL,
.child = NULL
},
excite_fpga_resource __maybe_unused = {
.name = "System FPGA",
.start = EXCITE_PHYS_FPGA,
.end = EXCITE_PHYS_FPGA + EXCITE_SIZE_FPGA - 1,
.flags = IORESOURCE_MEM,
.parent = NULL,
.sibling = NULL,
.child = NULL
},
excite_nand_resource __maybe_unused = {
.name = "NAND flash control",
.start = EXCITE_PHYS_NAND,
.end = EXCITE_PHYS_NAND + EXCITE_SIZE_NAND - 1,
.flags = IORESOURCE_MEM,
.parent = NULL,
.sibling = NULL,
.child = NULL
},
excite_titan_resource __maybe_unused = {
.name = "TITAN registers",
.start = EXCITE_PHYS_TITAN,
.end = EXCITE_PHYS_TITAN + EXCITE_SIZE_TITAN - 1,
.flags = IORESOURCE_MEM,
.parent = NULL,
.sibling = NULL,
.child = NULL
};
static void adjust_resources(struct resource *res, unsigned int n)
{
struct resource *p;
const unsigned long mask = IORESOURCE_IO | IORESOURCE_MEM
| IORESOURCE_IRQ | IORESOURCE_DMA;
for (p = res; p < res + n; p++) {
const struct resource * const parent = p->parent;
if (parent) {
p->start += parent->start;
p->end += parent->start;
p->flags = parent->flags & mask;
}
}
}
#if defined(CONFIG_EXCITE_FCAP_GPI) || defined(CONFIG_EXCITE_FCAP_GPI_MODULE)
static struct resource xicap_rsrc[] = {
RINIT(0x4840, 0x486f, XICAP_RESOURCE_FIFO_RX, &excite_titan_resource),
RINIT(0x4940, 0x494b, XICAP_RESOURCE_FIFO_TX, &excite_titan_resource),
RINIT(0x5040, 0x5127, XICAP_RESOURCE_XDMA, &excite_titan_resource),
RINIT(0x1000, 0x112f, XICAP_RESOURCE_PKTPROC, &excite_titan_resource),
RINIT(0x1100, 0x110f, XICAP_RESOURCE_PKT_STREAM, &excite_fpga_resource),
RINIT(0x0800, 0x0bff, XICAP_RESOURCE_DMADESC, &excite_scram_resource),
RINIT(slice_xicap, slice_xicap, XICAP_RESOURCE_GPI_SLICE, &excite_gpislice_resource),
RINIT(0x0100, 0x02ff, XICAP_RESOURCE_FIFO_BLK, &excite_fifomem_resource),
RINIT_IRQ(TITAN_IRQ, XICAP_RESOURCE_IRQ)
};
static struct platform_device xicap_pdev = {
.name = XICAP_NAME,
.id = XICAP_UNIT,
.num_resources = ARRAY_SIZE(xicap_rsrc),
.resource = xicap_rsrc
};
/*
* Create a platform device for the GPI port that receives the
* image data from the embedded camera.
*/
static int __init xicap_devinit(void)
{
unsigned long tend;
u32 reg;
int retval;
adjust_resources(xicap_rsrc, ARRAY_SIZE(xicap_rsrc));
/* Power up the slice and configure it. */
reg = titan_readl(CPTC1R);
reg &= ~(0x11100 << slice_xicap);
titan_writel(reg, CPTC1R);
/* Enable slice & DLL. */
reg= titan_readl(CPRR);
reg &= ~(0x00030003 << (slice_xicap * 2));
titan_writel(reg, CPRR);
/* Wait for DLLs to lock */
tend = jiffies + DLL_TIMEOUT * HZ;
while (time_before(jiffies, tend)) {
if (!(~titan_readl(CPDSR) & (0x1 << (slice_xicap * 4))))
break;
yield();
}
if (~titan_readl(CPDSR) & (0x1 << (slice_xicap * 4))) {
printk(KERN_ERR "%s: DLL not locked after %u seconds\n",
xicap_pdev.name, DLL_TIMEOUT);
retval = -ETIME;
} else {
/* Register platform device */
retval = platform_device_register(&xicap_pdev);
}
return retval;
}
device_initcall(xicap_devinit);
#endif /* defined(CONFIG_EXCITE_FCAP_GPI) || defined(CONFIG_EXCITE_FCAP_GPI_MODULE) */
#if defined(CONFIG_WDT_RM9K_GPI) || defined(CONFIG_WDT_RM9K_GPI_MODULE)
static struct resource wdt_rsrc[] = {
RINIT(0, 0, WDT_RESOURCE_COUNTER, &excite_ctr_resource),
RINIT(0x0084, 0x008f, WDT_RESOURCE_REGS, &excite_titan_resource),
RINIT_IRQ(TITAN_IRQ, WDT_RESOURCE_IRQ)
};
static struct platform_device wdt_pdev = {
.name = WDT_NAME,
.id = -1,
.num_resources = ARRAY_SIZE(wdt_rsrc),
.resource = wdt_rsrc
};
/*
* Create a platform device for the GPI port that receives the
* image data from the embedded camera.
*/
static int __init wdt_devinit(void)
{
adjust_resources(wdt_rsrc, ARRAY_SIZE(wdt_rsrc));
return platform_device_register(&wdt_pdev);
}
device_initcall(wdt_devinit);
#endif /* defined(CONFIG_WDT_RM9K_GPI) || defined(CONFIG_WDT_RM9K_GPI_MODULE) */
static struct resource excite_nandflash_rsrc[] = {
RINIT(0x2000, 0x201f, EXCITE_NANDFLASH_RESOURCE_REGS, &excite_nand_resource)
};
static struct platform_device excite_nandflash_pdev = {
.name = "excite_nand",
.id = NAND_UNIT,
.num_resources = ARRAY_SIZE(excite_nandflash_rsrc),
.resource = excite_nandflash_rsrc
};
/*
* Create a platform device for the access to the nand-flash
* port
*/
static int __init excite_nandflash_devinit(void)
{
adjust_resources(excite_nandflash_rsrc, ARRAY_SIZE(excite_nandflash_rsrc));
/* nothing to be done here */
/* Register platform device */
return platform_device_register(&excite_nandflash_pdev);
}
device_initcall(excite_nandflash_devinit);
static struct resource iodev_rsrc[] = {
RINIT_IRQ(FPGA1_IRQ, IODEV_RESOURCE_IRQ)
};
static struct platform_device io_pdev = {
.name = IODEV_NAME,
.id = -1,
.num_resources = ARRAY_SIZE(iodev_rsrc),
.resource = iodev_rsrc
};
/*
* Create a platform device for the external I/O ports.
*/
static int __init io_devinit(void)
{
adjust_resources(iodev_rsrc, ARRAY_SIZE(iodev_rsrc));
return platform_device_register(&io_pdev);
}
device_initcall(io_devinit);
#if defined(CONFIG_RM9K_GE) || defined(CONFIG_RM9K_GE_MODULE)
static struct resource rm9k_ge_rsrc[] = {
RINIT(0x2200, 0x27ff, RM9K_GE_RESOURCE_MAC, &excite_titan_resource),
RINIT(0x1800, 0x1fff, RM9K_GE_RESOURCE_MSTAT, &excite_titan_resource),
RINIT(0x2000, 0x212f, RM9K_GE_RESOURCE_PKTPROC, &excite_titan_resource),
RINIT(0x5140, 0x5227, RM9K_GE_RESOURCE_XDMA, &excite_titan_resource),
RINIT(0x4870, 0x489f, RM9K_GE_RESOURCE_FIFO_RX, &excite_titan_resource),
RINIT(0x494c, 0x4957, RM9K_GE_RESOURCE_FIFO_TX, &excite_titan_resource),
RINIT(0x0000, 0x007f, RM9K_GE_RESOURCE_FIFOMEM_RX, &excite_fifomem_resource),
RINIT(0x0080, 0x00ff, RM9K_GE_RESOURCE_FIFOMEM_TX, &excite_fifomem_resource),
RINIT(0x0180, 0x019f, RM9K_GE_RESOURCE_PHY, &excite_titan_resource),
RINIT(0x0000, 0x03ff, RM9K_GE_RESOURCE_DMADESC_RX, &excite_scram_resource),
RINIT(0x0400, 0x07ff, RM9K_GE_RESOURCE_DMADESC_TX, &excite_scram_resource),
RINIT(slice_eth, slice_eth, RM9K_GE_RESOURCE_GPI_SLICE, &excite_gpislice_resource),
RINIT(0, 0, RM9K_GE_RESOURCE_MDIO_CHANNEL, &excite_mdio_channel_resource),
RINIT_IRQ(TITAN_IRQ, RM9K_GE_RESOURCE_IRQ_MAIN),
RINIT_IRQ(PHY_IRQ, RM9K_GE_RESOURCE_IRQ_PHY)
};
static struct platform_device rm9k_ge_pdev = {
.name = RM9K_GE_NAME,
.id = RM9K_GE_UNIT,
.num_resources = ARRAY_SIZE(rm9k_ge_rsrc),
.resource = rm9k_ge_rsrc
};
/*
* Create a platform device for the Ethernet port.
*/
static int __init rm9k_ge_devinit(void)
{
u32 reg;
adjust_resources(rm9k_ge_rsrc, ARRAY_SIZE(rm9k_ge_rsrc));
/* Power up the slice and configure it. */
reg = titan_readl(CPTC1R);
reg &= ~(0x11000 << slice_eth);
reg |= 0x100 << slice_eth;
titan_writel(reg, CPTC1R);
/* Take the MAC out of reset, reset the DLLs. */
reg = titan_readl(CPRR);
reg &= ~(0x00030000 << (slice_eth * 2));
reg |= 0x3 << (slice_eth * 2);
titan_writel(reg, CPRR);
return platform_device_register(&rm9k_ge_pdev);
}
device_initcall(rm9k_ge_devinit);
#endif /* defined(CONFIG_RM9K_GE) || defined(CONFIG_RM9K_GE_MODULE) */
static int __init excite_setup_devs(void)
{
int res;
u32 reg;
/* Enable xdma and fifo interrupts */
reg = titan_readl(0x0050);
titan_writel(reg | 0x18000000, 0x0050);
res = request_resource(&iomem_resource, &excite_titan_resource);
if (res)
return res;
res = request_resource(&iomem_resource, &excite_scram_resource);
if (res)
return res;
res = request_resource(&iomem_resource, &excite_fpga_resource);
if (res)
return res;
res = request_resource(&iomem_resource, &excite_nand_resource);
if (res)
return res;
excite_fpga_resource.flags = excite_fpga_resource.parent->flags &
( IORESOURCE_IO | IORESOURCE_MEM
| IORESOURCE_IRQ | IORESOURCE_DMA);
excite_nand_resource.flags = excite_nand_resource.parent->flags &
( IORESOURCE_IO | IORESOURCE_MEM
| IORESOURCE_IRQ | IORESOURCE_DMA);
return 0;
}
arch_initcall(excite_setup_devs);

178
arch/mips/basler/excite/excite_iodev.c
View File

@@ -1,178 +0,0 @@
/*
* Copyright (C) 2005 by Basler Vision Technologies AG
* Author: Thomas Koeller <thomas.koeller@baslerweb.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/compiler.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/wait.h>
#include <linux/poll.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/miscdevice.h>
#include <linux/smp_lock.h>
#include "excite_iodev.h"
static const struct resource *iodev_get_resource(struct platform_device *, const char *, unsigned int);
static int __init iodev_probe(struct platform_device *);
static int __exit iodev_remove(struct platform_device *);
static int iodev_open(struct inode *, struct file *);
static int iodev_release(struct inode *, struct file *);
static ssize_t iodev_read(struct file *, char __user *, size_t s, loff_t *);
static unsigned int iodev_poll(struct file *, struct poll_table_struct *);
static irqreturn_t iodev_irqhdl(int, void *);
static const char iodev_name[] = "iodev";
static unsigned int iodev_irq;
static DECLARE_WAIT_QUEUE_HEAD(wq);
static const struct file_operations fops =
{
.owner = THIS_MODULE,
.open = iodev_open,
.release = iodev_release,
.read = iodev_read,
.poll = iodev_poll
};
static struct miscdevice miscdev =
{
.minor = MISC_DYNAMIC_MINOR,
.name = iodev_name,
.fops = &fops
};
static struct platform_driver iodev_driver = {
.driver = {
.name = iodev_name,
.owner = THIS_MODULE,
},
.probe = iodev_probe,
.remove = __devexit_p(iodev_remove),
};
static const struct resource *
iodev_get_resource(struct platform_device *pdv, const char *name,
unsigned int type)
{
char buf[80];
if (snprintf(buf, sizeof buf, "%s_0", name) >= sizeof buf)
return NULL;
return platform_get_resource_byname(pdv, type, buf);
}
/* No hotplugging on the platform bus - use __init */
static int __init iodev_probe(struct platform_device *dev)
{
const struct resource * const ri =
iodev_get_resource(dev, IODEV_RESOURCE_IRQ, IORESOURCE_IRQ);
if (unlikely(!ri))
return -ENXIO;
iodev_irq = ri->start;
return misc_register(&miscdev);
}
static int __exit iodev_remove(struct platform_device *dev)
{
return misc_deregister(&miscdev);
}
static int iodev_open(struct inode *i, struct file *f)
{
int ret;
ret = request_irq(iodev_irq, iodev_irqhdl, IRQF_DISABLED,
iodev_name, &miscdev);
return ret;
}
static int iodev_release(struct inode *i, struct file *f)
{
free_irq(iodev_irq, &miscdev);
return 0;
}
static ssize_t
iodev_read(struct file *f, char __user *d, size_t s, loff_t *o)
{
ssize_t ret;
DEFINE_WAIT(w);
prepare_to_wait(&wq, &w, TASK_INTERRUPTIBLE);
if (!signal_pending(current))
schedule();
ret = signal_pending(current) ? -ERESTARTSYS : 0;
finish_wait(&wq, &w);
return ret;
}
static unsigned int iodev_poll(struct file *f, struct poll_table_struct *p)
{
poll_wait(f, &wq, p);
return POLLOUT | POLLWRNORM;
}
static irqreturn_t iodev_irqhdl(int irq, void *ctxt)
{
wake_up(&wq);
return IRQ_HANDLED;
}
static int __init iodev_init_module(void)
{
return platform_driver_register(&iodev_driver);
}
static void __exit iodev_cleanup_module(void)
{
platform_driver_unregister(&iodev_driver);
}
module_init(iodev_init_module);
module_exit(iodev_cleanup_module);
MODULE_AUTHOR("Thomas Koeller <thomas.koeller@baslerweb.com>");
MODULE_DESCRIPTION("Basler eXcite i/o interrupt handler");
MODULE_VERSION("0.0");
MODULE_LICENSE("GPL");

10
arch/mips/basler/excite/excite_iodev.h
View File

@@ -1,10 +0,0 @@
#ifndef __EXCITE_IODEV_H__
#define __EXCITE_IODEV_H__
/* Device name */
#define IODEV_NAME "iodev"
/* Resource names */
#define IODEV_RESOURCE_IRQ "excite_iodev_irq"
#endif /* __EXCITE_IODEV_H__ */

122
arch/mips/basler/excite/excite_irq.c
View File

@@ -1,122 +0,0 @@
/*
* Copyright (C) by Basler Vision Technologies AG
* Author: Thomas Koeller <thomas.koeller@baslereb.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/module.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/bitops.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/rm9k-ocd.h>
#include <excite.h>
extern asmlinkage void excite_handle_int(void);
/*
* Initialize the interrupt handler
*/
void __init arch_init_irq(void)
{
mips_cpu_irq_init();
rm7k_cpu_irq_init();
rm9k_cpu_irq_init();
}
asmlinkage void plat_irq_dispatch(void)
{
const u32
interrupts = read_c0_cause() >> 8,
mask = ((read_c0_status() >> 8) & 0x000000ff) |
(read_c0_intcontrol() & 0x0000ff00),
pending = interrupts & mask;
u32 msgintflags, msgintmask, msgint;
/* process timer interrupt */
if (pending & (1 << TIMER_IRQ)) {
do_IRQ(TIMER_IRQ);
return;
}
/* Process PCI interrupts */
#if USB_IRQ < 10
msgintflags = ocd_readl(INTP0Status0 + (USB_MSGINT / 0x20 * 0x10));
msgintmask = ocd_readl(INTP0Mask0 + (USB_MSGINT / 0x20 * 0x10));
msgint = msgintflags & msgintmask & (0x1 << (USB_MSGINT % 0x20));
if ((pending & (1 << USB_IRQ)) && msgint) {
#else
if (pending & (1 << USB_IRQ)) {
#endif
do_IRQ(USB_IRQ);
return;
}
/* Process TITAN interrupts */
msgintflags = ocd_readl(INTP0Status0 + (TITAN_MSGINT / 0x20 * 0x10));
msgintmask = ocd_readl(INTP0Mask0 + (TITAN_MSGINT / 0x20 * 0x10));
msgint = msgintflags & msgintmask & (0x1 << (TITAN_MSGINT % 0x20));
if ((pending & (1 << TITAN_IRQ)) && msgint) {
ocd_writel(msgint, INTP0Clear0 + (TITAN_MSGINT / 0x20 * 0x10));
do_IRQ(TITAN_IRQ);
return;
}
/* Process FPGA line #0 interrupts */
msgintflags = ocd_readl(INTP0Status0 + (FPGA0_MSGINT / 0x20 * 0x10));
msgintmask = ocd_readl(INTP0Mask0 + (FPGA0_MSGINT / 0x20 * 0x10));
msgint = msgintflags & msgintmask & (0x1 << (FPGA0_MSGINT % 0x20));
if ((pending & (1 << FPGA0_IRQ)) && msgint) {
do_IRQ(FPGA0_IRQ);
return;
}
/* Process FPGA line #1 interrupts */
msgintflags = ocd_readl(INTP0Status0 + (FPGA1_MSGINT / 0x20 * 0x10));
msgintmask = ocd_readl(INTP0Mask0 + (FPGA1_MSGINT / 0x20 * 0x10));
msgint = msgintflags & msgintmask & (0x1 << (FPGA1_MSGINT % 0x20));
if ((pending & (1 << FPGA1_IRQ)) && msgint) {
do_IRQ(FPGA1_IRQ);
return;
}
/* Process PHY interrupts */
msgintflags = ocd_readl(INTP0Status0 + (PHY_MSGINT / 0x20 * 0x10));
msgintmask = ocd_readl(INTP0Mask0 + (PHY_MSGINT / 0x20 * 0x10));
msgint = msgintflags & msgintmask & (0x1 << (PHY_MSGINT % 0x20));
if ((pending & (1 << PHY_IRQ)) && msgint) {
do_IRQ(PHY_IRQ);
return;
}
/* Process spurious interrupts */
spurious_interrupt();
}

92
arch/mips/basler/excite/excite_procfs.c
View File

@@ -1,92 +0,0 @@
/*
* Copyright (C) 2004, 2005 by Basler Vision Technologies AG
* Author: Thomas Koeller <thomas.koeller@baslerweb.com>
*
* Procfs support for Basler eXcite
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/module.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/stat.h>
#include <asm/page.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/rm9k-ocd.h>
#include <excite.h>
static int excite_unit_id_proc_show(struct seq_file *m, void *v)
{
seq_printf(m, "%06x", unit_id);
return 0;
}
static int excite_unit_id_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, excite_unit_id_proc_show, NULL);
}
static const struct file_operations excite_unit_id_proc_fops = {
.owner = THIS_MODULE,
.open = excite_unit_id_proc_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static int
excite_bootrom_read(char *page, char **start, off_t off, int count,
int *eof, void *data)
{
void __iomem * src;
if (off >= EXCITE_SIZE_BOOTROM) {
*eof = 1;
return 0;
}
if ((off + count) > EXCITE_SIZE_BOOTROM)
count = EXCITE_SIZE_BOOTROM - off;
src = ioremap(EXCITE_PHYS_BOOTROM + off, count);
if (src) {
memcpy_fromio(page, src, count);
iounmap(src);
*start = page;
} else {
count = -ENOMEM;
}
return count;
}
void excite_procfs_init(void)
{
/* Create & populate /proc/excite */
struct proc_dir_entry * const pdir = proc_mkdir("excite", NULL);
if (pdir) {
struct proc_dir_entry * e;
e = proc_create("unit_id", S_IRUGO, pdir,
&excite_unit_id_proc_fops);
if (e) e->size = 6;
e = create_proc_read_entry("bootrom", S_IRUGO, pdir,
excite_bootrom_read, NULL);
if (e) e->size = EXCITE_SIZE_BOOTROM;
}
}

144
arch/mips/basler/excite/excite_prom.c
View File

@@ -1,144 +0,0 @@
/*
* Copyright (C) 2004, 2005 by Thomas Koeller (thomas.koeller@baslerweb.com)
* Based on the PMC-Sierra Yosemite board support by Ralf Baechle and
* Manish Lachwani.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/delay.h>
#include <linux/smp.h>
#include <linux/module.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/reboot.h>
#include <asm/system.h>
#include <asm/bootinfo.h>
#include <asm/string.h>
#include <excite.h>
/* This struct is used by Redboot to pass arguments to the kernel */
typedef struct
{
char *name;
char *val;
} t_env_var;
struct parmblock {
t_env_var memsize;
t_env_var modetty0;
t_env_var ethaddr;
t_env_var env_end;
char *argv[2];
char text[0];
};
static unsigned int prom_argc;
static const char ** prom_argv;
static const t_env_var * prom_env;
static void prom_halt(void) __attribute__((noreturn));
static void prom_exit(void) __attribute__((noreturn));
const char *get_system_type(void)
{
return "Basler eXcite";
}
/*
* Halt the system
*/
static void prom_halt(void)
{
printk(KERN_NOTICE "\n** System halted.\n");
while (1)
asm volatile (
"\t.set\tmips3\n"
"\twait\n"
"\t.set\tmips0\n"
);
}
/*
* Reset the CPU and re-enter Redboot
*/
static void prom_exit(void)
{
unsigned int i;
volatile unsigned char * const flg =
(volatile unsigned char *) (EXCITE_ADDR_FPGA + EXCITE_FPGA_DPR);
/* Clear the watchdog reset flag, set the reboot flag */
*flg &= ~0x01;
*flg |= 0x80;
for (i = 0; i < 10; i++) {
*(volatile unsigned char *) (EXCITE_ADDR_FPGA + EXCITE_FPGA_SYSCTL) = 0x02;
iob();
mdelay(1000);
}
printk(KERN_NOTICE "Reset failed\n");
prom_halt();
}
static const char __init *prom_getenv(char *name)
{
const t_env_var * p;
for (p = prom_env; p->name != NULL; p++)
if(strcmp(name, p->name) == 0)
break;
return p->val;
}
/*
* Init routine which accepts the variables from Redboot
*/
void __init prom_init(void)
{
const struct parmblock * const pb = (struct parmblock *) fw_arg2;
prom_argc = fw_arg0;
prom_argv = (const char **) fw_arg1;
prom_env = &pb->memsize;
/* Callbacks for halt, restart */
_machine_restart = (void (*)(char *)) prom_exit;
_machine_halt = prom_halt;
#ifdef CONFIG_32BIT
/* copy command line */
strcpy(arcs_cmdline, prom_argv[1]);
memsize = simple_strtol(prom_getenv("memsize"), NULL, 16);
strcpy(modetty, prom_getenv("modetty0"));
#endif /* CONFIG_32BIT */
#ifdef CONFIG_64BIT
# error 64 bit support not implemented
#endif /* CONFIG_64BIT */
}
/* This is called from free_initmem(), so we need to provide it */
void __init prom_free_prom_memory(void)
{
/* Nothing to do */
}

302
arch/mips/basler/excite/excite_setup.c
View File

@@ -1,302 +0,0 @@
/*
* Copyright (C) 2004, 2005 by Basler Vision Technologies AG
* Author: Thomas Koeller <thomas.koeller@baslerweb.com>
* Based on the PMC-Sierra Yosemite board support by Ralf Baechle and
* Manish Lachwani.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/tty.h>
#include <linux/serial_core.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
#include <linux/ioport.h>
#include <linux/spinlock.h>
#include <asm/bootinfo.h>
#include <asm/mipsregs.h>
#include <asm/pgtable-32.h>
#include <asm/io.h>
#include <asm/time.h>
#include <asm/rm9k-ocd.h>
#include <excite.h>
#define TITAN_UART_CLK 25000000
#if 1
/* normal serial port assignment */
#define REGBASE_SER0 0x0208
#define REGBASE_SER1 0x0238
#define MASK_SER0 0x1
#define MASK_SER1 0x2
#else
/* serial ports swapped */
#define REGBASE_SER0 0x0238
#define REGBASE_SER1 0x0208
#define MASK_SER0 0x2
#define MASK_SER1 0x1
#endif
unsigned long memsize;
char modetty[30];
unsigned int titan_irq = TITAN_IRQ;
static void __iomem * ctl_regs;
u32 unit_id;
volatile void __iomem * const ocd_base = (void *) (EXCITE_ADDR_OCD);
volatile void __iomem * const titan_base = (void *) (EXCITE_ADDR_TITAN);
/* Protect access to shared GPI registers */
DEFINE_SPINLOCK(titan_lock);
int titan_irqflags;
/*
* The eXcite platform uses the alternate timer interrupt
*
* Fixme: At the time of this writing cevt-r4k.c doesn't yet know about how
* to handle the alternate timer interrupt of the RM9000.
*/
void __init plat_time_init(void)
{
const u32 modebit5 = ocd_readl(0x00e4);
unsigned int mult = ((modebit5 >> 11) & 0x1f) + 2;
unsigned int div = ((modebit5 >> 16) & 0x1f) + 2;
if (div == 33)
div = 1;
mips_hpt_frequency = EXCITE_CPU_EXT_CLOCK * mult / div / 2;
}
static int __init excite_init_console(void)
{
#if defined(CONFIG_SERIAL_8250)
static __initdata char serr[] =
KERN_ERR "Serial port #%u setup failed\n";
struct uart_port up;
/* Take the DUART out of reset */
titan_writel(0x00ff1cff, CPRR);
#if (CONFIG_SERIAL_8250_NR_UARTS > 1)
/* Enable both ports */
titan_writel(MASK_SER0 | MASK_SER1, UACFG);
#else
/* Enable port #0 only */
titan_writel(MASK_SER0, UACFG);
#endif
/*
* Set up serial port #0. Do not use autodetection; the result is
* not what we want.
*/
memset(&up, 0, sizeof(up));
up.membase = (char *) titan_addr(REGBASE_SER0);
up.irq = TITAN_IRQ;
up.uartclk = TITAN_UART_CLK;
up.regshift = 0;
up.iotype = UPIO_RM9000;
up.type = PORT_RM9000;
up.flags = UPF_SHARE_IRQ;
up.line = 0;
if (early_serial_setup(&up))
printk(serr, up.line);
#if CONFIG_SERIAL_8250_NR_UARTS > 1
/* And now for port #1. */
up.membase = (char *) titan_addr(REGBASE_SER1);
up.line = 1;
if (early_serial_setup(&up))
printk(serr, up.line);
#endif /* CONFIG_SERIAL_8250_NR_UARTS > 1 */
#else
/* Leave the DUART in reset */
titan_writel(0x00ff3cff, CPRR);
#endif /* defined(CONFIG_SERIAL_8250) */
return 0;
}
static int __init excite_platform_init(void)
{
unsigned int i;
unsigned char buf[3];
u8 reg;
void __iomem * dpr;
/* BIU buffer allocations */
ocd_writel(8, CPURSLMT); /* CPU */
titan_writel(4, CPGRWL); /* GPI / Ethernet */
/* Map control registers located in FPGA */
ctl_regs = ioremap_nocache(EXCITE_PHYS_FPGA + EXCITE_FPGA_SYSCTL, 16);
if (!ctl_regs)
panic("eXcite: failed to map platform control registers\n");
memcpy_fromio(buf, ctl_regs + 2, ARRAY_SIZE(buf));
unit_id = buf[0] | (buf[1] << 8) | (buf[2] << 16);
/* Clear the reboot flag */
dpr = ioremap_nocache(EXCITE_PHYS_FPGA + EXCITE_FPGA_DPR, 1);
reg = __raw_readb(dpr);
__raw_writeb(reg & 0x7f, dpr);
iounmap(dpr);
/* Interrupt controller setup */
for (i = INTP0Status0; i < INTP0Status0 + 0x80; i += 0x10) {
ocd_writel(0x00000000, i + 0x04);
ocd_writel(0xffffffff, i + 0x0c);
}
ocd_writel(0x2, NMICONFIG);
ocd_writel(0x1 << (TITAN_MSGINT % 0x20),
INTP0Mask0 + (0x10 * (TITAN_MSGINT / 0x20)));
ocd_writel((0x1 << (FPGA0_MSGINT % 0x20))
| ocd_readl(INTP0Mask0 + (0x10 * (FPGA0_MSGINT / 0x20))),
INTP0Mask0 + (0x10 * (FPGA0_MSGINT / 0x20)));
ocd_writel((0x1 << (FPGA1_MSGINT % 0x20))
| ocd_readl(INTP0Mask0 + (0x10 * (FPGA1_MSGINT / 0x20))),
INTP0Mask0 + (0x10 * (FPGA1_MSGINT / 0x20)));
ocd_writel((0x1 << (PHY_MSGINT % 0x20))
| ocd_readl(INTP0Mask0 + (0x10 * (PHY_MSGINT / 0x20))),
INTP0Mask0 + (0x10 * (PHY_MSGINT / 0x20)));
#if USB_IRQ < 10
ocd_writel((0x1 << (USB_MSGINT % 0x20))
| ocd_readl(INTP0Mask0 + (0x10 * (USB_MSGINT / 0x20))),
INTP0Mask0 + (0x10 * (USB_MSGINT / 0x20)));
#endif
/* Enable the packet FIFO, XDMA and XDMA arbiter */
titan_writel(0x00ff18ff, CPRR);
/*
* Set up the PADMUX. Power down all ethernet slices,
* they will be powered up and configured at device startup.
*/
titan_writel(0x00878206, CPTC1R);
titan_writel(0x00001100, CPTC0R); /* latch PADMUX, enable WCIMODE */
/* Reset and enable the FIFO block */
titan_writel(0x00000001, SDRXFCIE);
titan_writel(0x00000001, SDTXFCIE);
titan_writel(0x00000100, SDRXFCIE);
titan_writel(0x00000000, SDTXFCIE);
/*
* Initialize the common interrupt shared by all components of
* the GPI/Ethernet subsystem.
*/
titan_writel((EXCITE_PHYS_OCD >> 12), CPCFG0);
titan_writel(TITAN_MSGINT, CPCFG1);
/*
* XDMA configuration.
* In order for the XDMA to be sharable among multiple drivers,
* the setup must be done here in the platform. The reason is that
* this setup can only be done while the XDMA is in reset. If this
* were done in a driver, it would interrupt all other drivers
* using the XDMA.
*/
titan_writel(0x80021dff, GXCFG); /* XDMA reset */
titan_writel(0x00000000, CPXCISRA);
titan_writel(0x00000000, CPXCISRB); /* clear pending interrupts */
#if defined(CONFIG_HIGHMEM)
# error change for HIGHMEM support!
#else
titan_writel(0x00000000, GXDMADRPFX); /* buffer address prefix */
#endif
titan_writel(0, GXDMA_DESCADR);
for (i = 0x5040; i <= 0x5300; i += 0x0040)
titan_writel(0x80080000, i); /* reset channel */
titan_writel((0x1 << 29) /* no sparse tx descr. */
| (0x1 << 28) /* no sparse rx descr. */
| (0x1 << 23) | (0x1 << 24) /* descriptor coherency */
| (0x1 << 21) | (0x1 << 22) /* data coherency */
| (0x1 << 17)
| 0x1dff,
GXCFG);
#if defined(CONFIG_SMP)
# error No SMP support
#else
/* All interrupts go to core #0 only. */
titan_writel(0x1f007fff, CPDST0A);
titan_writel(0x00000000, CPDST0B);
titan_writel(0x0000ff3f, CPDST1A);
titan_writel(0x00000000, CPDST1B);
titan_writel(0x00ffffff, CPXDSTA);
titan_writel(0x00000000, CPXDSTB);
#endif
/* Enable DUART interrupts, disable everything else. */
titan_writel(0x04000000, CPGIG0ER);
titan_writel(0x000000c0, CPGIG1ER);
excite_procfs_init();
return 0;
}
void __init plat_mem_setup(void)
{
volatile u32 * const boot_ocd_base = (u32 *) 0xbf7fc000;
/* Announce RAM to system */
add_memory_region(0x00000000, memsize, BOOT_MEM_RAM);
/* Set up the peripheral address map */
*(boot_ocd_base + (LKB9 / sizeof(u32))) = 0;
*(boot_ocd_base + (LKB10 / sizeof(u32))) = 0;
*(boot_ocd_base + (LKB11 / sizeof(u32))) = 0;
*(boot_ocd_base + (LKB12 / sizeof(u32))) = 0;
wmb();
*(boot_ocd_base + (LKB0 / sizeof(u32))) = EXCITE_PHYS_OCD >> 4;
wmb();
ocd_writel((EXCITE_PHYS_TITAN >> 4) | 0x1UL, LKB5);
ocd_writel(((EXCITE_SIZE_TITAN >> 4) & 0x7fffff00) - 0x100, LKM5);
ocd_writel((EXCITE_PHYS_SCRAM >> 4) | 0x1UL, LKB13);
ocd_writel(((EXCITE_SIZE_SCRAM >> 4) & 0xffffff00) - 0x100, LKM13);
/* Local bus slot #0 */
ocd_writel(0x00040510, LDP0);
ocd_writel((EXCITE_PHYS_BOOTROM >> 4) | 0x1UL, LKB9);
ocd_writel(((EXCITE_SIZE_BOOTROM >> 4) & 0x03ffff00) - 0x100, LKM9);
/* Local bus slot #2 */
ocd_writel(0x00000330, LDP2);
ocd_writel((EXCITE_PHYS_FPGA >> 4) | 0x1, LKB11);
ocd_writel(((EXCITE_SIZE_FPGA >> 4) - 0x100) & 0x03ffff00, LKM11);
/* Local bus slot #3 */
ocd_writel(0x00123413, LDP3);
ocd_writel((EXCITE_PHYS_NAND >> 4) | 0x1, LKB12);
ocd_writel(((EXCITE_SIZE_NAND >> 4) - 0x100) & 0x03ffff00, LKM12);
}
console_initcall(excite_init_console);
arch_initcall(excite_platform_init);
EXPORT_SYMBOL(titan_lock);
EXPORT_SYMBOL(titan_irqflags);
EXPORT_SYMBOL(titan_irq);
EXPORT_SYMBOL(ocd_base);
EXPORT_SYMBOL(titan_base);

10
arch/mips/bcm47xx/prom.c
View File

@@ -100,11 +100,11 @@ static __init void prom_init_console(void)
static __init void prom_init_cmdline(void)
{
static char buf[CL_SIZE] __initdata;
static char buf[COMMAND_LINE_SIZE] __initdata;
/* Get the kernel command line from CFE */
if (cfe_getenv("LINUX_CMDLINE", buf, CL_SIZE) >= 0) {
buf[CL_SIZE-1] = 0;
if (cfe_getenv("LINUX_CMDLINE", buf, COMMAND_LINE_SIZE) >= 0) {
buf[COMMAND_LINE_SIZE - 1] = 0;
strcpy(arcs_cmdline, buf);
}
@@ -112,13 +112,13 @@ static __init void prom_init_cmdline(void)
* as CFE is not available anymore later in the boot process. */
if ((strstr(arcs_cmdline, "console=")) == NULL) {
/* Try to read the default serial port used by CFE */
if ((cfe_getenv("BOOT_CONSOLE", buf, CL_SIZE) < 0)
if ((cfe_getenv("BOOT_CONSOLE", buf, COMMAND_LINE_SIZE) < 0)
|| (strncmp("uart", buf, 4)))
/* Default to uart0 */
strcpy(buf, "uart0");
/* Compute the new command line */
snprintf(arcs_cmdline, CL_SIZE, "%s console=ttyS%c,115200",
snprintf(arcs_cmdline, COMMAND_LINE_SIZE, "%s console=ttyS%c,115200",
arcs_cmdline, buf[4]);
}
}

8
arch/mips/boot/Makefile
View File

@@ -25,7 +25,7 @@ strip-flags = $(addprefix --remove-section=,$(drop-sections))
VMLINUX = vmlinux
all: vmlinux.ecoff vmlinux.srec addinitrd
all: vmlinux.ecoff vmlinux.srec
vmlinux.ecoff: $(obj)/elf2ecoff $(VMLINUX)
$(obj)/elf2ecoff $(VMLINUX) vmlinux.ecoff $(E2EFLAGS)
@@ -39,11 +39,7 @@ vmlinux.bin: $(VMLINUX)
vmlinux.srec: $(VMLINUX)
$(OBJCOPY) -S -O srec $(strip-flags) $(VMLINUX) $(obj)/vmlinux.srec
$(obj)/addinitrd: $(obj)/addinitrd.c
$(HOSTCC) -o $@ $^
clean-files += addinitrd \
elf2ecoff \
clean-files += elf2ecoff \
vmlinux.bin \
vmlinux.ecoff \
vmlinux.srec

131
arch/mips/boot/addinitrd.c
View File

@@ -1,131 +0,0 @@
/*
* addinitrd - program to add a initrd image to an ecoff kernel
*
* (C) 1999 Thomas Bogendoerfer
* minor modifications, cleanup: Guido Guenther <agx@sigxcpu.org>
* further cleanup: Maciej W. Rozycki
*/
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <unistd.h>
#include <stdio.h>
#include <netinet/in.h>
#include "ecoff.h"
#define MIPS_PAGE_SIZE 4096
#define MIPS_PAGE_MASK (MIPS_PAGE_SIZE-1)
#define swab16(x) \
((unsigned short)( \
(((unsigned short)(x) & (unsigned short)0x00ffU) << 8) | \
(((unsigned short)(x) & (unsigned short)0xff00U) >> 8) ))
#define swab32(x) \
((unsigned int)( \
(((unsigned int)(x) & (unsigned int)0x000000ffUL) << 24) | \
(((unsigned int)(x) & (unsigned int)0x0000ff00UL) << 8) | \
(((unsigned int)(x) & (unsigned int)0x00ff0000UL) >> 8) | \
(((unsigned int)(x) & (unsigned int)0xff000000UL) >> 24) ))
#define SWAB(a) (swab ? swab32(a) : (a))
void die(char *s)
{
perror(s);
exit(1);
}
int main(int argc, char *argv[])
{
int fd_vmlinux, fd_initrd, fd_outfile;
FILHDR efile;
AOUTHDR eaout;
SCNHDR esecs[3];
struct stat st;
char buf[1024];
unsigned long loadaddr;
unsigned long initrd_header[2];
int i, cnt;
int swab = 0;
if (argc != 4) {
printf("Usage: %s <vmlinux> <initrd> <outfile>\n", argv[0]);
exit(1);
}
if ((fd_vmlinux = open (argv[1], O_RDONLY)) < 0)
die("open vmlinux");
if (read (fd_vmlinux, &efile, sizeof efile) != sizeof efile)
die("read file header");
if (read (fd_vmlinux, &eaout, sizeof eaout) != sizeof eaout)
die("read aout header");
if (read (fd_vmlinux, esecs, sizeof esecs) != sizeof esecs)
die("read section headers");
/*
* check whether the file is good for us
*/
/* TBD */
/*
* check, if we have to swab words
*/
if (ntohs(0xaa55) == 0xaa55) {
if (efile.f_magic == swab16(MIPSELMAGIC))
swab = 1;
} else {
if (efile.f_magic == swab16(MIPSEBMAGIC))
swab = 1;
}
/* make sure we have an empty data segment for the initrd */
if (eaout.dsize || esecs[1].s_size) {
fprintf(stderr, "Data segment not empty. Giving up!\n");
exit(1);
}
if ((fd_initrd = open (argv[2], O_RDONLY)) < 0)
die("open initrd");
if (fstat (fd_initrd, &st) < 0)
die("fstat initrd");
loadaddr = ((SWAB(esecs[2].s_vaddr) + SWAB(esecs[2].s_size)
+ MIPS_PAGE_SIZE-1) & ~MIPS_PAGE_MASK) - 8;
if (loadaddr < (SWAB(esecs[2].s_vaddr) + SWAB(esecs[2].s_size)))
loadaddr += MIPS_PAGE_SIZE;
initrd_header[0] = SWAB(0x494E5244);
initrd_header[1] = SWAB(st.st_size);
eaout.dsize = esecs[1].s_size = initrd_header[1] = SWAB(st.st_size+8);
eaout.data_start = esecs[1].s_vaddr = esecs[1].s_paddr = SWAB(loadaddr);
if ((fd_outfile = open (argv[3], O_RDWR|O_CREAT|O_TRUNC, 0666)) < 0)
die("open outfile");
if (write (fd_outfile, &efile, sizeof efile) != sizeof efile)
die("write file header");
if (write (fd_outfile, &eaout, sizeof eaout) != sizeof eaout)
die("write aout header");
if (write (fd_outfile, esecs, sizeof esecs) != sizeof esecs)
die("write section headers");
/* skip padding */
if(lseek(fd_vmlinux, SWAB(esecs[0].s_scnptr), SEEK_SET) == (off_t)-1)
die("lseek vmlinux");
if(lseek(fd_outfile, SWAB(esecs[0].s_scnptr), SEEK_SET) == (off_t)-1)
die("lseek outfile");
/* copy text segment */
cnt = SWAB(eaout.tsize);
while (cnt) {
if ((i = read (fd_vmlinux, buf, sizeof buf)) <= 0)
die("read vmlinux");
if (write (fd_outfile, buf, i) != i)
die("write vmlinux");
cnt -= i;
}
if (write (fd_outfile, initrd_header, sizeof initrd_header) != sizeof initrd_header)
die("write initrd header");
while ((i = read (fd_initrd, buf, sizeof buf)) > 0)
if (write (fd_outfile, buf, i) != i)
die("write initrd");
close(fd_vmlinux);
close(fd_initrd);
return 0;
}

100
arch/mips/boot/compressed/Makefile Normal file
View File

@@ -0,0 +1,100 @@
#
# This file is subject to the terms and conditions of the GNU General Public
# License.
#
# Adapted for MIPS Pete Popov, Dan Malek
#
# Copyright (C) 1994 by Linus Torvalds
# Adapted for PowerPC by Gary Thomas
# modified by Cort (cort@cs.nmt.edu)
#
# Copyright (C) 2009 Lemote Inc. & DSLab, Lanzhou University
# Author: Wu Zhangjin <wuzj@lemote.com>
#
# compressed kernel load addr: VMLINUZ_LOAD_ADDRESS > VMLINUX_LOAD_ADDRESS + VMLINUX_SIZE
VMLINUX_SIZE := $(shell wc -c $(objtree)/$(KBUILD_IMAGE) 2>/dev/null | cut -d' ' -f1)
VMLINUX_SIZE := $(shell [ -n "$(VMLINUX_SIZE)" ] && echo $$(($(VMLINUX_SIZE) + (65536 - $(VMLINUX_SIZE) % 65536))))
VMLINUZ_LOAD_ADDRESS := 0x$(shell [ -n "$(VMLINUX_SIZE)" ] && printf %x $$(($(VMLINUX_LOAD_ADDRESS) + $(VMLINUX_SIZE))))
# set the default size of the mallocing area for decompressing
BOOT_HEAP_SIZE := 0x400000
# Disable Function Tracer
KBUILD_CFLAGS := $(shell echo $(KBUILD_CFLAGS) | sed -e "s/-pg//")
KBUILD_CFLAGS := $(LINUXINCLUDE) $(KBUILD_CFLAGS) -D__KERNEL__ \
-DBOOT_HEAP_SIZE=$(BOOT_HEAP_SIZE) -D"VMLINUX_LOAD_ADDRESS_ULL=$(VMLINUX_LOAD_ADDRESS)ull" \
KBUILD_AFLAGS := $(LINUXINCLUDE) $(KBUILD_AFLAGS) -D__ASSEMBLY__ \
-DKERNEL_ENTRY=0x$(shell $(NM) $(objtree)/$(KBUILD_IMAGE) 2>/dev/null | grep " kernel_entry" | cut -f1 -d \ ) \
-DBOOT_HEAP_SIZE=$(BOOT_HEAP_SIZE)
obj-y := $(obj)/head.o $(obj)/decompress.o $(obj)/dbg.o
obj-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART16550) += $(obj)/uart-16550.o
OBJCOPYFLAGS_vmlinux.bin := $(OBJCOPYFLAGS) -O binary -R .comment -S
$(obj)/vmlinux.bin: $(KBUILD_IMAGE)
$(call if_changed,objcopy)
suffix_$(CONFIG_KERNEL_GZIP) = gz
suffix_$(CONFIG_KERNEL_BZIP2) = bz2
suffix_$(CONFIG_KERNEL_LZMA) = lzma
tool_$(CONFIG_KERNEL_GZIP) = gzip
tool_$(CONFIG_KERNEL_BZIP2) = bzip2
tool_$(CONFIG_KERNEL_LZMA) = lzma
$(obj)/vmlinux.$(suffix_y): $(obj)/vmlinux.bin
$(call if_changed,$(tool_y))
$(obj)/piggy.o: $(obj)/vmlinux.$(suffix_y) $(obj)/dummy.o
$(Q)$(OBJCOPY) $(OBJCOPYFLAGS) \
--add-section=.image=$< \
--set-section-flags=.image=contents,alloc,load,readonly,data \
$(obj)/dummy.o $@
LDFLAGS_vmlinuz := $(LDFLAGS) -Ttext $(VMLINUZ_LOAD_ADDRESS) -T
vmlinuz: $(src)/ld.script $(obj-y) $(obj)/piggy.o
$(call if_changed,ld)
$(Q)$(OBJCOPY) $(OBJCOPYFLAGS) -R .comment -R .stab -R .stabstr -R .initrd -R .sysmap $@
#
# Some DECstations need all possible sections of an ECOFF executable
#
ifdef CONFIG_MACH_DECSTATION
E2EFLAGS = -a
else
E2EFLAGS =
endif
# elf2ecoff can only handle 32bit image
ifdef CONFIG_32BIT
VMLINUZ = vmlinuz
else
VMLINUZ = vmlinuz.32
endif
vmlinuz.32: vmlinuz
$(Q)$(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
vmlinuz.ecoff: $(obj)/../elf2ecoff $(VMLINUZ)
$(Q)$(obj)/../elf2ecoff $(VMLINUZ) vmlinuz.ecoff $(E2EFLAGS)
$(obj)/../elf2ecoff: $(src)/../elf2ecoff.c
$(Q)$(HOSTCC) -o $@ $^
drop-sections = .reginfo .mdebug .comment .note .pdr .options .MIPS.options
strip-flags = $(addprefix --remove-section=,$(drop-sections))
OBJCOPYFLAGS_vmlinuz.bin := $(OBJCOPYFLAGS) -O binary $(strip-flags)
vmlinuz.bin: vmlinuz
$(call if_changed,objcopy)
OBJCOPYFLAGS_vmlinuz.srec := $(OBJCOPYFLAGS) -S -O srec $(strip-flags)
vmlinuz.srec: vmlinuz
$(call if_changed,objcopy)
clean:
clean-files += *.o \
vmlinu*

37
arch/mips/boot/compressed/dbg.c Normal file
View File

@@ -0,0 +1,37 @@
/*
* MIPS-specific debug support for pre-boot environment
*
* NOTE: putc() is board specific, if your board have a 16550 compatible uart,
* please select SYS_SUPPORTS_ZBOOT_UART16550 for your machine. othewise, you
* need to implement your own putc().
*/
#include <linux/init.h>
#include <linux/types.h>
void __attribute__ ((weak)) putc(char c)
{
}
void puts(const char *s)
{
char c;
while ((c = *s++) != '\0') {
putc(c);
if (c == '\n')
putc('\r');
}
}
void puthex(unsigned long long val)
{
unsigned char buf[10];
int i;
for (i = 7; i >= 0; i--) {
buf[i] = "0123456789ABCDEF"[val & 0x0F];
val >>= 4;
}
buf[8] = '\0';
puts(buf);
}

126
arch/mips/boot/compressed/decompress.c Normal file
View File

@@ -0,0 +1,126 @@
/*
* Misc. bootloader code for many machines.
*
* Copyright 2001 MontaVista Software Inc.
* Author: Matt Porter <mporter@mvista.com> Derived from
* arch/ppc/boot/prep/misc.c
*
* Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
* Author: Wu Zhangjin <wuzj@lemote.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <asm/addrspace.h>
/* These two variables specify the free mem region
* that can be used for temporary malloc area
*/
unsigned long free_mem_ptr;
unsigned long free_mem_end_ptr;
char *zimage_start;
/* The linker tells us where the image is. */
extern unsigned char __image_begin, __image_end;
extern unsigned char __ramdisk_begin, __ramdisk_end;
unsigned long initrd_size;
/* debug interfaces */
extern void puts(const char *s);
extern void puthex(unsigned long long val);
void error(char *x)
{
puts("\n\n");
puts(x);
puts("\n\n -- System halted");
while (1)
; /* Halt */
}
/* activate the code for pre-boot environment */
#define STATIC static
#ifdef CONFIG_KERNEL_GZIP
void *memcpy(void *dest, const void *src, size_t n)
{
int i;
const char *s = src;
char *d = dest;
for (i = 0; i < n; i++)
d[i] = s[i];
return dest;
}
#include "../../../../lib/decompress_inflate.c"
#endif
#ifdef CONFIG_KERNEL_BZIP2
void *memset(void *s, int c, size_t n)
{
int i;
char *ss = s;
for (i = 0; i < n; i++)
ss[i] = c;
return s;
}
#include "../../../../lib/decompress_bunzip2.c"
#endif
#ifdef CONFIG_KERNEL_LZMA
#include "../../../../lib/decompress_unlzma.c"
#endif
void decompress_kernel(unsigned long boot_heap_start)
{
int zimage_size;
/*
* We link ourself to an arbitrary low address. When we run, we
* relocate outself to that address. __image_beign points to
* the part of the image where the zImage is. -- Tom
*/
zimage_start = (char *)(unsigned long)(&__image_begin);
zimage_size = (unsigned long)(&__image_end) -
(unsigned long)(&__image_begin);
/*
* The zImage and initrd will be between start and _end, so they've
* already been moved once. We're good to go now. -- Tom
*/
puts("zimage at: ");
puthex((unsigned long)zimage_start);
puts(" ");
puthex((unsigned long)(zimage_size + zimage_start));
puts("\n");
if (initrd_size) {
puts("initrd at: ");
puthex((unsigned long)(&__ramdisk_begin));
puts(" ");
puthex((unsigned long)(&__ramdisk_end));
puts("\n");
}
/* this area are prepared for mallocing when decompressing */
free_mem_ptr = boot_heap_start;
free_mem_end_ptr = boot_heap_start + BOOT_HEAP_SIZE;
/* Display standard Linux/MIPS boot prompt for kernel args */
puts("Uncompressing Linux at load address ");
puthex(VMLINUX_LOAD_ADDRESS_ULL);
puts("\n");
/* Decompress the kernel with according algorithm */
decompress(zimage_start, zimage_size, 0, 0,
(void *)VMLINUX_LOAD_ADDRESS_ULL, 0, error);
/* FIXME: is there a need to flush cache here? */
puts("Now, booting the kernel...\n");
}

4
arch/mips/boot/compressed/dummy.c Normal file
View File

@@ -0,0 +1,4 @@
int main(void)
{
return 0;
}

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