mirror of
https://github.com/armbian/linux.git
synced 2026-01-06 10:13:00 -08:00
Merge tag 'v3.13-rc4' into core/locking
Merge Linux 3.13-rc4, to refresh this rather old tree with the latest fixes. Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Ingo Molnar
5
CREDITS
5
CREDITS
@@ -655,6 +655,11 @@ S: Stanford University
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S: Stanford, California 94305
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S: USA
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N: Carlos Chinea
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E: carlos.chinea@nokia.com
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E: cch.devel@gmail.com
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D: Author of HSI Subsystem
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N: Randolph Chung
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E: tausq@debian.org
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D: Linux/PA-RISC hacker
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@@ -196,13 +196,6 @@ chmod 0644 /dev/cpu/microcode
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as root before you can use this. You'll probably also want to
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get the user-space microcode_ctl utility to use with this.
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Powertweak
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----------
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If you are running v0.1.17 or earlier, you should upgrade to
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version v0.99.0 or higher. Running old versions may cause problems
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with programs using shared memory.
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udev
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----
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udev is a userspace application for populating /dev dynamically with
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@@ -366,10 +359,6 @@ Intel P6 microcode
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------------------
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o <http://www.urbanmyth.org/microcode/>
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Powertweak
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----------
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o <http://powertweak.sourceforge.net/>
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udev
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----
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o <http://www.kernel.org/pub/linux/utils/kernel/hotplug/udev.html>
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@@ -58,7 +58,7 @@
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</sect1>
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<sect1><title>Wait queues and Wake events</title>
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!Iinclude/linux/wait.h
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!Ekernel/wait.c
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!Ekernel/sched/wait.c
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</sect1>
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<sect1><title>High-resolution timers</title>
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!Iinclude/linux/ktime.h
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@@ -73,7 +73,8 @@ range from zero to the maximal number of valid planes for the currently active
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format. For the single-planar API, applications must set <structfield> plane
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</structfield> to zero. Additional flags may be posted in the <structfield>
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flags </structfield> field. Refer to a manual for open() for details.
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Currently only O_CLOEXEC is supported. All other fields must be set to zero.
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Currently only O_CLOEXEC, O_RDONLY, O_WRONLY, and O_RDWR are supported. All
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other fields must be set to zero.
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In the case of multi-planar API, every plane is exported separately using
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multiple <constant> VIDIOC_EXPBUF </constant> calls. </para>
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@@ -170,8 +171,9 @@ multi-planar API. Otherwise this value must be set to zero. </entry>
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<entry>__u32</entry>
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<entry><structfield>flags</structfield></entry>
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<entry>Flags for the newly created file, currently only <constant>
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O_CLOEXEC </constant> is supported, refer to the manual of open() for more
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details.</entry>
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O_CLOEXEC </constant>, <constant>O_RDONLY</constant>, <constant>O_WRONLY
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</constant>, and <constant>O_RDWR</constant> are supported, refer to the manual
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of open() for more details.</entry>
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</row>
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<row>
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<entry>__s32</entry>
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574
Documentation/assoc_array.txt
Normal file
574
Documentation/assoc_array.txt
Normal file
File diff suppressed because it is too large
Load Diff
@@ -266,10 +266,12 @@ E.g.
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Invalidation is removing an entry from the cache without writing it
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back. Cache blocks can be invalidated via the invalidate_cblocks
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message, which takes an arbitrary number of cblock ranges. Each cblock
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must be expressed as a decimal value, in the future a variant message
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that takes cblock ranges expressed in hexidecimal may be needed to
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better support efficient invalidation of larger caches. The cache must
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be in passthrough mode when invalidate_cblocks is used.
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range's end value is "one past the end", meaning 5-10 expresses a range
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of values from 5 to 9. Each cblock must be expressed as a decimal
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value, in the future a variant message that takes cblock ranges
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expressed in hexidecimal may be needed to better support efficient
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invalidation of larger caches. The cache must be in passthrough mode
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when invalidate_cblocks is used.
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invalidate_cblocks [<cblock>|<cblock begin>-<cblock end>]*
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@@ -7,10 +7,18 @@ The MPU contain CPUs, GIC, L2 cache and a local PRCM.
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Required properties:
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- compatible : Should be "ti,omap3-mpu" for OMAP3
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Should be "ti,omap4-mpu" for OMAP4
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Should be "ti,omap5-mpu" for OMAP5
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- ti,hwmods: "mpu"
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Examples:
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- For an OMAP5 SMP system:
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mpu {
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compatible = "ti,omap5-mpu";
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ti,hwmods = "mpu"
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};
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- For an OMAP4 SMP system:
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mpu {
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@@ -7,6 +7,7 @@ representation in the device tree should be done as under:-
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Required properties:
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- compatible : should be one of
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"arm,armv8-pmuv3"
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"arm,cortex-a15-pmu"
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"arm,cortex-a9-pmu"
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"arm,cortex-a8-pmu"
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@@ -49,7 +49,7 @@ adc@12D10000 {
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/* NTC thermistor is a hwmon device */
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ncp15wb473@0 {
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compatible = "ntc,ncp15wb473";
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pullup-uV = <1800000>;
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pullup-uv = <1800000>;
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pullup-ohm = <47000>;
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pulldown-ohm = <0>;
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io-channels = <&adc 4>;
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@@ -6,7 +6,7 @@ SoC's in the Exynos4 family.
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Required Properties:
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- comptible: should be one of the following.
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- compatible: should be one of the following.
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- "samsung,exynos4210-clock" - controller compatible with Exynos4210 SoC.
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- "samsung,exynos4412-clock" - controller compatible with Exynos4412 SoC.
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@@ -5,7 +5,7 @@ controllers within the Exynos5250 SoC.
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Required Properties:
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- comptible: should be one of the following.
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- compatible: should be one of the following.
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- "samsung,exynos5250-clock" - controller compatible with Exynos5250 SoC.
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- reg: physical base address of the controller and length of memory mapped
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@@ -5,7 +5,7 @@ controllers within the Exynos5420 SoC.
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Required Properties:
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- comptible: should be one of the following.
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- compatible: should be one of the following.
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- "samsung,exynos5420-clock" - controller compatible with Exynos5420 SoC.
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- reg: physical base address of the controller and length of memory mapped
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@@ -5,7 +5,7 @@ controllers within the Exynos5440 SoC.
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Required Properties:
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- comptible: should be "samsung,exynos5440-clock".
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- compatible: should be "samsung,exynos5440-clock".
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- reg: physical base address of the controller and length of memory mapped
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region.
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@@ -28,7 +28,7 @@ The three cells in order are:
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dependent:
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- bit 7-0: peripheral identifier for the hardware handshaking interface. The
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identifier can be different for tx and rx.
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- bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 1 for ASAP.
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- bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 2 for ASAP.
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Example:
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@@ -5,16 +5,42 @@ This is for the non-QE/CPM/GUTs GPIO controllers as found on
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Every GPIO controller node must have #gpio-cells property defined,
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this information will be used to translate gpio-specifiers.
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See bindings/gpio/gpio.txt for details of how to specify GPIO
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information for devices.
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The GPIO module usually is connected to the SoC's internal interrupt
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controller, see bindings/interrupt-controller/interrupts.txt (the
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interrupt client nodes section) for details how to specify this GPIO
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module's interrupt.
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The GPIO module may serve as another interrupt controller (cascaded to
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the SoC's internal interrupt controller). See the interrupt controller
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nodes section in bindings/interrupt-controller/interrupts.txt for
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details.
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Required properties:
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- compatible : "fsl,<CHIP>-gpio" followed by "fsl,mpc8349-gpio" for
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83xx, "fsl,mpc8572-gpio" for 85xx and "fsl,mpc8610-gpio" for 86xx.
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- #gpio-cells : Should be two. The first cell is the pin number and the
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second cell is used to specify optional parameters (currently unused).
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- interrupts : Interrupt mapping for GPIO IRQ.
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- interrupt-parent : Phandle for the interrupt controller that
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services interrupts for this device.
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- gpio-controller : Marks the port as GPIO controller.
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- compatible: "fsl,<chip>-gpio" followed by "fsl,mpc8349-gpio"
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for 83xx, "fsl,mpc8572-gpio" for 85xx, or
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"fsl,mpc8610-gpio" for 86xx.
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- #gpio-cells: Should be two. The first cell is the pin number
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and the second cell is used to specify optional
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parameters (currently unused).
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- interrupt-parent: Phandle for the interrupt controller that
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services interrupts for this device.
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- interrupts: Interrupt mapping for GPIO IRQ.
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- gpio-controller: Marks the port as GPIO controller.
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Optional properties:
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- interrupt-controller: Empty boolean property which marks the GPIO
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module as an IRQ controller.
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- #interrupt-cells: Should be two. Defines the number of integer
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cells required to specify an interrupt within
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this interrupt controller. The first cell
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defines the pin number, the second cell
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defines additional flags (trigger type,
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trigger polarity). Note that the available
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set of trigger conditions supported by the
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GPIO module depends on the actual SoC.
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Example of gpio-controller nodes for a MPC8347 SoC:
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@@ -22,39 +48,27 @@ Example of gpio-controller nodes for a MPC8347 SoC:
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#gpio-cells = <2>;
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compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio";
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reg = <0xc00 0x100>;
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interrupts = <74 0x8>;
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interrupt-parent = <&ipic>;
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interrupts = <74 0x8>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio2: gpio-controller@d00 {
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#gpio-cells = <2>;
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compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio";
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reg = <0xd00 0x100>;
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interrupts = <75 0x8>;
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interrupt-parent = <&ipic>;
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interrupts = <75 0x8>;
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gpio-controller;
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};
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See booting-without-of.txt for details of how to specify GPIO
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information for devices.
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To use GPIO pins as interrupt sources for peripherals, specify the
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GPIO controller as the interrupt parent and define GPIO number +
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trigger mode using the interrupts property, which is defined like
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this:
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interrupts = <number trigger>, where:
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- number: GPIO pin (0..31)
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- trigger: trigger mode:
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2 = trigger on falling edge
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3 = trigger on both edges
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Example of device using this is:
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Example of a peripheral using the GPIO module as an IRQ controller:
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funkyfpga@0 {
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compatible = "funky-fpga";
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...
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interrupts = <4 3>;
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interrupt-parent = <&gpio1>;
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interrupts = <4 3>;
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};
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@@ -1,7 +1,8 @@
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I2C for OMAP platforms
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Required properties :
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- compatible : Must be "ti,omap3-i2c" or "ti,omap4-i2c"
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- compatible : Must be "ti,omap2420-i2c", "ti,omap2430-i2c", "ti,omap3-i2c"
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or "ti,omap4-i2c"
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- ti,hwmods : Must be "i2c<n>", n being the instance number (1-based)
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- #address-cells = <1>;
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- #size-cells = <0>;
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@@ -15,6 +15,7 @@ adi,adt7461 +/-1C TDM Extended Temp Range I.C
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adt7461 +/-1C TDM Extended Temp Range I.C
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at,24c08 i2c serial eeprom (24cxx)
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atmel,24c02 i2c serial eeprom (24cxx)
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atmel,at97sc3204t i2c trusted platform module (TPM)
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catalyst,24c32 i2c serial eeprom
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dallas,ds1307 64 x 8, Serial, I2C Real-Time Clock
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dallas,ds1338 I2C RTC with 56-Byte NV RAM
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@@ -35,6 +36,7 @@ fsl,mc13892 MC13892: Power Management Integrated Circuit (PMIC) for i.MX35/51
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fsl,mma8450 MMA8450Q: Xtrinsic Low-power, 3-axis Xtrinsic Accelerometer
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fsl,mpr121 MPR121: Proximity Capacitive Touch Sensor Controller
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fsl,sgtl5000 SGTL5000: Ultra Low-Power Audio Codec
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gmt,g751 G751: Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface
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infineon,slb9635tt Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz)
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infineon,slb9645tt Infineon SLB9645 I2C TPM (new protocol, max 400khz)
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maxim,ds1050 5 Bit Programmable, Pulse-Width Modulator
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@@ -44,6 +46,7 @@ mc,rv3029c2 Real Time Clock Module with I2C-Bus
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national,lm75 I2C TEMP SENSOR
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national,lm80 Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor
|
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national,lm92 ±0.33°C Accurate, 12-Bit + Sign Temperature Sensor and Thermal Window Comparator with Two-Wire Interface
|
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nuvoton,npct501 i2c trusted platform module (TPM)
|
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nxp,pca9556 Octal SMBus and I2C registered interface
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nxp,pca9557 8-bit I2C-bus and SMBus I/O port with reset
|
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nxp,pcf8563 Real-time clock/calendar
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@@ -61,3 +64,4 @@ taos,tsl2550 Ambient Light Sensor with SMBUS/Two Wire Serial Interface
|
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ti,tsc2003 I2C Touch-Screen Controller
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ti,tmp102 Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface
|
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ti,tmp275 Digital Temperature Sensor
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winbond,wpct301 i2c trusted platform module (TPM)
|
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|
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54
Documentation/devicetree/bindings/mmc/ti-omap.txt
Normal file
54
Documentation/devicetree/bindings/mmc/ti-omap.txt
Normal file
@@ -0,0 +1,54 @@
|
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* TI MMC host controller for OMAP1 and 2420
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|
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The MMC Host Controller on TI OMAP1 and 2420 family provides
|
||||
an interface for MMC, SD, and SDIO types of memory cards.
|
||||
|
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This file documents differences between the core properties described
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by mmc.txt and the properties used by the omap mmc driver.
|
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|
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Note that this driver will not work with omap2430 or later omaps,
|
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please see the omap hsmmc driver for the current omaps.
|
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|
||||
Required properties:
|
||||
- compatible: Must be "ti,omap2420-mmc", for OMAP2420 controllers
|
||||
- ti,hwmods: For 2420, must be "msdi<n>", where n is controller
|
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instance starting 1
|
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|
||||
Examples:
|
||||
|
||||
msdi1: mmc@4809c000 {
|
||||
compatible = "ti,omap2420-mmc";
|
||||
ti,hwmods = "msdi1";
|
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reg = <0x4809c000 0x80>;
|
||||
interrupts = <83>;
|
||||
dmas = <&sdma 61 &sdma 62>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
* TI MMC host controller for OMAP1 and 2420
|
||||
|
||||
The MMC Host Controller on TI OMAP1 and 2420 family provides
|
||||
an interface for MMC, SD, and SDIO types of memory cards.
|
||||
|
||||
This file documents differences between the core properties described
|
||||
by mmc.txt and the properties used by the omap mmc driver.
|
||||
|
||||
Note that this driver will not work with omap2430 or later omaps,
|
||||
please see the omap hsmmc driver for the current omaps.
|
||||
|
||||
Required properties:
|
||||
- compatible: Must be "ti,omap2420-mmc", for OMAP2420 controllers
|
||||
- ti,hwmods: For 2420, must be "msdi<n>", where n is controller
|
||||
instance starting 1
|
||||
|
||||
Examples:
|
||||
|
||||
msdi1: mmc@4809c000 {
|
||||
compatible = "ti,omap2420-mmc";
|
||||
ti,hwmods = "msdi1";
|
||||
reg = <0x4809c000 0x80>;
|
||||
interrupts = <83>;
|
||||
dmas = <&sdma 61 &sdma 62>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
@@ -4,7 +4,7 @@ This file provides information, what the device node
|
||||
for the davinci_emac interface contains.
|
||||
|
||||
Required properties:
|
||||
- compatible: "ti,davinci-dm6467-emac";
|
||||
- compatible: "ti,davinci-dm6467-emac" or "ti,am3517-emac"
|
||||
- reg: Offset and length of the register set for the device
|
||||
- ti,davinci-ctrl-reg-offset: offset to control register
|
||||
- ti,davinci-ctrl-mod-reg-offset: offset to control module register
|
||||
|
||||
@@ -15,6 +15,7 @@ Optional properties:
|
||||
only if property "phy-reset-gpios" is available. Missing the property
|
||||
will have the duration be 1 millisecond. Numbers greater than 1000 are
|
||||
invalid and 1 millisecond will be used instead.
|
||||
- phy-supply: regulator that powers the Ethernet PHY.
|
||||
|
||||
Example:
|
||||
|
||||
@@ -25,4 +26,5 @@ ethernet@83fec000 {
|
||||
phy-mode = "mii";
|
||||
phy-reset-gpios = <&gpio2 14 0>; /* GPIO2_14 */
|
||||
local-mac-address = [00 04 9F 01 1B B9];
|
||||
phy-supply = <®_fec_supply>;
|
||||
};
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user