mirror of
https://github.com/armbian/linux.git
synced 2026-01-06 10:13:00 -08:00
Merge branch 'master' of git://git.infradead.org/users/linville/wireless-next into for-davem
This commit is contained in:
@@ -178,23 +178,29 @@ bool ath_hw_keyreset(struct ath_common *common, u16 entry);
|
||||
void ath_hw_cycle_counters_update(struct ath_common *common);
|
||||
int32_t ath_hw_get_listen_time(struct ath_common *common);
|
||||
|
||||
extern __attribute__ ((format (printf, 3, 4))) int
|
||||
ath_printk(const char *level, struct ath_common *common, const char *fmt, ...);
|
||||
extern __attribute__((format (printf, 2, 3)))
|
||||
void ath_printk(const char *level, const char *fmt, ...);
|
||||
|
||||
#define _ath_printk(level, common, fmt, ...) \
|
||||
do { \
|
||||
__always_unused struct ath_common *unused = common; \
|
||||
ath_printk(level, fmt, ##__VA_ARGS__); \
|
||||
} while (0)
|
||||
|
||||
#define ath_emerg(common, fmt, ...) \
|
||||
ath_printk(KERN_EMERG, common, fmt, ##__VA_ARGS__)
|
||||
_ath_printk(KERN_EMERG, common, fmt, ##__VA_ARGS__)
|
||||
#define ath_alert(common, fmt, ...) \
|
||||
ath_printk(KERN_ALERT, common, fmt, ##__VA_ARGS__)
|
||||
_ath_printk(KERN_ALERT, common, fmt, ##__VA_ARGS__)
|
||||
#define ath_crit(common, fmt, ...) \
|
||||
ath_printk(KERN_CRIT, common, fmt, ##__VA_ARGS__)
|
||||
_ath_printk(KERN_CRIT, common, fmt, ##__VA_ARGS__)
|
||||
#define ath_err(common, fmt, ...) \
|
||||
ath_printk(KERN_ERR, common, fmt, ##__VA_ARGS__)
|
||||
_ath_printk(KERN_ERR, common, fmt, ##__VA_ARGS__)
|
||||
#define ath_warn(common, fmt, ...) \
|
||||
ath_printk(KERN_WARNING, common, fmt, ##__VA_ARGS__)
|
||||
_ath_printk(KERN_WARNING, common, fmt, ##__VA_ARGS__)
|
||||
#define ath_notice(common, fmt, ...) \
|
||||
ath_printk(KERN_NOTICE, common, fmt, ##__VA_ARGS__)
|
||||
_ath_printk(KERN_NOTICE, common, fmt, ##__VA_ARGS__)
|
||||
#define ath_info(common, fmt, ...) \
|
||||
ath_printk(KERN_INFO, common, fmt, ##__VA_ARGS__)
|
||||
_ath_printk(KERN_INFO, common, fmt, ##__VA_ARGS__)
|
||||
|
||||
/**
|
||||
* enum ath_debug_level - atheros wireless debug level
|
||||
@@ -246,27 +252,21 @@ enum ATH_DEBUG {
|
||||
|
||||
#ifdef CONFIG_ATH_DEBUG
|
||||
|
||||
#define ath_dbg(common, dbg_mask, fmt, ...) \
|
||||
({ \
|
||||
int rtn; \
|
||||
if ((common)->debug_mask & dbg_mask) \
|
||||
rtn = ath_printk(KERN_DEBUG, common, fmt, \
|
||||
##__VA_ARGS__); \
|
||||
else \
|
||||
rtn = 0; \
|
||||
\
|
||||
rtn; \
|
||||
})
|
||||
#define ath_dbg(common, dbg_mask, fmt, ...) \
|
||||
do { \
|
||||
if ((common)->debug_mask & dbg_mask) \
|
||||
_ath_printk(KERN_DEBUG, common, fmt, ##__VA_ARGS__); \
|
||||
} while (0)
|
||||
|
||||
#define ATH_DBG_WARN(foo, arg...) WARN(foo, arg)
|
||||
#define ATH_DBG_WARN_ON_ONCE(foo) WARN_ON_ONCE(foo)
|
||||
|
||||
#else
|
||||
|
||||
static inline __attribute__ ((format (printf, 3, 4))) int
|
||||
ath_dbg(struct ath_common *common, enum ATH_DEBUG dbg_mask,
|
||||
const char *fmt, ...)
|
||||
static inline __attribute__((format (printf, 3, 4)))
|
||||
void ath_dbg(struct ath_common *common, enum ATH_DEBUG dbg_mask,
|
||||
const char *fmt, ...)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#define ATH_DBG_WARN(foo, arg...) do {} while (0)
|
||||
#define ATH_DBG_WARN_ON_ONCE(foo) ({ \
|
||||
|
||||
@@ -643,7 +643,7 @@ static bool ath9k_hw_ani_read_counters(struct ath_hw *ah)
|
||||
listenTime = ath_hw_get_listen_time(common);
|
||||
|
||||
if (listenTime <= 0) {
|
||||
ah->stats.ast_ani_lneg++;
|
||||
ah->stats.ast_ani_lneg_or_lzero++;
|
||||
ath9k_ani_restart(ah);
|
||||
return false;
|
||||
}
|
||||
|
||||
@@ -148,8 +148,7 @@ struct ar5416Stats {
|
||||
u32 ast_ani_ofdmerrs;
|
||||
u32 ast_ani_cckerrs;
|
||||
u32 ast_ani_reset;
|
||||
u32 ast_ani_lzero;
|
||||
u32 ast_ani_lneg;
|
||||
u32 ast_ani_lneg_or_lzero;
|
||||
u32 avgbrssi;
|
||||
struct ath9k_mib_stats ast_mibstats;
|
||||
};
|
||||
@@ -159,7 +158,5 @@ void ath9k_enable_mib_counters(struct ath_hw *ah);
|
||||
void ath9k_hw_disable_mib_counters(struct ath_hw *ah);
|
||||
void ath9k_hw_ani_setup(struct ath_hw *ah);
|
||||
void ath9k_hw_ani_init(struct ath_hw *ah);
|
||||
int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah,
|
||||
struct ath9k_channel *chan);
|
||||
|
||||
#endif /* ANI_H */
|
||||
|
||||
@@ -273,7 +273,7 @@ static int ar9002_hw_proc_txdesc(struct ath_hw *ah, void *ds,
|
||||
|
||||
static void ar9002_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
|
||||
u32 pktLen, enum ath9k_pkt_type type,
|
||||
u32 txPower, u32 keyIx,
|
||||
u32 txPower, u8 keyIx,
|
||||
enum ath9k_key_type keyType, u32 flags)
|
||||
{
|
||||
struct ar5416_desc *ads = AR5416DESC(ds);
|
||||
|
||||
@@ -3318,7 +3318,7 @@ static int ar9300_eeprom_restore_internal(struct ath_hw *ah,
|
||||
|
||||
word = kzalloc(2048, GFP_KERNEL);
|
||||
if (!word)
|
||||
return -1;
|
||||
return -ENOMEM;
|
||||
|
||||
memcpy(mptr, &ar9300_default, mdata_size);
|
||||
|
||||
|
||||
@@ -312,7 +312,7 @@ static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds,
|
||||
|
||||
static void ar9003_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
|
||||
u32 pktlen, enum ath9k_pkt_type type, u32 txpower,
|
||||
u32 keyIx, enum ath9k_key_type keyType, u32 flags)
|
||||
u8 keyIx, enum ath9k_key_type keyType, u32 flags)
|
||||
{
|
||||
struct ar9003_txc *ads = (struct ar9003_txc *) ds;
|
||||
|
||||
|
||||
@@ -206,16 +206,17 @@ struct ath_atx_ac {
|
||||
};
|
||||
|
||||
struct ath_frame_info {
|
||||
struct ath_buf *bf;
|
||||
int framelen;
|
||||
u32 keyix;
|
||||
enum ath9k_key_type keytype;
|
||||
u8 keyix;
|
||||
u8 retries;
|
||||
u16 seqno;
|
||||
};
|
||||
|
||||
struct ath_buf_state {
|
||||
u8 bf_type;
|
||||
u8 bfs_paprd;
|
||||
u16 seqno;
|
||||
unsigned long bfs_paprd_timestamp;
|
||||
};
|
||||
|
||||
@@ -235,7 +236,7 @@ struct ath_buf {
|
||||
|
||||
struct ath_atx_tid {
|
||||
struct list_head list;
|
||||
struct list_head buf_q;
|
||||
struct sk_buff_head buf_q;
|
||||
struct ath_node *an;
|
||||
struct ath_atx_ac *ac;
|
||||
unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
|
||||
|
||||
@@ -711,7 +711,7 @@ static ssize_t read_file_stations(struct file *file, char __user *user_buf,
|
||||
" tid: %p %s %s %i %p %p\n",
|
||||
tid, tid->sched ? "sched" : "idle",
|
||||
tid->paused ? "paused" : "running",
|
||||
list_empty(&tid->buf_q),
|
||||
skb_queue_empty(&tid->buf_q),
|
||||
tid->an, tid->ac);
|
||||
if (len >= size)
|
||||
goto done;
|
||||
@@ -828,6 +828,8 @@ static ssize_t read_file_misc(struct file *file, char __user *user_buf,
|
||||
void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
|
||||
struct ath_tx_status *ts, struct ath_txq *txq)
|
||||
{
|
||||
#define TX_SAMP_DBG(c) (sc->debug.bb_mac_samp[sc->debug.sampidx].ts\
|
||||
[sc->debug.tsidx].c)
|
||||
int qnum = txq->axq_qnum;
|
||||
|
||||
TX_STAT_INC(qnum, tx_pkts_all);
|
||||
@@ -857,6 +859,26 @@ void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
|
||||
TX_STAT_INC(qnum, data_underrun);
|
||||
if (ts->ts_flags & ATH9K_TX_DELIM_UNDERRUN)
|
||||
TX_STAT_INC(qnum, delim_underrun);
|
||||
|
||||
spin_lock(&sc->debug.samp_lock);
|
||||
TX_SAMP_DBG(jiffies) = jiffies;
|
||||
TX_SAMP_DBG(rssi_ctl0) = ts->ts_rssi_ctl0;
|
||||
TX_SAMP_DBG(rssi_ctl1) = ts->ts_rssi_ctl1;
|
||||
TX_SAMP_DBG(rssi_ctl2) = ts->ts_rssi_ctl2;
|
||||
TX_SAMP_DBG(rssi_ext0) = ts->ts_rssi_ext0;
|
||||
TX_SAMP_DBG(rssi_ext1) = ts->ts_rssi_ext1;
|
||||
TX_SAMP_DBG(rssi_ext2) = ts->ts_rssi_ext2;
|
||||
TX_SAMP_DBG(rateindex) = ts->ts_rateindex;
|
||||
TX_SAMP_DBG(isok) = !!(ts->ts_status & ATH9K_TXERR_MASK);
|
||||
TX_SAMP_DBG(rts_fail_cnt) = ts->ts_shortretry;
|
||||
TX_SAMP_DBG(data_fail_cnt) = ts->ts_longretry;
|
||||
TX_SAMP_DBG(rssi) = ts->ts_rssi;
|
||||
TX_SAMP_DBG(tid) = ts->tid;
|
||||
TX_SAMP_DBG(qid) = ts->qid;
|
||||
sc->debug.tsidx = (sc->debug.tsidx + 1) % ATH_DBG_MAX_SAMPLES;
|
||||
spin_unlock(&sc->debug.samp_lock);
|
||||
|
||||
#undef TX_SAMP_DBG
|
||||
}
|
||||
|
||||
static const struct file_operations fops_xmit = {
|
||||
@@ -995,6 +1017,8 @@ void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs)
|
||||
{
|
||||
#define RX_STAT_INC(c) sc->debug.stats.rxstats.c++
|
||||
#define RX_PHY_ERR_INC(c) sc->debug.stats.rxstats.phy_err_stats[c]++
|
||||
#define RX_SAMP_DBG(c) (sc->debug.bb_mac_samp[sc->debug.sampidx].rs\
|
||||
[sc->debug.rsidx].c)
|
||||
|
||||
u32 phyerr;
|
||||
|
||||
@@ -1030,8 +1054,25 @@ void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs)
|
||||
|
||||
sc->debug.stats.rxstats.rs_antenna = rs->rs_antenna;
|
||||
|
||||
spin_lock(&sc->debug.samp_lock);
|
||||
RX_SAMP_DBG(jiffies) = jiffies;
|
||||
RX_SAMP_DBG(rssi_ctl0) = rs->rs_rssi_ctl0;
|
||||
RX_SAMP_DBG(rssi_ctl1) = rs->rs_rssi_ctl1;
|
||||
RX_SAMP_DBG(rssi_ctl2) = rs->rs_rssi_ctl2;
|
||||
RX_SAMP_DBG(rssi_ext0) = rs->rs_rssi_ext0;
|
||||
RX_SAMP_DBG(rssi_ext1) = rs->rs_rssi_ext1;
|
||||
RX_SAMP_DBG(rssi_ext2) = rs->rs_rssi_ext2;
|
||||
RX_SAMP_DBG(antenna) = rs->rs_antenna;
|
||||
RX_SAMP_DBG(rssi) = rs->rs_rssi;
|
||||
RX_SAMP_DBG(rate) = rs->rs_rate;
|
||||
RX_SAMP_DBG(is_mybeacon) = rs->is_mybeacon;
|
||||
|
||||
sc->debug.rsidx = (sc->debug.rsidx + 1) % ATH_DBG_MAX_SAMPLES;
|
||||
spin_unlock(&sc->debug.samp_lock);
|
||||
|
||||
#undef RX_STAT_INC
|
||||
#undef RX_PHY_ERR_INC
|
||||
#undef RX_SAMP_DBG
|
||||
}
|
||||
|
||||
static const struct file_operations fops_recv = {
|
||||
@@ -1272,6 +1313,269 @@ static const struct file_operations fops_modal_eeprom = {
|
||||
.llseek = default_llseek,
|
||||
};
|
||||
|
||||
void ath9k_debug_samp_bb_mac(struct ath_softc *sc)
|
||||
{
|
||||
#define ATH_SAMP_DBG(c) (sc->debug.bb_mac_samp[sc->debug.sampidx].c)
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
unsigned long flags;
|
||||
int i;
|
||||
|
||||
ath9k_ps_wakeup(sc);
|
||||
|
||||
spin_lock_irqsave(&common->cc_lock, flags);
|
||||
ath_hw_cycle_counters_update(common);
|
||||
spin_unlock_irqrestore(&common->cc_lock, flags);
|
||||
|
||||
spin_lock_bh(&sc->debug.samp_lock);
|
||||
|
||||
ATH_SAMP_DBG(cc.cycles) = common->cc_ani.cycles;
|
||||
ATH_SAMP_DBG(cc.rx_busy) = common->cc_ani.rx_busy;
|
||||
ATH_SAMP_DBG(cc.rx_frame) = common->cc_ani.rx_frame;
|
||||
ATH_SAMP_DBG(cc.tx_frame) = common->cc_ani.tx_frame;
|
||||
ATH_SAMP_DBG(noise) = ah->noise;
|
||||
|
||||
REG_WRITE_D(ah, AR_MACMISC,
|
||||
((AR_MACMISC_DMA_OBS_LINE_8 << AR_MACMISC_DMA_OBS_S) |
|
||||
(AR_MACMISC_MISC_OBS_BUS_1 <<
|
||||
AR_MACMISC_MISC_OBS_BUS_MSB_S)));
|
||||
|
||||
for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++)
|
||||
ATH_SAMP_DBG(dma_dbg_reg_vals[i]) = REG_READ_D(ah,
|
||||
AR_DMADBG_0 + (i * sizeof(u32)));
|
||||
|
||||
ATH_SAMP_DBG(pcu_obs) = REG_READ_D(ah, AR_OBS_BUS_1);
|
||||
ATH_SAMP_DBG(pcu_cr) = REG_READ_D(ah, AR_CR);
|
||||
|
||||
memcpy(ATH_SAMP_DBG(nfCalHist), sc->caldata.nfCalHist,
|
||||
sizeof(ATH_SAMP_DBG(nfCalHist)));
|
||||
|
||||
sc->debug.sampidx = (sc->debug.sampidx + 1) % ATH_DBG_MAX_SAMPLES;
|
||||
spin_unlock_bh(&sc->debug.samp_lock);
|
||||
ath9k_ps_restore(sc);
|
||||
|
||||
#undef ATH_SAMP_DBG
|
||||
}
|
||||
|
||||
static int open_file_bb_mac_samps(struct inode *inode, struct file *file)
|
||||
{
|
||||
#define ATH_SAMP_DBG(c) bb_mac_samp[sampidx].c
|
||||
struct ath_softc *sc = inode->i_private;
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
struct ieee80211_conf *conf = &common->hw->conf;
|
||||
struct ath_dbg_bb_mac_samp *bb_mac_samp;
|
||||
struct ath9k_nfcal_hist *h;
|
||||
int i, j, qcuOffset = 0, dcuOffset = 0;
|
||||
u32 *qcuBase, *dcuBase, size = 30000, len = 0;
|
||||
u32 sampidx = 0;
|
||||
u8 *buf;
|
||||
u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
|
||||
u8 nread;
|
||||
|
||||
buf = vmalloc(size);
|
||||
if (!buf)
|
||||
return -ENOMEM;
|
||||
bb_mac_samp = vmalloc(sizeof(*bb_mac_samp) * ATH_DBG_MAX_SAMPLES);
|
||||
if (!bb_mac_samp) {
|
||||
vfree(buf);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
spin_lock_bh(&sc->debug.samp_lock);
|
||||
memcpy(bb_mac_samp, sc->debug.bb_mac_samp,
|
||||
sizeof(*bb_mac_samp) * ATH_DBG_MAX_SAMPLES);
|
||||
spin_unlock_bh(&sc->debug.samp_lock);
|
||||
|
||||
len += snprintf(buf + len, size - len,
|
||||
"Raw DMA Debug Dump:\n");
|
||||
len += snprintf(buf + len, size - len, "Sample |\t");
|
||||
for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++)
|
||||
len += snprintf(buf + len, size - len, " DMA Reg%d |\t", i);
|
||||
len += snprintf(buf + len, size - len, "\n");
|
||||
|
||||
for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
|
||||
len += snprintf(buf + len, size - len, "%d\t", sampidx);
|
||||
|
||||
for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++)
|
||||
len += snprintf(buf + len, size - len, " %08x\t",
|
||||
ATH_SAMP_DBG(dma_dbg_reg_vals[i]));
|
||||
len += snprintf(buf + len, size - len, "\n");
|
||||
}
|
||||
len += snprintf(buf + len, size - len, "\n");
|
||||
|
||||
len += snprintf(buf + len, size - len,
|
||||
"Sample Num QCU: chain_st fsp_ok fsp_st DCU: chain_st\n");
|
||||
for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
|
||||
qcuBase = &ATH_SAMP_DBG(dma_dbg_reg_vals[0]);
|
||||
dcuBase = &ATH_SAMP_DBG(dma_dbg_reg_vals[4]);
|
||||
|
||||
for (i = 0; i < ATH9K_NUM_QUEUES; i++,
|
||||
qcuOffset += 4, dcuOffset += 5) {
|
||||
if (i == 8) {
|
||||
qcuOffset = 0;
|
||||
qcuBase++;
|
||||
}
|
||||
|
||||
if (i == 6) {
|
||||
dcuOffset = 0;
|
||||
dcuBase++;
|
||||
}
|
||||
if (!sc->debug.stats.txstats[i].queued)
|
||||
continue;
|
||||
|
||||
len += snprintf(buf + len, size - len,
|
||||
"%4d %7d %2x %1x %2x %2x\n",
|
||||
sampidx, i,
|
||||
(*qcuBase & (0x7 << qcuOffset)) >> qcuOffset,
|
||||
(*qcuBase & (0x8 << qcuOffset)) >>
|
||||
(qcuOffset + 3),
|
||||
ATH_SAMP_DBG(dma_dbg_reg_vals[2]) &
|
||||
(0x7 << (i * 3)) >> (i * 3),
|
||||
(*dcuBase & (0x1f << dcuOffset)) >> dcuOffset);
|
||||
}
|
||||
len += snprintf(buf + len, size - len, "\n");
|
||||
}
|
||||
len += snprintf(buf + len, size - len,
|
||||
"samp qcu_sh qcu_fh qcu_comp dcu_comp dcu_arb dcu_fp "
|
||||
"ch_idle_dur ch_idle_dur_val txfifo_val0 txfifo_val1 "
|
||||
"txfifo_dcu0 txfifo_dcu1 pcu_obs AR_CR\n");
|
||||
|
||||
for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
|
||||
qcuBase = &ATH_SAMP_DBG(dma_dbg_reg_vals[0]);
|
||||
dcuBase = &ATH_SAMP_DBG(dma_dbg_reg_vals[4]);
|
||||
|
||||
len += snprintf(buf + len, size - len, "%4d %5x %5x ", sampidx,
|
||||
(ATH_SAMP_DBG(dma_dbg_reg_vals[3]) & 0x003c0000) >> 18,
|
||||
(ATH_SAMP_DBG(dma_dbg_reg_vals[3]) & 0x03c00000) >> 22);
|
||||
len += snprintf(buf + len, size - len, "%7x %8x ",
|
||||
(ATH_SAMP_DBG(dma_dbg_reg_vals[3]) & 0x1c000000) >> 26,
|
||||
(ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x3));
|
||||
len += snprintf(buf + len, size - len, "%7x %7x ",
|
||||
(ATH_SAMP_DBG(dma_dbg_reg_vals[5]) & 0x06000000) >> 25,
|
||||
(ATH_SAMP_DBG(dma_dbg_reg_vals[5]) & 0x38000000) >> 27);
|
||||
len += snprintf(buf + len, size - len, "%7d %12d ",
|
||||
(ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x000003fc) >> 2,
|
||||
(ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x00000400) >> 10);
|
||||
len += snprintf(buf + len, size - len, "%12d %12d ",
|
||||
(ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x00000800) >> 11,
|
||||
(ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x00001000) >> 12);
|
||||
len += snprintf(buf + len, size - len, "%12d %12d ",
|
||||
(ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x0001e000) >> 13,
|
||||
(ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x001e0000) >> 17);
|
||||
len += snprintf(buf + len, size - len, "0x%07x 0x%07x\n",
|
||||
ATH_SAMP_DBG(pcu_obs), ATH_SAMP_DBG(pcu_cr));
|
||||
}
|
||||
|
||||
len += snprintf(buf + len, size - len,
|
||||
"Sample ChNoise Chain privNF #Reading Readings\n");
|
||||
for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
|
||||
h = ATH_SAMP_DBG(nfCalHist);
|
||||
if (!ATH_SAMP_DBG(noise))
|
||||
continue;
|
||||
|
||||
for (i = 0; i < NUM_NF_READINGS; i++) {
|
||||
if (!(chainmask & (1 << i)) ||
|
||||
((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf)))
|
||||
continue;
|
||||
|
||||
nread = AR_PHY_CCA_FILTERWINDOW_LENGTH -
|
||||
h[i].invalidNFcount;
|
||||
len += snprintf(buf + len, size - len,
|
||||
"%4d %5d %4d\t %d\t %d\t",
|
||||
sampidx, ATH_SAMP_DBG(noise),
|
||||
i, h[i].privNF, nread);
|
||||
for (j = 0; j < nread; j++)
|
||||
len += snprintf(buf + len, size - len,
|
||||
" %d", h[i].nfCalBuffer[j]);
|
||||
len += snprintf(buf + len, size - len, "\n");
|
||||
}
|
||||
}
|
||||
len += snprintf(buf + len, size - len, "\nCycle counters:\n"
|
||||
"Sample Total Rxbusy Rxframes Txframes\n");
|
||||
for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
|
||||
if (!ATH_SAMP_DBG(cc.cycles))
|
||||
continue;
|
||||
len += snprintf(buf + len, size - len,
|
||||
"%4d %08x %08x %08x %08x\n",
|
||||
sampidx, ATH_SAMP_DBG(cc.cycles),
|
||||
ATH_SAMP_DBG(cc.rx_busy),
|
||||
ATH_SAMP_DBG(cc.rx_frame),
|
||||
ATH_SAMP_DBG(cc.tx_frame));
|
||||
}
|
||||
|
||||
len += snprintf(buf + len, size - len, "Tx status Dump :\n");
|
||||
len += snprintf(buf + len, size - len,
|
||||
"Sample rssi:- ctl0 ctl1 ctl2 ext0 ext1 ext2 comb "
|
||||
"isok rts_fail data_fail rate tid qid tx_before(ms)\n");
|
||||
for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
|
||||
for (i = 0; i < ATH_DBG_MAX_SAMPLES; i++) {
|
||||
if (!ATH_SAMP_DBG(ts[i].jiffies))
|
||||
continue;
|
||||
len += snprintf(buf + len, size - len, "%4d \t"
|
||||
"%8d %4d %4d %4d %4d %4d %4d %4d %4d "
|
||||
"%4d %4d %2d %2d %d\n",
|
||||
sampidx,
|
||||
ATH_SAMP_DBG(ts[i].rssi_ctl0),
|
||||
ATH_SAMP_DBG(ts[i].rssi_ctl1),
|
||||
ATH_SAMP_DBG(ts[i].rssi_ctl2),
|
||||
ATH_SAMP_DBG(ts[i].rssi_ext0),
|
||||
ATH_SAMP_DBG(ts[i].rssi_ext1),
|
||||
ATH_SAMP_DBG(ts[i].rssi_ext2),
|
||||
ATH_SAMP_DBG(ts[i].rssi),
|
||||
ATH_SAMP_DBG(ts[i].isok),
|
||||
ATH_SAMP_DBG(ts[i].rts_fail_cnt),
|
||||
ATH_SAMP_DBG(ts[i].data_fail_cnt),
|
||||
ATH_SAMP_DBG(ts[i].rateindex),
|
||||
ATH_SAMP_DBG(ts[i].tid),
|
||||
ATH_SAMP_DBG(ts[i].qid),
|
||||
jiffies_to_msecs(jiffies -
|
||||
ATH_SAMP_DBG(ts[i].jiffies)));
|
||||
}
|
||||
}
|
||||
|
||||
len += snprintf(buf + len, size - len, "Rx status Dump :\n");
|
||||
len += snprintf(buf + len, size - len, "Sample rssi:- ctl0 ctl1 ctl2 "
|
||||
"ext0 ext1 ext2 comb beacon ant rate rx_before(ms)\n");
|
||||
for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
|
||||
for (i = 0; i < ATH_DBG_MAX_SAMPLES; i++) {
|
||||
if (!ATH_SAMP_DBG(rs[i].jiffies))
|
||||
continue;
|
||||
len += snprintf(buf + len, size - len, "%4d \t"
|
||||
"%8d %4d %4d %4d %4d %4d %4d %s %4d %02x %d\n",
|
||||
sampidx,
|
||||
ATH_SAMP_DBG(rs[i].rssi_ctl0),
|
||||
ATH_SAMP_DBG(rs[i].rssi_ctl1),
|
||||
ATH_SAMP_DBG(rs[i].rssi_ctl2),
|
||||
ATH_SAMP_DBG(rs[i].rssi_ext0),
|
||||
ATH_SAMP_DBG(rs[i].rssi_ext1),
|
||||
ATH_SAMP_DBG(rs[i].rssi_ext2),
|
||||
ATH_SAMP_DBG(rs[i].rssi),
|
||||
ATH_SAMP_DBG(rs[i].is_mybeacon) ?
|
||||
"True" : "False",
|
||||
ATH_SAMP_DBG(rs[i].antenna),
|
||||
ATH_SAMP_DBG(rs[i].rate),
|
||||
jiffies_to_msecs(jiffies -
|
||||
ATH_SAMP_DBG(rs[i].jiffies)));
|
||||
}
|
||||
}
|
||||
|
||||
vfree(bb_mac_samp);
|
||||
file->private_data = buf;
|
||||
|
||||
return 0;
|
||||
#undef ATH_SAMP_DBG
|
||||
}
|
||||
|
||||
static const struct file_operations fops_samps = {
|
||||
.open = open_file_bb_mac_samps,
|
||||
.read = ath9k_debugfs_read_buf,
|
||||
.release = ath9k_debugfs_release_buf,
|
||||
.owner = THIS_MODULE,
|
||||
.llseek = default_llseek,
|
||||
};
|
||||
|
||||
|
||||
int ath9k_init_debug(struct ath_hw *ah)
|
||||
{
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
@@ -1321,6 +1625,8 @@ int ath9k_init_debug(struct ath_hw *ah)
|
||||
&fops_base_eeprom);
|
||||
debugfs_create_file("modal_eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
|
||||
&fops_modal_eeprom);
|
||||
debugfs_create_file("samples", S_IRUSR, sc->debug.debugfs_phy, sc,
|
||||
&fops_samps);
|
||||
|
||||
debugfs_create_u32("gpio_mask", S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, &sc->sc_ah->gpio_mask);
|
||||
@@ -1329,5 +1635,9 @@ int ath9k_init_debug(struct ath_hw *ah)
|
||||
sc->debug.debugfs_phy, &sc->sc_ah->gpio_val);
|
||||
|
||||
sc->debug.regidx = 0;
|
||||
memset(&sc->debug.bb_mac_samp, 0, sizeof(sc->debug.bb_mac_samp));
|
||||
sc->debug.sampidx = 0;
|
||||
sc->debug.tsidx = 0;
|
||||
sc->debug.rsidx = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -177,14 +177,57 @@ struct ath_stats {
|
||||
struct ath_rx_stats rxstats;
|
||||
};
|
||||
|
||||
#define ATH_DBG_MAX_SAMPLES 10
|
||||
struct ath_dbg_bb_mac_samp {
|
||||
u32 dma_dbg_reg_vals[ATH9K_NUM_DMA_DEBUG_REGS];
|
||||
u32 pcu_obs, pcu_cr, noise;
|
||||
struct {
|
||||
u64 jiffies;
|
||||
int8_t rssi_ctl0;
|
||||
int8_t rssi_ctl1;
|
||||
int8_t rssi_ctl2;
|
||||
int8_t rssi_ext0;
|
||||
int8_t rssi_ext1;
|
||||
int8_t rssi_ext2;
|
||||
int8_t rssi;
|
||||
bool isok;
|
||||
u8 rts_fail_cnt;
|
||||
u8 data_fail_cnt;
|
||||
u8 rateindex;
|
||||
u8 qid;
|
||||
u8 tid;
|
||||
} ts[ATH_DBG_MAX_SAMPLES];
|
||||
struct {
|
||||
u64 jiffies;
|
||||
int8_t rssi_ctl0;
|
||||
int8_t rssi_ctl1;
|
||||
int8_t rssi_ctl2;
|
||||
int8_t rssi_ext0;
|
||||
int8_t rssi_ext1;
|
||||
int8_t rssi_ext2;
|
||||
int8_t rssi;
|
||||
bool is_mybeacon;
|
||||
u8 antenna;
|
||||
u8 rate;
|
||||
} rs[ATH_DBG_MAX_SAMPLES];
|
||||
struct ath_cycle_counters cc;
|
||||
struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS];
|
||||
};
|
||||
|
||||
struct ath9k_debug {
|
||||
struct dentry *debugfs_phy;
|
||||
u32 regidx;
|
||||
struct ath_stats stats;
|
||||
spinlock_t samp_lock;
|
||||
struct ath_dbg_bb_mac_samp bb_mac_samp[ATH_DBG_MAX_SAMPLES];
|
||||
u8 sampidx;
|
||||
u8 tsidx;
|
||||
u8 rsidx;
|
||||
};
|
||||
|
||||
int ath9k_init_debug(struct ath_hw *ah);
|
||||
|
||||
void ath9k_debug_samp_bb_mac(struct ath_softc *sc);
|
||||
void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status);
|
||||
void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
|
||||
struct ath_tx_status *ts, struct ath_txq *txq);
|
||||
@@ -197,6 +240,10 @@ static inline int ath9k_init_debug(struct ath_hw *ah)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void ath9k_debug_samp_bb_mac(struct ath_softc *sc)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void ath_debug_stat_interrupt(struct ath_softc *sc,
|
||||
enum ath9k_int status)
|
||||
{
|
||||
|
||||
@@ -1300,6 +1300,7 @@ static void ath9k_htc_configure_filter(struct ieee80211_hw *hw,
|
||||
if (priv->op_flags & OP_INVALID) {
|
||||
ath_dbg(ath9k_hw_common(priv->ah), ATH_DBG_ANY,
|
||||
"Unable to configure filter on invalid state\n");
|
||||
mutex_unlock(&priv->mutex);
|
||||
return;
|
||||
}
|
||||
ath9k_htc_ps_wakeup(priv);
|
||||
|
||||
@@ -440,7 +440,7 @@ static void ath9k_hw_init_defaults(struct ath_hw *ah)
|
||||
if (AR_SREV_9100(ah))
|
||||
ah->sta_id1_defaults |= AR_STA_ID1_AR9100_BA_FIX;
|
||||
ah->enable_32kHz_clock = DONT_USE_32KHZ;
|
||||
ah->slottime = 20;
|
||||
ah->slottime = ATH9K_SLOT_TIME_9;
|
||||
ah->globaltxtimeout = (u32) -1;
|
||||
ah->power_mode = ATH9K_PM_UNDEFINED;
|
||||
}
|
||||
@@ -997,8 +997,14 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
|
||||
slottime = 21;
|
||||
sifstime = 64;
|
||||
} else {
|
||||
eifs = REG_READ(ah, AR_D_GBL_IFS_EIFS)/common->clockrate;
|
||||
reg = REG_READ(ah, AR_USEC);
|
||||
if (AR_SREV_9287(ah) && AR_SREV_9287_13_OR_LATER(ah)) {
|
||||
eifs = AR_D_GBL_IFS_EIFS_ASYNC_FIFO;
|
||||
reg = AR_USEC_ASYNC_FIFO;
|
||||
} else {
|
||||
eifs = REG_READ(ah, AR_D_GBL_IFS_EIFS)/
|
||||
common->clockrate;
|
||||
reg = REG_READ(ah, AR_USEC);
|
||||
}
|
||||
rx_lat = MS(reg, AR_USEC_RX_LAT);
|
||||
tx_lat = MS(reg, AR_USEC_TX_LAT);
|
||||
|
||||
@@ -2754,6 +2760,7 @@ static struct {
|
||||
{ AR_SREV_VERSION_9271, "9271" },
|
||||
{ AR_SREV_VERSION_9300, "9300" },
|
||||
{ AR_SREV_VERSION_9330, "9330" },
|
||||
{ AR_SREV_VERSION_9340, "9340" },
|
||||
{ AR_SREV_VERSION_9485, "9485" },
|
||||
};
|
||||
|
||||
|
||||
@@ -623,7 +623,7 @@ struct ath_hw_ops {
|
||||
struct ath_tx_status *ts);
|
||||
void (*set11n_txdesc)(struct ath_hw *ah, void *ds,
|
||||
u32 pktLen, enum ath9k_pkt_type type,
|
||||
u32 txPower, u32 keyIx,
|
||||
u32 txPower, u8 keyIx,
|
||||
enum ath9k_key_type keyType,
|
||||
u32 flags);
|
||||
void (*set11n_ratescenario)(struct ath_hw *ah, void *ds,
|
||||
|
||||
@@ -572,6 +572,7 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
|
||||
mutex_init(&sc->mutex);
|
||||
#ifdef CONFIG_ATH9K_DEBUGFS
|
||||
spin_lock_init(&sc->nodes_lock);
|
||||
spin_lock_init(&sc->debug.samp_lock);
|
||||
INIT_LIST_HEAD(&sc->nodes);
|
||||
#endif
|
||||
tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
|
||||
|
||||
@@ -146,6 +146,7 @@ struct ath_rx_status {
|
||||
u8 rs_moreaggr;
|
||||
u8 rs_num_delims;
|
||||
u8 rs_flags;
|
||||
bool is_mybeacon;
|
||||
u32 evm0;
|
||||
u32 evm1;
|
||||
u32 evm2;
|
||||
@@ -194,7 +195,7 @@ struct ath_htc_rx_status {
|
||||
#define ATH9K_RX_DECRYPT_BUSY 0x40
|
||||
|
||||
#define ATH9K_RXKEYIX_INVALID ((u8)-1)
|
||||
#define ATH9K_TXKEYIX_INVALID ((u32)-1)
|
||||
#define ATH9K_TXKEYIX_INVALID ((u8)-1)
|
||||
|
||||
enum ath9k_phyerr {
|
||||
ATH9K_PHYERR_UNDERRUN = 0, /* Transmit underrun */
|
||||
|
||||
@@ -546,6 +546,7 @@ set_timer:
|
||||
* The interval must be the shortest necessary to satisfy ANI,
|
||||
* short calibration and long calibration.
|
||||
*/
|
||||
ath9k_debug_samp_bb_mac(sc);
|
||||
cal_interval = ATH_LONG_CALINTERVAL;
|
||||
if (sc->sc_ah->config.enable_ani)
|
||||
cal_interval = min(cal_interval,
|
||||
@@ -978,6 +979,7 @@ int ath_reset(struct ath_softc *sc, bool retry_tx)
|
||||
|
||||
sc->hw_busy_count = 0;
|
||||
|
||||
ath9k_debug_samp_bb_mac(sc);
|
||||
/* Stop ANI */
|
||||
|
||||
del_timer_sync(&common->ani.timer);
|
||||
|
||||
@@ -937,7 +937,7 @@ static int ath9k_process_rate(struct ath_common *common,
|
||||
* No valid hardware bitrate found -- we should not get here
|
||||
* because hardware has already validated this frame as OK.
|
||||
*/
|
||||
ath_dbg(common, ATH_DBG_XMIT,
|
||||
ath_dbg(common, ATH_DBG_ANY,
|
||||
"unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
|
||||
rx_stats->rs_rate);
|
||||
|
||||
@@ -952,23 +952,12 @@ static void ath9k_process_rssi(struct ath_common *common,
|
||||
struct ath_softc *sc = hw->priv;
|
||||
struct ath_hw *ah = common->ah;
|
||||
int last_rssi;
|
||||
__le16 fc;
|
||||
|
||||
if ((ah->opmode != NL80211_IFTYPE_STATION) &&
|
||||
(ah->opmode != NL80211_IFTYPE_ADHOC))
|
||||
if (!rx_stats->is_mybeacon ||
|
||||
((ah->opmode != NL80211_IFTYPE_STATION) &&
|
||||
(ah->opmode != NL80211_IFTYPE_ADHOC)))
|
||||
return;
|
||||
|
||||
fc = hdr->frame_control;
|
||||
if (!ieee80211_is_beacon(fc) ||
|
||||
compare_ether_addr(hdr->addr3, common->curbssid)) {
|
||||
/* TODO: This doesn't work well if you have stations
|
||||
* associated to two different APs because curbssid
|
||||
* is just the last AP that any of the stations associated
|
||||
* with.
|
||||
*/
|
||||
return;
|
||||
}
|
||||
|
||||
if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
|
||||
ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi);
|
||||
|
||||
@@ -1838,6 +1827,11 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
|
||||
|
||||
hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len);
|
||||
rxs = IEEE80211_SKB_RXCB(hdr_skb);
|
||||
if (ieee80211_is_beacon(hdr->frame_control) &&
|
||||
!compare_ether_addr(hdr->addr3, common->curbssid))
|
||||
rs.is_mybeacon = true;
|
||||
else
|
||||
rs.is_mybeacon = false;
|
||||
|
||||
ath_debug_stat_rx(sc, &rs);
|
||||
|
||||
|
||||
@@ -619,6 +619,7 @@
|
||||
#define AR_D_GBL_IFS_EIFS 0x10b0
|
||||
#define AR_D_GBL_IFS_EIFS_M 0x0000FFFF
|
||||
#define AR_D_GBL_IFS_EIFS_RESV0 0xFFFF0000
|
||||
#define AR_D_GBL_IFS_EIFS_ASYNC_FIFO 363
|
||||
|
||||
#define AR_D_GBL_IFS_MISC 0x10f0
|
||||
#define AR_D_GBL_IFS_MISC_LFSR_SLICE_SEL 0x00000007
|
||||
@@ -1503,6 +1504,7 @@ enum {
|
||||
#define AR_USEC_TX_LAT_S 14
|
||||
#define AR_USEC_RX_LAT 0x1F800000
|
||||
#define AR_USEC_RX_LAT_S 23
|
||||
#define AR_USEC_ASYNC_FIFO 0x12E00074
|
||||
|
||||
#define AR_RESET_TSF 0x8020
|
||||
#define AR_RESET_TSF_ONCE 0x01000000
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -57,22 +57,18 @@ struct sk_buff *ath_rxbuf_alloc(struct ath_common *common,
|
||||
}
|
||||
EXPORT_SYMBOL(ath_rxbuf_alloc);
|
||||
|
||||
int ath_printk(const char *level, struct ath_common *common,
|
||||
const char *fmt, ...)
|
||||
void ath_printk(const char *level, const char *fmt, ...)
|
||||
{
|
||||
struct va_format vaf;
|
||||
va_list args;
|
||||
int rtn;
|
||||
|
||||
va_start(args, fmt);
|
||||
|
||||
vaf.fmt = fmt;
|
||||
vaf.va = &args;
|
||||
|
||||
rtn = printk("%sath: %pV", level, &vaf);
|
||||
printk("%sath: %pV", level, &vaf);
|
||||
|
||||
va_end(args);
|
||||
|
||||
return rtn;
|
||||
}
|
||||
EXPORT_SYMBOL(ath_printk);
|
||||
|
||||
@@ -124,12 +124,12 @@ config B43_PHY_LP
|
||||
(802.11a support is optional, and currently disabled).
|
||||
|
||||
config B43_PHY_HT
|
||||
bool "Support for HT-PHY devices (BROKEN)"
|
||||
depends on B43 && BROKEN
|
||||
bool "Support for HT-PHY (high throughput) devices (EXPERIMENTAL)"
|
||||
depends on B43 && EXPERIMENTAL
|
||||
---help---
|
||||
Support for the HT-PHY.
|
||||
|
||||
Say N, this is BROKEN and crashes driver.
|
||||
Enables support for BCM4331 and possibly other chipsets with that PHY.
|
||||
|
||||
config B43_PHY_LCN
|
||||
bool "Support for LCN-PHY devices (BROKEN)"
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user