mirror of
https://github.com/armbian/linux.git
synced 2026-01-06 10:13:00 -08:00
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
* 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6: [SPARC64]: Fix show_stack() when stack argument is NULL. [SPARC]: Fix serial console node string creation. [SPARC]: Mark SBUS framebuffer ioctls as IGNORE in compat_ioctl.c [SPARC64]: asm-sparc64/floppy.h needs linux/pci.h [SPARC64]: Fix conflicts in SBUS/PCI/EBUS/ISA DMA handling. [VIDEO]: Fix OOPS in all SBUS framebuffer drivers. [SPARC64]: Handle mostek clock type in mini_rtc driver. [PARTITION]: Sun/Solaris VTOC table corrections [SPARC]: Fix floppy on some sun4c systems. [SPARC64]: Fix sun4u PCI config space accesses on sun4u. [PARTITION] MSDOS: Fix Sun num_partitions handling. [SPARC]: Update defconfig.
This commit is contained in:
@@ -1,12 +1,14 @@
|
||||
#
|
||||
# Automatically generated make config: don't edit
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||||
# Linux kernel version: 2.6.22-rc1
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||||
# Mon May 14 03:25:14 2007
|
||||
# Linux kernel version: 2.6.23-rc1
|
||||
# Wed Jul 25 15:30:21 2007
|
||||
#
|
||||
CONFIG_MMU=y
|
||||
CONFIG_HIGHMEM=y
|
||||
CONFIG_ZONE_DMA=y
|
||||
CONFIG_GENERIC_ISA_DMA=y
|
||||
CONFIG_ARCH_NO_VIRT_TO_BUS=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
|
||||
#
|
||||
@@ -23,12 +25,11 @@ CONFIG_LOCALVERSION=""
|
||||
CONFIG_LOCALVERSION_AUTO=y
|
||||
CONFIG_SWAP=y
|
||||
CONFIG_SYSVIPC=y
|
||||
# CONFIG_IPC_NS is not set
|
||||
CONFIG_SYSVIPC_SYSCTL=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
# CONFIG_TASKSTATS is not set
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_USER_NS is not set
|
||||
# CONFIG_AUDIT is not set
|
||||
# CONFIG_IKCONFIG is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
@@ -63,24 +64,17 @@ CONFIG_SLAB=y
|
||||
CONFIG_RT_MUTEXES=y
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
CONFIG_BASE_SMALL=0
|
||||
|
||||
#
|
||||
# Loadable module support
|
||||
#
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_KMOD=y
|
||||
|
||||
#
|
||||
# Block layer
|
||||
#
|
||||
CONFIG_BLOCK=y
|
||||
# CONFIG_LBD is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_LSF is not set
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
@@ -113,11 +107,14 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
|
||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
|
||||
CONFIG_EMULATED_CMPXCHG=y
|
||||
CONFIG_SUN_PM=y
|
||||
# CONFIG_SUN4 is not set
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_SYSCALL=y
|
||||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||
# CONFIG_PCI_DEBUG is not set
|
||||
# CONFIG_NO_DMA is not set
|
||||
CONFIG_SUN_OPENPROMFS=m
|
||||
# CONFIG_SPARC_LED is not set
|
||||
CONFIG_BINFMT_ELF=y
|
||||
@@ -134,6 +131,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4
|
||||
# CONFIG_RESOURCES_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=1
|
||||
CONFIG_BOUNCE=y
|
||||
|
||||
#
|
||||
# Networking
|
||||
@@ -197,25 +195,13 @@ CONFIG_IPV6_TUNNEL=m
|
||||
# CONFIG_IPV6_MULTIPLE_TABLES is not set
|
||||
# CONFIG_NETWORK_SECMARK is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
|
||||
#
|
||||
# DCCP Configuration (EXPERIMENTAL)
|
||||
#
|
||||
# CONFIG_IP_DCCP is not set
|
||||
|
||||
#
|
||||
# SCTP Configuration (EXPERIMENTAL)
|
||||
#
|
||||
CONFIG_IP_SCTP=m
|
||||
# CONFIG_SCTP_DBG_MSG is not set
|
||||
CONFIG_SCTP_DBG_OBJCNT=y
|
||||
# CONFIG_SCTP_HMAC_NONE is not set
|
||||
# CONFIG_SCTP_HMAC_SHA1 is not set
|
||||
CONFIG_SCTP_HMAC_MD5=y
|
||||
|
||||
#
|
||||
# TIPC Configuration (EXPERIMENTAL)
|
||||
#
|
||||
# CONFIG_TIPC is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
@@ -253,6 +239,7 @@ CONFIG_AF_RXRPC=m
|
||||
# CONFIG_MAC80211 is not set
|
||||
# CONFIG_IEEE80211 is not set
|
||||
# CONFIG_RFKILL is not set
|
||||
# CONFIG_NET_9P is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
@@ -267,28 +254,12 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
|
||||
# CONFIG_DEBUG_DRIVER is not set
|
||||
# CONFIG_DEBUG_DEVRES is not set
|
||||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
|
||||
#
|
||||
# Connector - unified userspace <-> kernelspace linker
|
||||
#
|
||||
# CONFIG_CONNECTOR is not set
|
||||
# CONFIG_MTD is not set
|
||||
|
||||
#
|
||||
# Parallel port support
|
||||
#
|
||||
CONFIG_OF_DEVICE=y
|
||||
# CONFIG_PARPORT is not set
|
||||
|
||||
#
|
||||
# Plug and Play support
|
||||
#
|
||||
# CONFIG_PNPACPI is not set
|
||||
|
||||
#
|
||||
# Block devices
|
||||
#
|
||||
CONFIG_BLK_DEV=y
|
||||
# CONFIG_BLK_DEV_FD is not set
|
||||
# CONFIG_BLK_CPQ_DA is not set
|
||||
# CONFIG_BLK_CPQ_CISS_DA is not set
|
||||
# CONFIG_BLK_DEV_DAC960 is not set
|
||||
# CONFIG_BLK_DEV_UMEM is not set
|
||||
@@ -303,18 +274,11 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
# CONFIG_ATA_OVER_ETH is not set
|
||||
|
||||
#
|
||||
# Misc devices
|
||||
#
|
||||
CONFIG_MISC_DEVICES=y
|
||||
# CONFIG_PHANTOM is not set
|
||||
# CONFIG_EEPROM_93CX6 is not set
|
||||
# CONFIG_SGI_IOC4 is not set
|
||||
# CONFIG_TIFM_CORE is not set
|
||||
# CONFIG_BLINK is not set
|
||||
|
||||
#
|
||||
# ATA/ATAPI/MFM/RLL support
|
||||
#
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
#
|
||||
@@ -322,6 +286,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
|
||||
#
|
||||
# CONFIG_RAID_ATTRS is not set
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_SCSI_DMA=y
|
||||
# CONFIG_SCSI_TGT is not set
|
||||
# CONFIG_SCSI_NETLINK is not set
|
||||
CONFIG_SCSI_PROC_FS=y
|
||||
@@ -352,12 +317,8 @@ CONFIG_SCSI_WAIT_SCAN=m
|
||||
CONFIG_SCSI_SPI_ATTRS=y
|
||||
# CONFIG_SCSI_FC_ATTRS is not set
|
||||
# CONFIG_SCSI_ISCSI_ATTRS is not set
|
||||
# CONFIG_SCSI_SAS_ATTRS is not set
|
||||
# CONFIG_SCSI_SAS_LIBSAS is not set
|
||||
|
||||
#
|
||||
# SCSI low-level drivers
|
||||
#
|
||||
CONFIG_SCSI_LOWLEVEL=y
|
||||
# CONFIG_ISCSI_TCP is not set
|
||||
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
|
||||
# CONFIG_SCSI_3W_9XXX is not set
|
||||
@@ -367,7 +328,6 @@ CONFIG_SCSI_SPI_ATTRS=y
|
||||
# CONFIG_SCSI_AIC7XXX_OLD is not set
|
||||
# CONFIG_SCSI_AIC79XX is not set
|
||||
# CONFIG_SCSI_AIC94XX is not set
|
||||
# CONFIG_SCSI_DPT_I2O is not set
|
||||
# CONFIG_SCSI_ARCMSR is not set
|
||||
# CONFIG_MEGARAID_NEWGEN is not set
|
||||
# CONFIG_MEGARAID_LEGACY is not set
|
||||
@@ -389,14 +349,9 @@ CONFIG_SCSI_QLOGICPTI=m
|
||||
# CONFIG_SCSI_DC390T is not set
|
||||
# CONFIG_SCSI_NSP32 is not set
|
||||
# CONFIG_SCSI_DEBUG is not set
|
||||
CONFIG_SCSI_ESP_CORE=y
|
||||
CONFIG_SCSI_SUNESP=y
|
||||
# CONFIG_SCSI_SRP is not set
|
||||
# CONFIG_ATA is not set
|
||||
|
||||
#
|
||||
# Multi-device support (RAID and LVM)
|
||||
#
|
||||
# CONFIG_MD is not set
|
||||
|
||||
#
|
||||
@@ -412,30 +367,16 @@ CONFIG_SCSI_SUNESP=y
|
||||
#
|
||||
# CONFIG_FIREWIRE is not set
|
||||
# CONFIG_IEEE1394 is not set
|
||||
|
||||
#
|
||||
# I2O device support
|
||||
#
|
||||
# CONFIG_I2O is not set
|
||||
|
||||
#
|
||||
# Network device support
|
||||
#
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_NETDEVICES_MULTIQUEUE is not set
|
||||
CONFIG_DUMMY=m
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_MACVLAN is not set
|
||||
# CONFIG_EQUALIZER is not set
|
||||
CONFIG_TUN=m
|
||||
|
||||
#
|
||||
# ARCnet devices
|
||||
#
|
||||
# CONFIG_ARCNET is not set
|
||||
# CONFIG_PHYLIB is not set
|
||||
|
||||
#
|
||||
# Ethernet (10 or 100Mbit)
|
||||
#
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_MII=m
|
||||
CONFIG_SUNLANCE=y
|
||||
@@ -445,10 +386,6 @@ CONFIG_SUNQE=m
|
||||
# CONFIG_SUNGEM is not set
|
||||
# CONFIG_CASSINI is not set
|
||||
# CONFIG_NET_VENDOR_3COM is not set
|
||||
|
||||
#
|
||||
# Tulip family network device support
|
||||
#
|
||||
# CONFIG_NET_TULIP is not set
|
||||
# CONFIG_HP100 is not set
|
||||
# CONFIG_NET_PCI is not set
|
||||
@@ -464,7 +401,7 @@ CONFIG_NETDEV_1000=y
|
||||
# CONFIG_SIS190 is not set
|
||||
# CONFIG_SKGE is not set
|
||||
# CONFIG_SKY2 is not set
|
||||
# CONFIG_SK98LIN is not set
|
||||
# CONFIG_VIA_VELOCITY is not set
|
||||
# CONFIG_TIGON3 is not set
|
||||
# CONFIG_BNX2 is not set
|
||||
# CONFIG_QLA3XXX is not set
|
||||
@@ -477,11 +414,6 @@ CONFIG_NETDEV_10000=y
|
||||
# CONFIG_MYRI10GE is not set
|
||||
# CONFIG_NETXEN_NIC is not set
|
||||
# CONFIG_MLX4_CORE is not set
|
||||
CONFIG_MLX4_DEBUG=y
|
||||
|
||||
#
|
||||
# Token Ring devices
|
||||
#
|
||||
# CONFIG_TR is not set
|
||||
|
||||
#
|
||||
@@ -499,15 +431,7 @@ CONFIG_MLX4_DEBUG=y
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
|
||||
#
|
||||
# ISDN subsystem
|
||||
#
|
||||
# CONFIG_ISDN is not set
|
||||
|
||||
#
|
||||
# Telephony Support
|
||||
#
|
||||
# CONFIG_PHONE is not set
|
||||
|
||||
#
|
||||
@@ -515,6 +439,7 @@ CONFIG_MLX4_DEBUG=y
|
||||
#
|
||||
CONFIG_INPUT=y
|
||||
# CONFIG_INPUT_FF_MEMLESS is not set
|
||||
# CONFIG_INPUT_POLLDEV is not set
|
||||
|
||||
#
|
||||
# Userland interfaces
|
||||
@@ -593,22 +518,13 @@ CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
|
||||
#
|
||||
# IPMI
|
||||
#
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
CONFIG_HW_RANDOM=m
|
||||
CONFIG_JS_RTC=m
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_APPLICOM is not set
|
||||
# CONFIG_DRM is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
|
||||
#
|
||||
# TPM devices
|
||||
#
|
||||
# CONFIG_TCG_TPM is not set
|
||||
CONFIG_DEVPORT=y
|
||||
# CONFIG_I2C is not set
|
||||
@@ -618,20 +534,24 @@ CONFIG_DEVPORT=y
|
||||
#
|
||||
# CONFIG_SPI is not set
|
||||
# CONFIG_SPI_MASTER is not set
|
||||
|
||||
#
|
||||
# Dallas's 1-wire bus
|
||||
#
|
||||
# CONFIG_W1 is not set
|
||||
# CONFIG_POWER_SUPPLY is not set
|
||||
CONFIG_HWMON=y
|
||||
# CONFIG_HWMON_VID is not set
|
||||
# CONFIG_SENSORS_ABITUGURU is not set
|
||||
# CONFIG_SENSORS_ABITUGURU3 is not set
|
||||
# CONFIG_SENSORS_F71805F is not set
|
||||
# CONFIG_SENSORS_IT87 is not set
|
||||
# CONFIG_SENSORS_PC87360 is not set
|
||||
# CONFIG_SENSORS_PC87427 is not set
|
||||
# CONFIG_SENSORS_SIS5595 is not set
|
||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||
# CONFIG_SENSORS_VIA686A is not set
|
||||
# CONFIG_SENSORS_VT1211 is not set
|
||||
# CONFIG_SENSORS_VT8231 is not set
|
||||
# CONFIG_SENSORS_W83627HF is not set
|
||||
# CONFIG_SENSORS_W83627EHF is not set
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
|
||||
#
|
||||
@@ -656,6 +576,7 @@ CONFIG_HWMON=y
|
||||
#
|
||||
# CONFIG_DISPLAY_SUPPORT is not set
|
||||
# CONFIG_VGASTATE is not set
|
||||
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
|
||||
# CONFIG_FB is not set
|
||||
|
||||
#
|
||||
@@ -668,16 +589,10 @@ CONFIG_DUMMY_CONSOLE=y
|
||||
# Sound
|
||||
#
|
||||
# CONFIG_SOUND is not set
|
||||
|
||||
#
|
||||
# HID Devices
|
||||
#
|
||||
CONFIG_HID_SUPPORT=y
|
||||
CONFIG_HID=y
|
||||
# CONFIG_HID_DEBUG is not set
|
||||
|
||||
#
|
||||
# USB support
|
||||
#
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_ARCH_HAS_HCD=y
|
||||
CONFIG_USB_ARCH_HAS_OHCI=y
|
||||
CONFIG_USB_ARCH_HAS_EHCI=y
|
||||
@@ -692,29 +607,9 @@ CONFIG_USB_ARCH_HAS_EHCI=y
|
||||
#
|
||||
# CONFIG_USB_GADGET is not set
|
||||
# CONFIG_MMC is not set
|
||||
|
||||
#
|
||||
# LED devices
|
||||
#
|
||||
# CONFIG_NEW_LEDS is not set
|
||||
|
||||
#
|
||||
# LED drivers
|
||||
#
|
||||
|
||||
#
|
||||
# LED Triggers
|
||||
#
|
||||
|
||||
#
|
||||
# InfiniBand support
|
||||
#
|
||||
# CONFIG_INFINIBAND is not set
|
||||
|
||||
#
|
||||
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
|
||||
#
|
||||
|
||||
#
|
||||
# Real Time Clock
|
||||
#
|
||||
@@ -733,6 +628,11 @@ CONFIG_USB_ARCH_HAS_EHCI=y
|
||||
# DMA Devices
|
||||
#
|
||||
|
||||
#
|
||||
# Userspace I/O
|
||||
#
|
||||
# CONFIG_UIO is not set
|
||||
|
||||
#
|
||||
# Misc Linux/SPARC drivers
|
||||
#
|
||||
@@ -853,7 +753,6 @@ CONFIG_CIFS=m
|
||||
# CONFIG_CODA_FS is not set
|
||||
CONFIG_AFS_FS=m
|
||||
# CONFIG_AFS_DEBUG is not set
|
||||
# CONFIG_9P_FS is not set
|
||||
|
||||
#
|
||||
# Partition Types
|
||||
@@ -927,6 +826,7 @@ CONFIG_MAGIC_SYSRQ=y
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
CONFIG_DETECT_SOFTLOCKUP=y
|
||||
# CONFIG_SCHED_DEBUG is not set
|
||||
# CONFIG_SCHEDSTATS is not set
|
||||
# CONFIG_TIMER_STATS is not set
|
||||
# CONFIG_DEBUG_SLAB is not set
|
||||
@@ -953,10 +853,6 @@ CONFIG_FORCED_INLINING=y
|
||||
CONFIG_KEYS=y
|
||||
# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
|
||||
# CONFIG_SECURITY is not set
|
||||
|
||||
#
|
||||
# Cryptographic options
|
||||
#
|
||||
CONFIG_CRYPTO=y
|
||||
CONFIG_CRYPTO_ALGAPI=y
|
||||
CONFIG_CRYPTO_BLKCIPHER=y
|
||||
@@ -996,10 +892,7 @@ CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_CRC32C=m
|
||||
# CONFIG_CRYPTO_CAMELLIA is not set
|
||||
# CONFIG_CRYPTO_TEST is not set
|
||||
|
||||
#
|
||||
# Hardware crypto devices
|
||||
#
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
|
||||
#
|
||||
# Library routines
|
||||
@@ -1009,6 +902,7 @@ CONFIG_BITREVERSE=y
|
||||
# CONFIG_CRC16 is not set
|
||||
# CONFIG_CRC_ITU_T is not set
|
||||
CONFIG_CRC32=y
|
||||
# CONFIG_CRC7 is not set
|
||||
CONFIG_LIBCRC32C=m
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
|
||||
@@ -415,7 +415,7 @@ static void __init of_console_init(void)
|
||||
unsigned long flags;
|
||||
const char *type;
|
||||
phandle node;
|
||||
int skip, fd;
|
||||
int skip, tmp, fd;
|
||||
|
||||
of_console_path = prom_early_alloc(256);
|
||||
|
||||
@@ -442,8 +442,9 @@ static void __init of_console_init(void)
|
||||
prom_halt();
|
||||
}
|
||||
|
||||
tmp = skip;
|
||||
for_each_node_by_type(dp, type) {
|
||||
if (!skip--)
|
||||
if (!tmp--)
|
||||
break;
|
||||
}
|
||||
if (!dp) {
|
||||
|
||||
@@ -8,14 +8,14 @@ EXTRA_CFLAGS := -Werror
|
||||
extra-y := head.o init_task.o vmlinux.lds
|
||||
|
||||
obj-y := process.o setup.o cpu.o idprom.o \
|
||||
traps.o auxio.o una_asm.o sysfs.o \
|
||||
traps.o auxio.o una_asm.o sysfs.o iommu.o \
|
||||
irq.o ptrace.o time.o sys_sparc.o signal.o \
|
||||
unaligned.o central.o pci.o starfire.o semaphore.o \
|
||||
power.o sbus.o iommu_common.o sparc64_ksyms.o chmc.o \
|
||||
visemul.o prom.o of_device.o hvapi.o sstate.o mdesc.o
|
||||
|
||||
obj-$(CONFIG_STACKTRACE) += stacktrace.o
|
||||
obj-$(CONFIG_PCI) += ebus.o isa.o pci_common.o pci_iommu.o \
|
||||
obj-$(CONFIG_PCI) += ebus.o isa.o pci_common.o \
|
||||
pci_psycho.o pci_sabre.o pci_schizo.o \
|
||||
pci_sun4v.o pci_sun4v_asm.o pci_fire.o
|
||||
obj-$(CONFIG_SMP) += smp.o trampoline.o hvtramp.o
|
||||
|
||||
@@ -391,6 +391,8 @@ static void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_de
|
||||
sd = &dev->ofdev.dev.archdata;
|
||||
sd->prom_node = dp;
|
||||
sd->op = &dev->ofdev;
|
||||
sd->iommu = dev->bus->ofdev.dev.parent->archdata.iommu;
|
||||
sd->stc = dev->bus->ofdev.dev.parent->archdata.stc;
|
||||
|
||||
dev->ofdev.node = dp;
|
||||
dev->ofdev.dev.parent = &dev->bus->ofdev.dev;
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -90,6 +90,8 @@ static void __init isa_fill_devices(struct sparc_isa_bridge *isa_br)
|
||||
sd = &isa_dev->ofdev.dev.archdata;
|
||||
sd->prom_node = dp;
|
||||
sd->op = &isa_dev->ofdev;
|
||||
sd->iommu = isa_br->ofdev.dev.parent->archdata.iommu;
|
||||
sd->stc = isa_br->ofdev.dev.parent->archdata.stc;
|
||||
|
||||
isa_dev->ofdev.node = dp;
|
||||
isa_dev->ofdev.dev.parent = &isa_br->ofdev.dev;
|
||||
|
||||
@@ -283,12 +283,6 @@ int __init pcic_present(void)
|
||||
return pci_controller_scan(pci_is_controller);
|
||||
}
|
||||
|
||||
const struct pci_iommu_ops *pci_iommu_ops;
|
||||
EXPORT_SYMBOL(pci_iommu_ops);
|
||||
|
||||
extern const struct pci_iommu_ops pci_sun4u_iommu_ops,
|
||||
pci_sun4v_iommu_ops;
|
||||
|
||||
/* Find each controller in the system, attach and initialize
|
||||
* software state structure for each and link into the
|
||||
* pci_pbm_root. Setup the controller enough such
|
||||
@@ -296,11 +290,6 @@ extern const struct pci_iommu_ops pci_sun4u_iommu_ops,
|
||||
*/
|
||||
static void __init pci_controller_probe(void)
|
||||
{
|
||||
if (tlb_type == hypervisor)
|
||||
pci_iommu_ops = &pci_sun4v_iommu_ops;
|
||||
else
|
||||
pci_iommu_ops = &pci_sun4u_iommu_ops;
|
||||
|
||||
printk("PCI: Probing for controllers.\n");
|
||||
|
||||
pci_controller_scan(pci_controller_init);
|
||||
@@ -406,6 +395,10 @@ struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm,
|
||||
sd->op = of_find_device_by_node(node);
|
||||
sd->msi_num = 0xffffffff;
|
||||
|
||||
sd = &sd->op->dev.archdata;
|
||||
sd->iommu = pbm->iommu;
|
||||
sd->stc = &pbm->stc;
|
||||
|
||||
type = of_get_property(node, "device_type", NULL);
|
||||
if (type == NULL)
|
||||
type = "";
|
||||
@@ -422,10 +415,15 @@ struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm,
|
||||
dev->multifunction = 0; /* maybe a lie? */
|
||||
|
||||
if (host_controller) {
|
||||
dev->vendor = 0x108e;
|
||||
dev->device = 0x8000;
|
||||
dev->subsystem_vendor = 0x0000;
|
||||
dev->subsystem_device = 0x0000;
|
||||
if (tlb_type != hypervisor) {
|
||||
pci_read_config_word(dev, PCI_VENDOR_ID,
|
||||
&dev->vendor);
|
||||
pci_read_config_word(dev, PCI_DEVICE_ID,
|
||||
&dev->device);
|
||||
} else {
|
||||
dev->vendor = PCI_VENDOR_ID_SUN;
|
||||
dev->device = 0x80f0;
|
||||
}
|
||||
dev->cfg_size = 256;
|
||||
dev->class = PCI_CLASS_BRIDGE_HOST << 8;
|
||||
sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus),
|
||||
@@ -818,7 +816,7 @@ int pci_host_bridge_read_pci_cfg(struct pci_bus *bus_dev,
|
||||
{
|
||||
static u8 fake_pci_config[] = {
|
||||
0x8e, 0x10, /* Vendor: 0x108e (Sun) */
|
||||
0x00, 0x80, /* Device: 0x8000 (PBM) */
|
||||
0xf0, 0x80, /* Device: 0x80f0 (Fire) */
|
||||
0x46, 0x01, /* Command: 0x0146 (SERR, PARITY, MASTER, MEM) */
|
||||
0xa0, 0x22, /* Status: 0x02a0 (DEVSEL_MED, FB2B, 66MHZ) */
|
||||
0x00, 0x00, 0x00, 0x06, /* Class: 0x06000000 host bridge */
|
||||
@@ -1221,4 +1219,51 @@ struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
|
||||
}
|
||||
EXPORT_SYMBOL(pci_device_to_OF_node);
|
||||
|
||||
static void ali_sound_dma_hack(struct pci_dev *pdev, int set_bit)
|
||||
{
|
||||
struct pci_dev *ali_isa_bridge;
|
||||
u8 val;
|
||||
|
||||
/* ALI sound chips generate 31-bits of DMA, a special register
|
||||
* determines what bit 31 is emitted as.
|
||||
*/
|
||||
ali_isa_bridge = pci_get_device(PCI_VENDOR_ID_AL,
|
||||
PCI_DEVICE_ID_AL_M1533,
|
||||
NULL);
|
||||
|
||||
pci_read_config_byte(ali_isa_bridge, 0x7e, &val);
|
||||
if (set_bit)
|
||||
val |= 0x01;
|
||||
else
|
||||
val &= ~0x01;
|
||||
pci_write_config_byte(ali_isa_bridge, 0x7e, val);
|
||||
pci_dev_put(ali_isa_bridge);
|
||||
}
|
||||
|
||||
int pci_dma_supported(struct pci_dev *pdev, u64 device_mask)
|
||||
{
|
||||
u64 dma_addr_mask;
|
||||
|
||||
if (pdev == NULL) {
|
||||
dma_addr_mask = 0xffffffff;
|
||||
} else {
|
||||
struct iommu *iommu = pdev->dev.archdata.iommu;
|
||||
|
||||
dma_addr_mask = iommu->dma_addr_mask;
|
||||
|
||||
if (pdev->vendor == PCI_VENDOR_ID_AL &&
|
||||
pdev->device == PCI_DEVICE_ID_AL_M5451 &&
|
||||
device_mask == 0x7fffffff) {
|
||||
ali_sound_dma_hack(pdev,
|
||||
(dma_addr_mask & 0x80000000) != 0);
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
if (device_mask >= (1UL << 32UL))
|
||||
return 0;
|
||||
|
||||
return (device_mask & dma_addr_mask) == dma_addr_mask;
|
||||
}
|
||||
|
||||
#endif /* !(CONFIG_PCI) */
|
||||
|
||||
@@ -44,6 +44,67 @@ static void *sun4u_config_mkaddr(struct pci_pbm_info *pbm,
|
||||
return (void *) (pbm->config_space | bus | devfn | reg);
|
||||
}
|
||||
|
||||
/* At least on Sabre, it is necessary to access all PCI host controller
|
||||
* registers at their natural size, otherwise zeros are returned.
|
||||
* Strange but true, and I see no language in the UltraSPARC-IIi
|
||||
* programmer's manual that mentions this even indirectly.
|
||||
*/
|
||||
static int sun4u_read_pci_cfg_host(struct pci_pbm_info *pbm,
|
||||
unsigned char bus, unsigned int devfn,
|
||||
int where, int size, u32 *value)
|
||||
{
|
||||
u32 tmp32, *addr;
|
||||
u16 tmp16;
|
||||
u8 tmp8;
|
||||
|
||||
addr = sun4u_config_mkaddr(pbm, bus, devfn, where);
|
||||
if (!addr)
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
|
||||
switch (size) {
|
||||
case 1:
|
||||
if (where < 8) {
|
||||
unsigned long align = (unsigned long) addr;
|
||||
|
||||
align &= ~1;
|
||||
pci_config_read16((u16 *)align, &tmp16);
|
||||
if (where & 1)
|
||||
*value = tmp16 >> 8;
|
||||
else
|
||||
*value = tmp16 & 0xff;
|
||||
} else {
|
||||
pci_config_read8((u8 *)addr, &tmp8);
|
||||
*value = (u32) tmp8;
|
||||
}
|
||||
break;
|
||||
|
||||
case 2:
|
||||
if (where < 8) {
|
||||
pci_config_read16((u16 *)addr, &tmp16);
|
||||
*value = (u32) tmp16;
|
||||
} else {
|
||||
pci_config_read8((u8 *)addr, &tmp8);
|
||||
*value = (u32) tmp8;
|
||||
pci_config_read8(((u8 *)addr) + 1, &tmp8);
|
||||
*value |= ((u32) tmp8) << 8;
|
||||
}
|
||||
break;
|
||||
|
||||
case 4:
|
||||
tmp32 = 0xffffffff;
|
||||
sun4u_read_pci_cfg_host(pbm, bus, devfn,
|
||||
where, 2, &tmp32);
|
||||
*value = tmp32;
|
||||
|
||||
tmp32 = 0xffffffff;
|
||||
sun4u_read_pci_cfg_host(pbm, bus, devfn,
|
||||
where + 2, 2, &tmp32);
|
||||
*value |= tmp32 << 16;
|
||||
break;
|
||||
}
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
|
||||
int where, int size, u32 *value)
|
||||
{
|
||||
@@ -53,10 +114,6 @@ static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
|
||||
u16 tmp16;
|
||||
u8 tmp8;
|
||||
|
||||
if (bus_dev == pbm->pci_bus && devfn == 0x00)
|
||||
return pci_host_bridge_read_pci_cfg(bus_dev, devfn, where,
|
||||
size, value);
|
||||
|
||||
switch (size) {
|
||||
case 1:
|
||||
*value = 0xff;
|
||||
@@ -69,6 +126,10 @@ static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
|
||||
break;
|
||||
}
|
||||
|
||||
if (!bus_dev->number && !PCI_SLOT(devfn))
|
||||
return sun4u_read_pci_cfg_host(pbm, bus, devfn, where,
|
||||
size, value);
|
||||
|
||||
addr = sun4u_config_mkaddr(pbm, bus, devfn, where);
|
||||
if (!addr)
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
@@ -101,6 +162,53 @@ static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static int sun4u_write_pci_cfg_host(struct pci_pbm_info *pbm,
|
||||
unsigned char bus, unsigned int devfn,
|
||||
int where, int size, u32 value)
|
||||
{
|
||||
u32 *addr;
|
||||
|
||||
addr = sun4u_config_mkaddr(pbm, bus, devfn, where);
|
||||
if (!addr)
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
|
||||
switch (size) {
|
||||
case 1:
|
||||
if (where < 8) {
|
||||
unsigned long align = (unsigned long) addr;
|
||||
u16 tmp16;
|
||||
|
||||
align &= ~1;
|
||||
pci_config_read16((u16 *)align, &tmp16);
|
||||
if (where & 1) {
|
||||
tmp16 &= 0x00ff;
|
||||
tmp16 |= value << 8;
|
||||
} else {
|
||||
tmp16 &= 0xff00;
|
||||
tmp16 |= value;
|
||||
}
|
||||
pci_config_write16((u16 *)align, tmp16);
|
||||
} else
|
||||
pci_config_write8((u8 *)addr, value);
|
||||
break;
|
||||
case 2:
|
||||
if (where < 8) {
|
||||
pci_config_write16((u16 *)addr, value);
|
||||
} else {
|
||||
pci_config_write8((u8 *)addr, value & 0xff);
|
||||
pci_config_write8(((u8 *)addr) + 1, value >> 8);
|
||||
}
|
||||
break;
|
||||
case 4:
|
||||
sun4u_write_pci_cfg_host(pbm, bus, devfn,
|
||||
where, 2, value & 0xffff);
|
||||
sun4u_write_pci_cfg_host(pbm, bus, devfn,
|
||||
where + 2, 2, value >> 16);
|
||||
break;
|
||||
}
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static int sun4u_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
|
||||
int where, int size, u32 value)
|
||||
{
|
||||
@@ -108,9 +216,10 @@ static int sun4u_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
|
||||
unsigned char bus = bus_dev->number;
|
||||
u32 *addr;
|
||||
|
||||
if (bus_dev == pbm->pci_bus && devfn == 0x00)
|
||||
return pci_host_bridge_write_pci_cfg(bus_dev, devfn, where,
|
||||
size, value);
|
||||
if (!bus_dev->number && !PCI_SLOT(devfn))
|
||||
return sun4u_write_pci_cfg_host(pbm, bus, devfn, where,
|
||||
size, value);
|
||||
|
||||
addr = sun4u_config_mkaddr(pbm, bus, devfn, where);
|
||||
if (!addr)
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
|
||||
@@ -39,12 +39,12 @@ static void pci_fire_scan_bus(struct pci_pbm_info *pbm)
|
||||
#define FIRE_IOMMU_FLUSH 0x40100UL
|
||||
#define FIRE_IOMMU_FLUSHINV 0x40108UL
|
||||
|
||||
static void pci_fire_pbm_iommu_init(struct pci_pbm_info *pbm)
|
||||
static int pci_fire_pbm_iommu_init(struct pci_pbm_info *pbm)
|
||||
{
|
||||
struct iommu *iommu = pbm->iommu;
|
||||
u32 vdma[2], dma_mask;
|
||||
u64 control;
|
||||
int tsbsize;
|
||||
int tsbsize, err;
|
||||
|
||||
/* No virtual-dma property on these guys, use largest size. */
|
||||
vdma[0] = 0xc0000000; /* base */
|
||||
@@ -68,7 +68,9 @@ static void pci_fire_pbm_iommu_init(struct pci_pbm_info *pbm)
|
||||
*/
|
||||
fire_write(iommu->iommu_flushinv, ~(u64)0);
|
||||
|
||||
pci_iommu_table_init(iommu, tsbsize * 8 * 1024, vdma[0], dma_mask);
|
||||
err = iommu_table_init(iommu, tsbsize * 8 * 1024, vdma[0], dma_mask);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
fire_write(iommu->iommu_tsbbase, __pa(iommu->page_table) | 0x7UL);
|
||||
|
||||
@@ -78,6 +80,8 @@ static void pci_fire_pbm_iommu_init(struct pci_pbm_info *pbm)
|
||||
0x00000002 /* Bypass enable */ |
|
||||
0x00000001 /* Translation enable */);
|
||||
fire_write(iommu->iommu_control, control);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Based at pbm->controller_regs */
|
||||
@@ -167,8 +171,8 @@ static void pci_fire_hw_init(struct pci_pbm_info *pbm)
|
||||
fire_write(pbm->pbm_regs + FIRE_PEC_IENAB, ~(u64)0);
|
||||
}
|
||||
|
||||
static void pci_fire_pbm_init(struct pci_controller_info *p,
|
||||
struct device_node *dp, u32 portid)
|
||||
static int pci_fire_pbm_init(struct pci_controller_info *p,
|
||||
struct device_node *dp, u32 portid)
|
||||
{
|
||||
const struct linux_prom64_registers *regs;
|
||||
struct pci_pbm_info *pbm;
|
||||
@@ -203,7 +207,8 @@ static void pci_fire_pbm_init(struct pci_controller_info *p,
|
||||
pci_get_pbm_props(pbm);
|
||||
|
||||
pci_fire_hw_init(pbm);
|
||||
pci_fire_pbm_iommu_init(pbm);
|
||||
|
||||
return pci_fire_pbm_iommu_init(pbm);
|
||||
}
|
||||
|
||||
static inline int portid_compare(u32 x, u32 y)
|
||||
@@ -222,7 +227,8 @@ void fire_pci_init(struct device_node *dp, const char *model_name)
|
||||
|
||||
for (pbm = pci_pbm_root; pbm; pbm = pbm->next) {
|
||||
if (portid_compare(pbm->portid, portid)) {
|
||||
pci_fire_pbm_init(pbm->parent, dp, portid);
|
||||
if (pci_fire_pbm_init(pbm->parent, dp, portid))
|
||||
goto fatal_memory_error;
|
||||
return;
|
||||
}
|
||||
}
|
||||
@@ -250,7 +256,9 @@ void fire_pci_init(struct device_node *dp, const char *model_name)
|
||||
*/
|
||||
pci_memspace_mask = 0x7fffffffUL;
|
||||
|
||||
pci_fire_pbm_init(p, dp, portid);
|
||||
if (pci_fire_pbm_init(p, dp, portid))
|
||||
goto fatal_memory_error;
|
||||
|
||||
return;
|
||||
|
||||
fatal_memory_error:
|
||||
|
||||
@@ -813,16 +813,19 @@ static void psycho_scan_bus(struct pci_pbm_info *pbm)
|
||||
psycho_register_error_handlers(pbm);
|
||||
}
|
||||
|
||||
static void psycho_iommu_init(struct pci_pbm_info *pbm)
|
||||
static int psycho_iommu_init(struct pci_pbm_info *pbm)
|
||||
{
|
||||
struct iommu *iommu = pbm->iommu;
|
||||
unsigned long i;
|
||||
u64 control;
|
||||
int err;
|
||||
|
||||
/* Register addresses. */
|
||||
iommu->iommu_control = pbm->controller_regs + PSYCHO_IOMMU_CONTROL;
|
||||
iommu->iommu_tsbbase = pbm->controller_regs + PSYCHO_IOMMU_TSBBASE;
|
||||
iommu->iommu_flush = pbm->controller_regs + PSYCHO_IOMMU_FLUSH;
|
||||
iommu->iommu_tags = iommu->iommu_flush + (0xa580UL - 0x0210UL);
|
||||
|
||||
/* PSYCHO's IOMMU lacks ctx flushing. */
|
||||
iommu->iommu_ctxflush = 0;
|
||||
|
||||
@@ -845,7 +848,9 @@ static void psycho_iommu_init(struct pci_pbm_info *pbm)
|
||||
/* Leave diag mode enabled for full-flushing done
|
||||
* in pci_iommu.c
|
||||
*/
|
||||
pci_iommu_table_init(iommu, IO_TSB_SIZE, 0xc0000000, 0xffffffff);
|
||||
err = iommu_table_init(iommu, IO_TSB_SIZE, 0xc0000000, 0xffffffff);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
psycho_write(pbm->controller_regs + PSYCHO_IOMMU_TSBBASE,
|
||||
__pa(iommu->page_table));
|
||||
@@ -858,6 +863,8 @@ static void psycho_iommu_init(struct pci_pbm_info *pbm)
|
||||
/* If necessary, hook us up for starfire IRQ translations. */
|
||||
if (this_is_starfire)
|
||||
starfire_hookup(pbm->portid);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define PSYCHO_IRQ_RETRY 0x1a00UL
|
||||
@@ -1031,15 +1038,12 @@ void psycho_init(struct device_node *dp, char *model_name)
|
||||
}
|
||||
|
||||
p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC);
|
||||
if (!p) {
|
||||
prom_printf("PSYCHO: Fatal memory allocation error.\n");
|
||||
prom_halt();
|
||||
}
|
||||
if (!p)
|
||||
goto fatal_memory_error;
|
||||
iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
|
||||
if (!iommu) {
|
||||
prom_printf("PSYCHO: Fatal memory allocation error.\n");
|
||||
prom_halt();
|
||||
}
|
||||
if (!iommu)
|
||||
goto fatal_memory_error;
|
||||
|
||||
p->pbm_A.iommu = p->pbm_B.iommu = iommu;
|
||||
|
||||
p->pbm_A.portid = upa_portid;
|
||||
@@ -1062,8 +1066,14 @@ void psycho_init(struct device_node *dp, char *model_name)
|
||||
|
||||
psycho_controller_hwinit(&p->pbm_A);
|
||||
|
||||
psycho_iommu_init(&p->pbm_A);
|
||||
if (psycho_iommu_init(&p->pbm_A))
|
||||
goto fatal_memory_error;
|
||||
|
||||
is_pbm_a = ((pr_regs[0].phys_addr & 0x6000) == 0x2000);
|
||||
psycho_pbm_init(p, dp, is_pbm_a);
|
||||
return;
|
||||
|
||||
fatal_memory_error:
|
||||
prom_printf("PSYCHO: Fatal memory allocation error.\n");
|
||||
prom_halt();
|
||||
}
|
||||
|
||||
@@ -672,18 +672,20 @@ static void sabre_scan_bus(struct pci_pbm_info *pbm)
|
||||
sabre_register_error_handlers(pbm);
|
||||
}
|
||||
|
||||
static void sabre_iommu_init(struct pci_pbm_info *pbm,
|
||||
int tsbsize, unsigned long dvma_offset,
|
||||
u32 dma_mask)
|
||||
static int sabre_iommu_init(struct pci_pbm_info *pbm,
|
||||
int tsbsize, unsigned long dvma_offset,
|
||||
u32 dma_mask)
|
||||
{
|
||||
struct iommu *iommu = pbm->iommu;
|
||||
unsigned long i;
|
||||
u64 control;
|
||||
int err;
|
||||
|
||||
/* Register addresses. */
|
||||
iommu->iommu_control = pbm->controller_regs + SABRE_IOMMU_CONTROL;
|
||||
iommu->iommu_tsbbase = pbm->controller_regs + SABRE_IOMMU_TSBBASE;
|
||||
iommu->iommu_flush = pbm->controller_regs + SABRE_IOMMU_FLUSH;
|
||||
iommu->iommu_tags = iommu->iommu_flush + (0xa580UL - 0x0210UL);
|
||||
iommu->write_complete_reg = pbm->controller_regs + SABRE_WRSYNC;
|
||||
/* Sabre's IOMMU lacks ctx flushing. */
|
||||
iommu->iommu_ctxflush = 0;
|
||||
@@ -701,7 +703,10 @@ static void sabre_iommu_init(struct pci_pbm_info *pbm,
|
||||
/* Leave diag mode enabled for full-flushing done
|
||||
* in pci_iommu.c
|
||||
*/
|
||||
pci_iommu_table_init(iommu, tsbsize * 1024 * 8, dvma_offset, dma_mask);
|
||||
err = iommu_table_init(iommu, tsbsize * 1024 * 8,
|
||||
dvma_offset, dma_mask);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
sabre_write(pbm->controller_regs + SABRE_IOMMU_TSBBASE,
|
||||
__pa(iommu->page_table));
|
||||
@@ -722,6 +727,8 @@ static void sabre_iommu_init(struct pci_pbm_info *pbm,
|
||||
break;
|
||||
}
|
||||
sabre_write(pbm->controller_regs + SABRE_IOMMU_CONTROL, control);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sabre_pbm_init(struct pci_controller_info *p, struct pci_pbm_info *pbm, struct device_node *dp)
|
||||
@@ -775,16 +782,12 @@ void sabre_init(struct device_node *dp, char *model_name)
|
||||
}
|
||||
|
||||
p = kzalloc(sizeof(*p), GFP_ATOMIC);
|
||||
if (!p) {
|
||||
prom_printf("SABRE: Error, kmalloc(pci_controller_info) failed.\n");
|
||||
prom_halt();
|
||||
}
|
||||
if (!p)
|
||||
goto fatal_memory_error;
|
||||
|
||||
iommu = kzalloc(sizeof(*iommu), GFP_ATOMIC);
|
||||
if (!iommu) {
|
||||
prom_printf("SABRE: Error, kmalloc(pci_iommu) failed.\n");
|
||||
prom_halt();
|
||||
}
|
||||
if (!iommu)
|
||||
goto fatal_memory_error;
|
||||
pbm = &p->pbm_A;
|
||||
pbm->iommu = iommu;
|
||||
|
||||
@@ -847,10 +850,16 @@ void sabre_init(struct device_node *dp, char *model_name)
|
||||
prom_halt();
|
||||
}
|
||||
|
||||
sabre_iommu_init(pbm, tsbsize, vdma[0], dma_mask);
|
||||
if (sabre_iommu_init(pbm, tsbsize, vdma[0], dma_mask))
|
||||
goto fatal_memory_error;
|
||||
|
||||
/*
|
||||
* Look for APB underneath.
|
||||
*/
|
||||
sabre_pbm_init(p, pbm, dp);
|
||||
return;
|
||||
|
||||
fatal_memory_error:
|
||||
prom_printf("SABRE: Fatal memory allocation error.\n");
|
||||
prom_halt();
|
||||
}
|
||||
|
||||
@@ -1148,14 +1148,14 @@ static void schizo_pbm_strbuf_init(struct pci_pbm_info *pbm)
|
||||
#define SCHIZO_IOMMU_FLUSH (0x00210UL)
|
||||
#define SCHIZO_IOMMU_CTXFLUSH (0x00218UL)
|
||||
|
||||
static void schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
|
||||
static int schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
|
||||
{
|
||||
struct iommu *iommu = pbm->iommu;
|
||||
unsigned long i, tagbase, database;
|
||||
struct property *prop;
|
||||
u32 vdma[2], dma_mask;
|
||||
int tsbsize, err;
|
||||
u64 control;
|
||||
int tsbsize;
|
||||
|
||||
prop = of_find_property(pbm->prom_node, "virtual-dma", NULL);
|
||||
if (prop) {
|
||||
@@ -1195,6 +1195,7 @@ static void schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
|
||||
iommu->iommu_control = pbm->pbm_regs + SCHIZO_IOMMU_CONTROL;
|
||||
iommu->iommu_tsbbase = pbm->pbm_regs + SCHIZO_IOMMU_TSBBASE;
|
||||
iommu->iommu_flush = pbm->pbm_regs + SCHIZO_IOMMU_FLUSH;
|
||||
iommu->iommu_tags = iommu->iommu_flush + (0xa580UL - 0x0210UL);
|
||||
iommu->iommu_ctxflush = pbm->pbm_regs + SCHIZO_IOMMU_CTXFLUSH;
|
||||
|
||||
/* We use the main control/status register of SCHIZO as the write
|
||||
@@ -1219,7 +1220,9 @@ static void schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
|
||||
/* Leave diag mode enabled for full-flushing done
|
||||
* in pci_iommu.c
|
||||
*/
|
||||
pci_iommu_table_init(iommu, tsbsize * 8 * 1024, vdma[0], dma_mask);
|
||||
err = iommu_table_init(iommu, tsbsize * 8 * 1024, vdma[0], dma_mask);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
schizo_write(iommu->iommu_tsbbase, __pa(iommu->page_table));
|
||||
|
||||
@@ -1236,6 +1239,8 @@ static void schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
|
||||
|
||||
control |= SCHIZO_IOMMU_CTRL_ENAB;
|
||||
schizo_write(iommu->iommu_control, control);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define SCHIZO_PCI_IRQ_RETRY (0x1a00UL)
|
||||
@@ -1328,14 +1333,14 @@ static void schizo_pbm_hw_init(struct pci_pbm_info *pbm)
|
||||
}
|
||||
}
|
||||
|
||||
static void schizo_pbm_init(struct pci_controller_info *p,
|
||||
struct device_node *dp, u32 portid,
|
||||
int chip_type)
|
||||
static int schizo_pbm_init(struct pci_controller_info *p,
|
||||
struct device_node *dp, u32 portid,
|
||||
int chip_type)
|
||||
{
|
||||
const struct linux_prom64_registers *regs;
|
||||
struct pci_pbm_info *pbm;
|
||||
const char *chipset_name;
|
||||
int is_pbm_a;
|
||||
int is_pbm_a, err;
|
||||
|
||||
switch (chip_type) {
|
||||
case PBM_CHIP_TYPE_TOMATILLO:
|
||||
@@ -1406,8 +1411,13 @@ static void schizo_pbm_init(struct pci_controller_info *p,
|
||||
|
||||
pci_get_pbm_props(pbm);
|
||||
|
||||
schizo_pbm_iommu_init(pbm);
|
||||
err = schizo_pbm_iommu_init(pbm);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
schizo_pbm_strbuf_init(pbm);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int portid_compare(u32 x, u32 y, int chip_type)
|
||||
@@ -1431,34 +1441,38 @@ static void __schizo_init(struct device_node *dp, char *model_name, int chip_typ
|
||||
|
||||
for (pbm = pci_pbm_root; pbm; pbm = pbm->next) {
|
||||
if (portid_compare(pbm->portid, portid, chip_type)) {
|
||||
schizo_pbm_init(pbm->parent, dp, portid, chip_type);
|
||||
if (schizo_pbm_init(pbm->parent, dp,
|
||||
portid, chip_type))
|
||||
goto fatal_memory_error;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC);
|
||||
if (!p)
|
||||
goto memfail;
|
||||
goto fatal_memory_error;
|
||||
|
||||
iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
|
||||
if (!iommu)
|
||||
goto memfail;
|
||||
goto fatal_memory_error;
|
||||
|
||||
p->pbm_A.iommu = iommu;
|
||||
|
||||
iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
|
||||
if (!iommu)
|
||||
goto memfail;
|
||||
goto fatal_memory_error;
|
||||
|
||||
p->pbm_B.iommu = iommu;
|
||||
|
||||
/* Like PSYCHO we have a 2GB aligned area for memory space. */
|
||||
pci_memspace_mask = 0x7fffffffUL;
|
||||
|
||||
schizo_pbm_init(p, dp, portid, chip_type);
|
||||
if (schizo_pbm_init(p, dp, portid, chip_type))
|
||||
goto fatal_memory_error;
|
||||
|
||||
return;
|
||||
|
||||
memfail:
|
||||
fatal_memory_error:
|
||||
prom_printf("SCHIZO: Fatal memory allocation error.\n");
|
||||
prom_halt();
|
||||
}
|
||||
|
||||
@@ -33,30 +33,30 @@ static unsigned long vpci_minor = 1;
|
||||
#define PGLIST_NENTS (PAGE_SIZE / sizeof(u64))
|
||||
|
||||
struct iommu_batch {
|
||||
struct pci_dev *pdev; /* Device mapping is for. */
|
||||
struct device *dev; /* Device mapping is for. */
|
||||
unsigned long prot; /* IOMMU page protections */
|
||||
unsigned long entry; /* Index into IOTSB. */
|
||||
u64 *pglist; /* List of physical pages */
|
||||
unsigned long npages; /* Number of pages in list. */
|
||||
};
|
||||
|
||||
static DEFINE_PER_CPU(struct iommu_batch, pci_iommu_batch);
|
||||
static DEFINE_PER_CPU(struct iommu_batch, iommu_batch);
|
||||
|
||||
/* Interrupts must be disabled. */
|
||||
static inline void pci_iommu_batch_start(struct pci_dev *pdev, unsigned long prot, unsigned long entry)
|
||||
static inline void iommu_batch_start(struct device *dev, unsigned long prot, unsigned long entry)
|
||||
{
|
||||
struct iommu_batch *p = &__get_cpu_var(pci_iommu_batch);
|
||||
struct iommu_batch *p = &__get_cpu_var(iommu_batch);
|
||||
|
||||
p->pdev = pdev;
|
||||
p->dev = dev;
|
||||
p->prot = prot;
|
||||
p->entry = entry;
|
||||
p->npages = 0;
|
||||
}
|
||||
|
||||
/* Interrupts must be disabled. */
|
||||
static long pci_iommu_batch_flush(struct iommu_batch *p)
|
||||
static long iommu_batch_flush(struct iommu_batch *p)
|
||||
{
|
||||
struct pci_pbm_info *pbm = p->pdev->dev.archdata.host_controller;
|
||||
struct pci_pbm_info *pbm = p->dev->archdata.host_controller;
|
||||
unsigned long devhandle = pbm->devhandle;
|
||||
unsigned long prot = p->prot;
|
||||
unsigned long entry = p->entry;
|
||||
@@ -70,7 +70,7 @@ static long pci_iommu_batch_flush(struct iommu_batch *p)
|
||||
npages, prot, __pa(pglist));
|
||||
if (unlikely(num < 0)) {
|
||||
if (printk_ratelimit())
|
||||
printk("pci_iommu_batch_flush: IOMMU map of "
|
||||
printk("iommu_batch_flush: IOMMU map of "
|
||||
"[%08lx:%08lx:%lx:%lx:%lx] failed with "
|
||||
"status %ld\n",
|
||||
devhandle, HV_PCI_TSBID(0, entry),
|
||||
@@ -90,30 +90,30 @@ static long pci_iommu_batch_flush(struct iommu_batch *p)
|
||||
}
|
||||
|
||||
/* Interrupts must be disabled. */
|
||||
static inline long pci_iommu_batch_add(u64 phys_page)
|
||||
static inline long iommu_batch_add(u64 phys_page)
|
||||
{
|
||||
struct iommu_batch *p = &__get_cpu_var(pci_iommu_batch);
|
||||
struct iommu_batch *p = &__get_cpu_var(iommu_batch);
|
||||
|
||||
BUG_ON(p->npages >= PGLIST_NENTS);
|
||||
|
||||
p->pglist[p->npages++] = phys_page;
|
||||
if (p->npages == PGLIST_NENTS)
|
||||
return pci_iommu_batch_flush(p);
|
||||
return iommu_batch_flush(p);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Interrupts must be disabled. */
|
||||
static inline long pci_iommu_batch_end(void)
|
||||
static inline long iommu_batch_end(void)
|
||||
{
|
||||
struct iommu_batch *p = &__get_cpu_var(pci_iommu_batch);
|
||||
struct iommu_batch *p = &__get_cpu_var(iommu_batch);
|
||||
|
||||
BUG_ON(p->npages >= PGLIST_NENTS);
|
||||
|
||||
return pci_iommu_batch_flush(p);
|
||||
return iommu_batch_flush(p);
|
||||
}
|
||||
|
||||
static long pci_arena_alloc(struct iommu_arena *arena, unsigned long npages)
|
||||
static long arena_alloc(struct iommu_arena *arena, unsigned long npages)
|
||||
{
|
||||
unsigned long n, i, start, end, limit;
|
||||
int pass;
|
||||
@@ -152,7 +152,8 @@ again:
|
||||
return n;
|
||||
}
|
||||
|
||||
static void pci_arena_free(struct iommu_arena *arena, unsigned long base, unsigned long npages)
|
||||
static void arena_free(struct iommu_arena *arena, unsigned long base,
|
||||
unsigned long npages)
|
||||
{
|
||||
unsigned long i;
|
||||
|
||||
@@ -160,7 +161,8 @@ static void pci_arena_free(struct iommu_arena *arena, unsigned long base, unsign
|
||||
__clear_bit(i, arena->map);
|
||||
}
|
||||
|
||||
static void *pci_4v_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp, gfp_t gfp)
|
||||
static void *dma_4v_alloc_coherent(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_addrp, gfp_t gfp)
|
||||
{
|
||||
struct iommu *iommu;
|
||||
unsigned long flags, order, first_page, npages, n;
|
||||
@@ -180,10 +182,10 @@ static void *pci_4v_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr
|
||||
|
||||
memset((char *)first_page, 0, PAGE_SIZE << order);
|
||||
|
||||
iommu = pdev->dev.archdata.iommu;
|
||||
iommu = dev->archdata.iommu;
|
||||
|
||||
spin_lock_irqsave(&iommu->lock, flags);
|
||||
entry = pci_arena_alloc(&iommu->arena, npages);
|
||||
entry = arena_alloc(&iommu->arena, npages);
|
||||
spin_unlock_irqrestore(&iommu->lock, flags);
|
||||
|
||||
if (unlikely(entry < 0L))
|
||||
@@ -196,18 +198,18 @@ static void *pci_4v_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
pci_iommu_batch_start(pdev,
|
||||
(HV_PCI_MAP_ATTR_READ |
|
||||
HV_PCI_MAP_ATTR_WRITE),
|
||||
entry);
|
||||
iommu_batch_start(dev,
|
||||
(HV_PCI_MAP_ATTR_READ |
|
||||
HV_PCI_MAP_ATTR_WRITE),
|
||||
entry);
|
||||
|
||||
for (n = 0; n < npages; n++) {
|
||||
long err = pci_iommu_batch_add(first_page + (n * PAGE_SIZE));
|
||||
long err = iommu_batch_add(first_page + (n * PAGE_SIZE));
|
||||
if (unlikely(err < 0L))
|
||||
goto iommu_map_fail;
|
||||
}
|
||||
|
||||
if (unlikely(pci_iommu_batch_end() < 0L))
|
||||
if (unlikely(iommu_batch_end() < 0L))
|
||||
goto iommu_map_fail;
|
||||
|
||||
local_irq_restore(flags);
|
||||
@@ -217,7 +219,7 @@ static void *pci_4v_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr
|
||||
iommu_map_fail:
|
||||
/* Interrupts are disabled. */
|
||||
spin_lock(&iommu->lock);
|
||||
pci_arena_free(&iommu->arena, entry, npages);
|
||||
arena_free(&iommu->arena, entry, npages);
|
||||
spin_unlock_irqrestore(&iommu->lock, flags);
|
||||
|
||||
arena_alloc_fail:
|
||||
@@ -225,7 +227,8 @@ arena_alloc_fail:
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static void pci_4v_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, dma_addr_t dvma)
|
||||
static void dma_4v_free_coherent(struct device *dev, size_t size, void *cpu,
|
||||
dma_addr_t dvma)
|
||||
{
|
||||
struct pci_pbm_info *pbm;
|
||||
struct iommu *iommu;
|
||||
@@ -233,14 +236,14 @@ static void pci_4v_free_consistent(struct pci_dev *pdev, size_t size, void *cpu,
|
||||
u32 devhandle;
|
||||
|
||||
npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT;
|
||||
iommu = pdev->dev.archdata.iommu;
|
||||
pbm = pdev->dev.archdata.host_controller;
|
||||
iommu = dev->archdata.iommu;
|
||||
pbm = dev->archdata.host_controller;
|
||||
devhandle = pbm->devhandle;
|
||||
entry = ((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT);
|
||||
|
||||
spin_lock_irqsave(&iommu->lock, flags);
|
||||
|
||||
pci_arena_free(&iommu->arena, entry, npages);
|
||||
arena_free(&iommu->arena, entry, npages);
|
||||
|
||||
do {
|
||||
unsigned long num;
|
||||
@@ -258,7 +261,8 @@ static void pci_4v_free_consistent(struct pci_dev *pdev, size_t size, void *cpu,
|
||||
free_pages((unsigned long)cpu, order);
|
||||
}
|
||||
|
||||
static dma_addr_t pci_4v_map_single(struct pci_dev *pdev, void *ptr, size_t sz, int direction)
|
||||
static dma_addr_t dma_4v_map_single(struct device *dev, void *ptr, size_t sz,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
struct iommu *iommu;
|
||||
unsigned long flags, npages, oaddr;
|
||||
@@ -267,9 +271,9 @@ static dma_addr_t pci_4v_map_single(struct pci_dev *pdev, void *ptr, size_t sz,
|
||||
unsigned long prot;
|
||||
long entry;
|
||||
|
||||
iommu = pdev->dev.archdata.iommu;
|
||||
iommu = dev->archdata.iommu;
|
||||
|
||||
if (unlikely(direction == PCI_DMA_NONE))
|
||||
if (unlikely(direction == DMA_NONE))
|
||||
goto bad;
|
||||
|
||||
oaddr = (unsigned long)ptr;
|
||||
@@ -277,7 +281,7 @@ static dma_addr_t pci_4v_map_single(struct pci_dev *pdev, void *ptr, size_t sz,
|
||||
npages >>= IO_PAGE_SHIFT;
|
||||
|
||||
spin_lock_irqsave(&iommu->lock, flags);
|
||||
entry = pci_arena_alloc(&iommu->arena, npages);
|
||||
entry = arena_alloc(&iommu->arena, npages);
|
||||
spin_unlock_irqrestore(&iommu->lock, flags);
|
||||
|
||||
if (unlikely(entry < 0L))
|
||||
@@ -288,19 +292,19 @@ static dma_addr_t pci_4v_map_single(struct pci_dev *pdev, void *ptr, size_t sz,
|
||||
ret = bus_addr | (oaddr & ~IO_PAGE_MASK);
|
||||
base_paddr = __pa(oaddr & IO_PAGE_MASK);
|
||||
prot = HV_PCI_MAP_ATTR_READ;
|
||||
if (direction != PCI_DMA_TODEVICE)
|
||||
if (direction != DMA_TO_DEVICE)
|
||||
prot |= HV_PCI_MAP_ATTR_WRITE;
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
pci_iommu_batch_start(pdev, prot, entry);
|
||||
iommu_batch_start(dev, prot, entry);
|
||||
|
||||
for (i = 0; i < npages; i++, base_paddr += IO_PAGE_SIZE) {
|
||||
long err = pci_iommu_batch_add(base_paddr);
|
||||
long err = iommu_batch_add(base_paddr);
|
||||
if (unlikely(err < 0L))
|
||||
goto iommu_map_fail;
|
||||
}
|
||||
if (unlikely(pci_iommu_batch_end() < 0L))
|
||||
if (unlikely(iommu_batch_end() < 0L))
|
||||
goto iommu_map_fail;
|
||||
|
||||
local_irq_restore(flags);
|
||||
@@ -310,18 +314,19 @@ static dma_addr_t pci_4v_map_single(struct pci_dev *pdev, void *ptr, size_t sz,
|
||||
bad:
|
||||
if (printk_ratelimit())
|
||||
WARN_ON(1);
|
||||
return PCI_DMA_ERROR_CODE;
|
||||
return DMA_ERROR_CODE;
|
||||
|
||||
iommu_map_fail:
|
||||
/* Interrupts are disabled. */
|
||||
spin_lock(&iommu->lock);
|
||||
pci_arena_free(&iommu->arena, entry, npages);
|
||||
arena_free(&iommu->arena, entry, npages);
|
||||
spin_unlock_irqrestore(&iommu->lock, flags);
|
||||
|
||||
return PCI_DMA_ERROR_CODE;
|
||||
return DMA_ERROR_CODE;
|
||||
}
|
||||
|
||||
static void pci_4v_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction)
|
||||
static void dma_4v_unmap_single(struct device *dev, dma_addr_t bus_addr,
|
||||
size_t sz, enum dma_data_direction direction)
|
||||
{
|
||||
struct pci_pbm_info *pbm;
|
||||
struct iommu *iommu;
|
||||
@@ -329,14 +334,14 @@ static void pci_4v_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_
|
||||
long entry;
|
||||
u32 devhandle;
|
||||
|
||||
if (unlikely(direction == PCI_DMA_NONE)) {
|
||||
if (unlikely(direction == DMA_NONE)) {
|
||||
if (printk_ratelimit())
|
||||
WARN_ON(1);
|
||||
return;
|
||||
}
|
||||
|
||||
iommu = pdev->dev.archdata.iommu;
|
||||
pbm = pdev->dev.archdata.host_controller;
|
||||
iommu = dev->archdata.iommu;
|
||||
pbm = dev->archdata.host_controller;
|
||||
devhandle = pbm->devhandle;
|
||||
|
||||
npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK);
|
||||
@@ -346,7 +351,7 @@ static void pci_4v_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_
|
||||
spin_lock_irqsave(&iommu->lock, flags);
|
||||
|
||||
entry = (bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT;
|
||||
pci_arena_free(&iommu->arena, entry, npages);
|
||||
arena_free(&iommu->arena, entry, npages);
|
||||
|
||||
do {
|
||||
unsigned long num;
|
||||
@@ -363,7 +368,7 @@ static void pci_4v_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_
|
||||
#define SG_ENT_PHYS_ADDRESS(SG) \
|
||||
(__pa(page_address((SG)->page)) + (SG)->offset)
|
||||
|
||||
static inline long fill_sg(long entry, struct pci_dev *pdev,
|
||||
static inline long fill_sg(long entry, struct device *dev,
|
||||
struct scatterlist *sg,
|
||||
int nused, int nelems, unsigned long prot)
|
||||
{
|
||||
@@ -374,7 +379,7 @@ static inline long fill_sg(long entry, struct pci_dev *pdev,
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
pci_iommu_batch_start(pdev, prot, entry);
|
||||
iommu_batch_start(dev, prot, entry);
|
||||
|
||||
for (i = 0; i < nused; i++) {
|
||||
unsigned long pteval = ~0UL;
|
||||
@@ -415,7 +420,7 @@ static inline long fill_sg(long entry, struct pci_dev *pdev,
|
||||
while (len > 0) {
|
||||
long err;
|
||||
|
||||
err = pci_iommu_batch_add(pteval);
|
||||
err = iommu_batch_add(pteval);
|
||||
if (unlikely(err < 0L))
|
||||
goto iommu_map_failed;
|
||||
|
||||
@@ -446,7 +451,7 @@ static inline long fill_sg(long entry, struct pci_dev *pdev,
|
||||
dma_sg++;
|
||||
}
|
||||
|
||||
if (unlikely(pci_iommu_batch_end() < 0L))
|
||||
if (unlikely(iommu_batch_end() < 0L))
|
||||
goto iommu_map_failed;
|
||||
|
||||
local_irq_restore(flags);
|
||||
@@ -457,7 +462,8 @@ iommu_map_failed:
|
||||
return -1L;
|
||||
}
|
||||
|
||||
static int pci_4v_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
|
||||
static int dma_4v_map_sg(struct device *dev, struct scatterlist *sglist,
|
||||
int nelems, enum dma_data_direction direction)
|
||||
{
|
||||
struct iommu *iommu;
|
||||
unsigned long flags, npages, prot;
|
||||
@@ -469,18 +475,19 @@ static int pci_4v_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int n
|
||||
/* Fast path single entry scatterlists. */
|
||||
if (nelems == 1) {
|
||||
sglist->dma_address =
|
||||
pci_4v_map_single(pdev,
|
||||
(page_address(sglist->page) + sglist->offset),
|
||||
dma_4v_map_single(dev,
|
||||
(page_address(sglist->page) +
|
||||
sglist->offset),
|
||||
sglist->length, direction);
|
||||
if (unlikely(sglist->dma_address == PCI_DMA_ERROR_CODE))
|
||||
if (unlikely(sglist->dma_address == DMA_ERROR_CODE))
|
||||
return 0;
|
||||
sglist->dma_length = sglist->length;
|
||||
return 1;
|
||||
}
|
||||
|
||||
iommu = pdev->dev.archdata.iommu;
|
||||
iommu = dev->archdata.iommu;
|
||||
|
||||
if (unlikely(direction == PCI_DMA_NONE))
|
||||
if (unlikely(direction == DMA_NONE))
|
||||
goto bad;
|
||||
|
||||
/* Step 1: Prepare scatter list. */
|
||||
@@ -488,7 +495,7 @@ static int pci_4v_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int n
|
||||
|
||||
/* Step 2: Allocate a cluster and context, if necessary. */
|
||||
spin_lock_irqsave(&iommu->lock, flags);
|
||||
entry = pci_arena_alloc(&iommu->arena, npages);
|
||||
entry = arena_alloc(&iommu->arena, npages);
|
||||
spin_unlock_irqrestore(&iommu->lock, flags);
|
||||
|
||||
if (unlikely(entry < 0L))
|
||||
@@ -510,10 +517,10 @@ static int pci_4v_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int n
|
||||
|
||||
/* Step 4: Create the mappings. */
|
||||
prot = HV_PCI_MAP_ATTR_READ;
|
||||
if (direction != PCI_DMA_TODEVICE)
|
||||
if (direction != DMA_TO_DEVICE)
|
||||
prot |= HV_PCI_MAP_ATTR_WRITE;
|
||||
|
||||
err = fill_sg(entry, pdev, sglist, used, nelems, prot);
|
||||
err = fill_sg(entry, dev, sglist, used, nelems, prot);
|
||||
if (unlikely(err < 0L))
|
||||
goto iommu_map_failed;
|
||||
|
||||
@@ -526,13 +533,14 @@ bad:
|
||||
|
||||
iommu_map_failed:
|
||||
spin_lock_irqsave(&iommu->lock, flags);
|
||||
pci_arena_free(&iommu->arena, entry, npages);
|
||||
arena_free(&iommu->arena, entry, npages);
|
||||
spin_unlock_irqrestore(&iommu->lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void pci_4v_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
|
||||
static void dma_4v_unmap_sg(struct device *dev, struct scatterlist *sglist,
|
||||
int nelems, enum dma_data_direction direction)
|
||||
{
|
||||
struct pci_pbm_info *pbm;
|
||||
struct iommu *iommu;
|
||||
@@ -540,13 +548,13 @@ static void pci_4v_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in
|
||||
long entry;
|
||||
u32 devhandle, bus_addr;
|
||||
|
||||
if (unlikely(direction == PCI_DMA_NONE)) {
|
||||
if (unlikely(direction == DMA_NONE)) {
|
||||
if (printk_ratelimit())
|
||||
WARN_ON(1);
|
||||
}
|
||||
|
||||
iommu = pdev->dev.archdata.iommu;
|
||||
pbm = pdev->dev.archdata.host_controller;
|
||||
iommu = dev->archdata.iommu;
|
||||
pbm = dev->archdata.host_controller;
|
||||
devhandle = pbm->devhandle;
|
||||
|
||||
bus_addr = sglist->dma_address & IO_PAGE_MASK;
|
||||
@@ -562,7 +570,7 @@ static void pci_4v_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in
|
||||
|
||||
spin_lock_irqsave(&iommu->lock, flags);
|
||||
|
||||
pci_arena_free(&iommu->arena, entry, npages);
|
||||
arena_free(&iommu->arena, entry, npages);
|
||||
|
||||
do {
|
||||
unsigned long num;
|
||||
@@ -576,25 +584,29 @@ static void pci_4v_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in
|
||||
spin_unlock_irqrestore(&iommu->lock, flags);
|
||||
}
|
||||
|
||||
static void pci_4v_dma_sync_single_for_cpu(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction)
|
||||
static void dma_4v_sync_single_for_cpu(struct device *dev,
|
||||
dma_addr_t bus_addr, size_t sz,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
/* Nothing to do... */
|
||||
}
|
||||
|
||||
static void pci_4v_dma_sync_sg_for_cpu(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
|
||||
static void dma_4v_sync_sg_for_cpu(struct device *dev,
|
||||
struct scatterlist *sglist, int nelems,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
/* Nothing to do... */
|
||||
}
|
||||
|
||||
const struct pci_iommu_ops pci_sun4v_iommu_ops = {
|
||||
.alloc_consistent = pci_4v_alloc_consistent,
|
||||
.free_consistent = pci_4v_free_consistent,
|
||||
.map_single = pci_4v_map_single,
|
||||
.unmap_single = pci_4v_unmap_single,
|
||||
.map_sg = pci_4v_map_sg,
|
||||
.unmap_sg = pci_4v_unmap_sg,
|
||||
.dma_sync_single_for_cpu = pci_4v_dma_sync_single_for_cpu,
|
||||
.dma_sync_sg_for_cpu = pci_4v_dma_sync_sg_for_cpu,
|
||||
const struct dma_ops sun4v_dma_ops = {
|
||||
.alloc_coherent = dma_4v_alloc_coherent,
|
||||
.free_coherent = dma_4v_free_coherent,
|
||||
.map_single = dma_4v_map_single,
|
||||
.unmap_single = dma_4v_unmap_single,
|
||||
.map_sg = dma_4v_map_sg,
|
||||
.unmap_sg = dma_4v_unmap_sg,
|
||||
.sync_single_for_cpu = dma_4v_sync_single_for_cpu,
|
||||
.sync_sg_for_cpu = dma_4v_sync_sg_for_cpu,
|
||||
};
|
||||
|
||||
static void pci_sun4v_scan_bus(struct pci_pbm_info *pbm)
|
||||
@@ -1186,6 +1198,8 @@ void __init sun4v_pci_init(struct device_node *dp, char *model_name)
|
||||
}
|
||||
printk("SUN4V_PCI: Registered hvapi major[%lu] minor[%lu]\n",
|
||||
vpci_major, vpci_minor);
|
||||
|
||||
dma_ops = &sun4v_dma_ops;
|
||||
}
|
||||
|
||||
prop = of_find_property(dp, "reg", NULL);
|
||||
@@ -1206,7 +1220,7 @@ void __init sun4v_pci_init(struct device_node *dp, char *model_name)
|
||||
if (!page)
|
||||
goto fatal_memory_error;
|
||||
|
||||
per_cpu(pci_iommu_batch, i).pglist = (u64 *) page;
|
||||
per_cpu(iommu_batch, i).pglist = (u64 *) page;
|
||||
}
|
||||
|
||||
p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC);
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1460,6 +1460,74 @@ static int cmos_set_rtc_time(struct rtc_time *rtc_tm)
|
||||
}
|
||||
#endif /* CONFIG_PCI */
|
||||
|
||||
static void mostek_get_rtc_time(struct rtc_time *rtc_tm)
|
||||
{
|
||||
void __iomem *regs = mstk48t02_regs;
|
||||
u8 tmp;
|
||||
|
||||
spin_lock_irq(&mostek_lock);
|
||||
|
||||
tmp = mostek_read(regs + MOSTEK_CREG);
|
||||
tmp |= MSTK_CREG_READ;
|
||||
mostek_write(regs + MOSTEK_CREG, tmp);
|
||||
|
||||
rtc_tm->tm_sec = MSTK_REG_SEC(regs);
|
||||
rtc_tm->tm_min = MSTK_REG_MIN(regs);
|
||||
rtc_tm->tm_hour = MSTK_REG_HOUR(regs);
|
||||
rtc_tm->tm_mday = MSTK_REG_DOM(regs);
|
||||
rtc_tm->tm_mon = MSTK_REG_MONTH(regs);
|
||||
rtc_tm->tm_year = MSTK_CVT_YEAR( MSTK_REG_YEAR(regs) );
|
||||
rtc_tm->tm_wday = MSTK_REG_DOW(regs);
|
||||
|
||||
tmp = mostek_read(regs + MOSTEK_CREG);
|
||||
tmp &= ~MSTK_CREG_READ;
|
||||
mostek_write(regs + MOSTEK_CREG, tmp);
|
||||
|
||||
spin_unlock_irq(&mostek_lock);
|
||||
|
||||
rtc_tm->tm_mon--;
|
||||
rtc_tm->tm_wday--;
|
||||
rtc_tm->tm_year -= 1900;
|
||||
}
|
||||
|
||||
static int mostek_set_rtc_time(struct rtc_time *rtc_tm)
|
||||
{
|
||||
unsigned char mon, day, hrs, min, sec, wday;
|
||||
void __iomem *regs = mstk48t02_regs;
|
||||
unsigned int yrs;
|
||||
u8 tmp;
|
||||
|
||||
yrs = rtc_tm->tm_year + 1900;
|
||||
mon = rtc_tm->tm_mon + 1;
|
||||
day = rtc_tm->tm_mday;
|
||||
wday = rtc_tm->tm_wday + 1;
|
||||
hrs = rtc_tm->tm_hour;
|
||||
min = rtc_tm->tm_min;
|
||||
sec = rtc_tm->tm_sec;
|
||||
|
||||
spin_lock_irq(&mostek_lock);
|
||||
|
||||
tmp = mostek_read(regs + MOSTEK_CREG);
|
||||
tmp |= MSTK_CREG_WRITE;
|
||||
mostek_write(regs + MOSTEK_CREG, tmp);
|
||||
|
||||
MSTK_SET_REG_SEC(regs, sec);
|
||||
MSTK_SET_REG_MIN(regs, min);
|
||||
MSTK_SET_REG_HOUR(regs, hrs);
|
||||
MSTK_SET_REG_DOW(regs, wday);
|
||||
MSTK_SET_REG_DOM(regs, day);
|
||||
MSTK_SET_REG_MONTH(regs, mon);
|
||||
MSTK_SET_REG_YEAR(regs, yrs - MSTK_YEAR_ZERO);
|
||||
|
||||
tmp = mostek_read(regs + MOSTEK_CREG);
|
||||
tmp &= ~MSTK_CREG_WRITE;
|
||||
mostek_write(regs + MOSTEK_CREG, tmp);
|
||||
|
||||
spin_unlock_irq(&mostek_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct mini_rtc_ops {
|
||||
void (*get_rtc_time)(struct rtc_time *);
|
||||
int (*set_rtc_time)(struct rtc_time *);
|
||||
@@ -1487,6 +1555,11 @@ static struct mini_rtc_ops cmos_rtc_ops = {
|
||||
};
|
||||
#endif /* CONFIG_PCI */
|
||||
|
||||
static struct mini_rtc_ops mostek_rtc_ops = {
|
||||
.get_rtc_time = mostek_get_rtc_time,
|
||||
.set_rtc_time = mostek_set_rtc_time,
|
||||
};
|
||||
|
||||
static struct mini_rtc_ops *mini_rtc_ops;
|
||||
|
||||
static inline void mini_get_rtc_time(struct rtc_time *time)
|
||||
@@ -1615,6 +1688,8 @@ static int __init rtc_mini_init(void)
|
||||
else if (ds1287_regs)
|
||||
mini_rtc_ops = &cmos_rtc_ops;
|
||||
#endif /* CONFIG_PCI */
|
||||
else if (mstk48t02_regs)
|
||||
mini_rtc_ops = &mostek_rtc_ops;
|
||||
else
|
||||
return -ENODEV;
|
||||
|
||||
|
||||
@@ -2134,12 +2134,20 @@ static void user_instruction_dump (unsigned int __user *pc)
|
||||
void show_stack(struct task_struct *tsk, unsigned long *_ksp)
|
||||
{
|
||||
unsigned long pc, fp, thread_base, ksp;
|
||||
void *tp = task_stack_page(tsk);
|
||||
struct thread_info *tp;
|
||||
struct reg_window *rw;
|
||||
int count = 0;
|
||||
|
||||
ksp = (unsigned long) _ksp;
|
||||
|
||||
if (!tsk)
|
||||
tsk = current;
|
||||
tp = task_thread_info(tsk);
|
||||
if (ksp == 0UL) {
|
||||
if (tsk == current)
|
||||
asm("mov %%fp, %0" : "=r" (ksp));
|
||||
else
|
||||
ksp = tp->ksp;
|
||||
}
|
||||
if (tp == current_thread_info())
|
||||
flushw_all();
|
||||
|
||||
@@ -2168,11 +2176,7 @@ void show_stack(struct task_struct *tsk, unsigned long *_ksp)
|
||||
|
||||
void dump_stack(void)
|
||||
{
|
||||
unsigned long *ksp;
|
||||
|
||||
__asm__ __volatile__("mov %%fp, %0"
|
||||
: "=r" (ksp));
|
||||
show_stack(current, ksp);
|
||||
show_stack(current, NULL);
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(dump_stack);
|
||||
|
||||
@@ -112,15 +112,12 @@ static void __kprobes unhandled_fault(unsigned long address,
|
||||
|
||||
static void bad_kernel_pc(struct pt_regs *regs, unsigned long vaddr)
|
||||
{
|
||||
unsigned long *ksp;
|
||||
|
||||
printk(KERN_CRIT "OOPS: Bogus kernel PC [%016lx] in fault handler\n",
|
||||
regs->tpc);
|
||||
printk(KERN_CRIT "OOPS: RPC [%016lx]\n", regs->u_regs[15]);
|
||||
print_symbol("RPC: <%s>\n", regs->u_regs[15]);
|
||||
printk(KERN_CRIT "OOPS: Fault was to vaddr[%lx]\n", vaddr);
|
||||
__asm__("mov %%sp, %0" : "=r" (ksp));
|
||||
show_stack(current, ksp);
|
||||
dump_stack();
|
||||
unhandled_fault(regs->tpc, current, regs);
|
||||
}
|
||||
|
||||
|
||||
@@ -210,6 +210,10 @@ static void __init walk_children(struct device_node *dp, struct sbus_dev *parent
|
||||
|
||||
sdev->bus = sbus;
|
||||
sdev->parent = parent;
|
||||
sdev->ofdev.dev.archdata.iommu =
|
||||
sbus->ofdev.dev.archdata.iommu;
|
||||
sdev->ofdev.dev.archdata.stc =
|
||||
sbus->ofdev.dev.archdata.stc;
|
||||
|
||||
fill_sbus_device(dp, sdev);
|
||||
|
||||
@@ -269,6 +273,11 @@ static void __init build_one_sbus(struct device_node *dp, int num_sbus)
|
||||
|
||||
sdev->bus = sbus;
|
||||
sdev->parent = NULL;
|
||||
sdev->ofdev.dev.archdata.iommu =
|
||||
sbus->ofdev.dev.archdata.iommu;
|
||||
sdev->ofdev.dev.archdata.stc =
|
||||
sbus->ofdev.dev.archdata.stc;
|
||||
|
||||
fill_sbus_device(dev_dp, sdev);
|
||||
|
||||
walk_children(dev_dp, sdev, sbus);
|
||||
|
||||
@@ -279,90 +279,91 @@ static void __devinit bw2_do_default_mode(struct bw2_par *par,
|
||||
}
|
||||
}
|
||||
|
||||
struct all_info {
|
||||
struct fb_info info;
|
||||
struct bw2_par par;
|
||||
};
|
||||
|
||||
static int __devinit bw2_init_one(struct of_device *op)
|
||||
static int __devinit bw2_probe(struct of_device *op, const struct of_device_id *match)
|
||||
{
|
||||
struct device_node *dp = op->node;
|
||||
struct all_info *all;
|
||||
struct fb_info *info;
|
||||
struct bw2_par *par;
|
||||
int linebytes, err;
|
||||
|
||||
all = kzalloc(sizeof(*all), GFP_KERNEL);
|
||||
if (!all)
|
||||
return -ENOMEM;
|
||||
info = framebuffer_alloc(sizeof(struct bw2_par), &op->dev);
|
||||
|
||||
spin_lock_init(&all->par.lock);
|
||||
err = -ENOMEM;
|
||||
if (!info)
|
||||
goto out_err;
|
||||
par = info->par;
|
||||
|
||||
all->par.physbase = op->resource[0].start;
|
||||
all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
|
||||
spin_lock_init(&par->lock);
|
||||
|
||||
sbusfb_fill_var(&all->info.var, dp->node, 1);
|
||||
par->physbase = op->resource[0].start;
|
||||
par->which_io = op->resource[0].flags & IORESOURCE_BITS;
|
||||
|
||||
sbusfb_fill_var(&info->var, dp->node, 1);
|
||||
linebytes = of_getintprop_default(dp, "linebytes",
|
||||
all->info.var.xres);
|
||||
info->var.xres);
|
||||
|
||||
all->info.var.red.length = all->info.var.green.length =
|
||||
all->info.var.blue.length = all->info.var.bits_per_pixel;
|
||||
all->info.var.red.offset = all->info.var.green.offset =
|
||||
all->info.var.blue.offset = 0;
|
||||
info->var.red.length = info->var.green.length =
|
||||
info->var.blue.length = info->var.bits_per_pixel;
|
||||
info->var.red.offset = info->var.green.offset =
|
||||
info->var.blue.offset = 0;
|
||||
|
||||
all->par.regs = of_ioremap(&op->resource[0], BWTWO_REGISTER_OFFSET,
|
||||
sizeof(struct bw2_regs), "bw2 regs");
|
||||
par->regs = of_ioremap(&op->resource[0], BWTWO_REGISTER_OFFSET,
|
||||
sizeof(struct bw2_regs), "bw2 regs");
|
||||
if (!par->regs)
|
||||
goto out_release_fb;
|
||||
|
||||
if (!of_find_property(dp, "width", NULL))
|
||||
bw2_do_default_mode(&all->par, &all->info, &linebytes);
|
||||
bw2_do_default_mode(par, info, &linebytes);
|
||||
|
||||
all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
|
||||
par->fbsize = PAGE_ALIGN(linebytes * info->var.yres);
|
||||
|
||||
all->info.flags = FBINFO_DEFAULT;
|
||||
all->info.fbops = &bw2_ops;
|
||||
info->flags = FBINFO_DEFAULT;
|
||||
info->fbops = &bw2_ops;
|
||||
|
||||
all->info.screen_base =
|
||||
of_ioremap(&op->resource[0], 0, all->par.fbsize, "bw2 ram");
|
||||
all->info.par = &all->par;
|
||||
info->screen_base = of_ioremap(&op->resource[0], 0,
|
||||
par->fbsize, "bw2 ram");
|
||||
if (!info->screen_base)
|
||||
goto out_unmap_regs;
|
||||
|
||||
bw2_blank(0, &all->info);
|
||||
bw2_blank(0, info);
|
||||
|
||||
bw2_init_fix(&all->info, linebytes);
|
||||
bw2_init_fix(info, linebytes);
|
||||
|
||||
err= register_framebuffer(&all->info);
|
||||
if (err < 0) {
|
||||
of_iounmap(&op->resource[0],
|
||||
all->par.regs, sizeof(struct bw2_regs));
|
||||
of_iounmap(&op->resource[0],
|
||||
all->info.screen_base, all->par.fbsize);
|
||||
kfree(all);
|
||||
return err;
|
||||
}
|
||||
err = register_framebuffer(info);
|
||||
if (err < 0)
|
||||
goto out_unmap_screen;
|
||||
|
||||
dev_set_drvdata(&op->dev, all);
|
||||
dev_set_drvdata(&op->dev, info);
|
||||
|
||||
printk("%s: bwtwo at %lx:%lx\n",
|
||||
dp->full_name,
|
||||
all->par.which_io, all->par.physbase);
|
||||
dp->full_name, par->which_io, par->physbase);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __devinit bw2_probe(struct of_device *dev, const struct of_device_id *match)
|
||||
{
|
||||
struct of_device *op = to_of_device(&dev->dev);
|
||||
out_unmap_screen:
|
||||
of_iounmap(&op->resource[0], info->screen_base, par->fbsize);
|
||||
|
||||
return bw2_init_one(op);
|
||||
out_unmap_regs:
|
||||
of_iounmap(&op->resource[0], par->regs, sizeof(struct bw2_regs));
|
||||
|
||||
out_release_fb:
|
||||
framebuffer_release(info);
|
||||
|
||||
out_err:
|
||||
return err;
|
||||
}
|
||||
|
||||
static int __devexit bw2_remove(struct of_device *op)
|
||||
{
|
||||
struct all_info *all = dev_get_drvdata(&op->dev);
|
||||
struct fb_info *info = dev_get_drvdata(&op->dev);
|
||||
struct bw2_par *par = info->par;
|
||||
|
||||
unregister_framebuffer(&all->info);
|
||||
unregister_framebuffer(info);
|
||||
|
||||
of_iounmap(&op->resource[0], all->par.regs, sizeof(struct bw2_regs));
|
||||
of_iounmap(&op->resource[0], all->info.screen_base, all->par.fbsize);
|
||||
of_iounmap(&op->resource[0], par->regs, sizeof(struct bw2_regs));
|
||||
of_iounmap(&op->resource[0], info->screen_base, par->fbsize);
|
||||
|
||||
kfree(all);
|
||||
framebuffer_release(info);
|
||||
|
||||
dev_set_drvdata(&op->dev, NULL);
|
||||
|
||||
|
||||
@@ -448,81 +448,79 @@ static struct sbus_mmap_map __cg14_mmap_map[CG14_MMAP_ENTRIES] __devinitdata = {
|
||||
{ .size = 0 }
|
||||
};
|
||||
|
||||
struct all_info {
|
||||
struct fb_info info;
|
||||
struct cg14_par par;
|
||||
};
|
||||
|
||||
static void cg14_unmap_regs(struct of_device *op, struct all_info *all)
|
||||
static void cg14_unmap_regs(struct of_device *op, struct fb_info *info,
|
||||
struct cg14_par *par)
|
||||
{
|
||||
if (all->par.regs)
|
||||
if (par->regs)
|
||||
of_iounmap(&op->resource[0],
|
||||
all->par.regs, sizeof(struct cg14_regs));
|
||||
if (all->par.clut)
|
||||
par->regs, sizeof(struct cg14_regs));
|
||||
if (par->clut)
|
||||
of_iounmap(&op->resource[0],
|
||||
all->par.clut, sizeof(struct cg14_clut));
|
||||
if (all->par.cursor)
|
||||
par->clut, sizeof(struct cg14_clut));
|
||||
if (par->cursor)
|
||||
of_iounmap(&op->resource[0],
|
||||
all->par.cursor, sizeof(struct cg14_cursor));
|
||||
if (all->info.screen_base)
|
||||
par->cursor, sizeof(struct cg14_cursor));
|
||||
if (info->screen_base)
|
||||
of_iounmap(&op->resource[1],
|
||||
all->info.screen_base, all->par.fbsize);
|
||||
info->screen_base, par->fbsize);
|
||||
}
|
||||
|
||||
static int __devinit cg14_init_one(struct of_device *op)
|
||||
static int __devinit cg14_probe(struct of_device *op, const struct of_device_id *match)
|
||||
{
|
||||
struct device_node *dp = op->node;
|
||||
struct all_info *all;
|
||||
struct fb_info *info;
|
||||
struct cg14_par *par;
|
||||
int is_8mb, linebytes, i, err;
|
||||
|
||||
all = kzalloc(sizeof(*all), GFP_KERNEL);
|
||||
if (!all)
|
||||
return -ENOMEM;
|
||||
info = framebuffer_alloc(sizeof(struct cg14_par), &op->dev);
|
||||
|
||||
spin_lock_init(&all->par.lock);
|
||||
err = -ENOMEM;
|
||||
if (!info)
|
||||
goto out_err;
|
||||
par = info->par;
|
||||
|
||||
sbusfb_fill_var(&all->info.var, dp->node, 8);
|
||||
all->info.var.red.length = 8;
|
||||
all->info.var.green.length = 8;
|
||||
all->info.var.blue.length = 8;
|
||||
spin_lock_init(&par->lock);
|
||||
|
||||
sbusfb_fill_var(&info->var, dp->node, 8);
|
||||
info->var.red.length = 8;
|
||||
info->var.green.length = 8;
|
||||
info->var.blue.length = 8;
|
||||
|
||||
linebytes = of_getintprop_default(dp, "linebytes",
|
||||
all->info.var.xres);
|
||||
all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
|
||||
info->var.xres);
|
||||
par->fbsize = PAGE_ALIGN(linebytes * info->var.yres);
|
||||
|
||||
if (!strcmp(dp->parent->name, "sbus") ||
|
||||
!strcmp(dp->parent->name, "sbi")) {
|
||||
all->par.physbase = op->resource[0].start;
|
||||
all->par.iospace = op->resource[0].flags & IORESOURCE_BITS;
|
||||
par->physbase = op->resource[0].start;
|
||||
par->iospace = op->resource[0].flags & IORESOURCE_BITS;
|
||||
} else {
|
||||
all->par.physbase = op->resource[1].start;
|
||||
all->par.iospace = op->resource[0].flags & IORESOURCE_BITS;
|
||||
par->physbase = op->resource[1].start;
|
||||
par->iospace = op->resource[0].flags & IORESOURCE_BITS;
|
||||
}
|
||||
|
||||
all->par.regs = of_ioremap(&op->resource[0], 0,
|
||||
sizeof(struct cg14_regs), "cg14 regs");
|
||||
all->par.clut = of_ioremap(&op->resource[0], CG14_CLUT1,
|
||||
sizeof(struct cg14_clut), "cg14 clut");
|
||||
all->par.cursor = of_ioremap(&op->resource[0], CG14_CURSORREGS,
|
||||
sizeof(struct cg14_cursor), "cg14 cursor");
|
||||
par->regs = of_ioremap(&op->resource[0], 0,
|
||||
sizeof(struct cg14_regs), "cg14 regs");
|
||||
par->clut = of_ioremap(&op->resource[0], CG14_CLUT1,
|
||||
sizeof(struct cg14_clut), "cg14 clut");
|
||||
par->cursor = of_ioremap(&op->resource[0], CG14_CURSORREGS,
|
||||
sizeof(struct cg14_cursor), "cg14 cursor");
|
||||
|
||||
all->info.screen_base = of_ioremap(&op->resource[1], 0,
|
||||
all->par.fbsize, "cg14 ram");
|
||||
info->screen_base = of_ioremap(&op->resource[1], 0,
|
||||
par->fbsize, "cg14 ram");
|
||||
|
||||
if (!all->par.regs || !all->par.clut || !all->par.cursor ||
|
||||
!all->info.screen_base)
|
||||
cg14_unmap_regs(op, all);
|
||||
if (!par->regs || !par->clut || !par->cursor || !info->screen_base)
|
||||
goto out_unmap_regs;
|
||||
|
||||
is_8mb = (((op->resource[1].end - op->resource[1].start) + 1) ==
|
||||
(8 * 1024 * 1024));
|
||||
|
||||
BUILD_BUG_ON(sizeof(all->par.mmap_map) != sizeof(__cg14_mmap_map));
|
||||
BUILD_BUG_ON(sizeof(par->mmap_map) != sizeof(__cg14_mmap_map));
|
||||
|
||||
memcpy(&all->par.mmap_map, &__cg14_mmap_map,
|
||||
sizeof(all->par.mmap_map));
|
||||
memcpy(&par->mmap_map, &__cg14_mmap_map, sizeof(par->mmap_map));
|
||||
|
||||
for (i = 0; i < CG14_MMAP_ENTRIES; i++) {
|
||||
struct sbus_mmap_map *map = &all->par.mmap_map[i];
|
||||
struct sbus_mmap_map *map = &par->mmap_map[i];
|
||||
|
||||
if (!map->size)
|
||||
break;
|
||||
@@ -536,59 +534,55 @@ static int __devinit cg14_init_one(struct of_device *op)
|
||||
map->size *= 2;
|
||||
}
|
||||
|
||||
all->par.mode = MDI_8_PIX;
|
||||
all->par.ramsize = (is_8mb ? 0x800000 : 0x400000);
|
||||
par->mode = MDI_8_PIX;
|
||||
par->ramsize = (is_8mb ? 0x800000 : 0x400000);
|
||||
|
||||
all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
|
||||
all->info.fbops = &cg14_ops;
|
||||
all->info.par = &all->par;
|
||||
info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
|
||||
info->fbops = &cg14_ops;
|
||||
|
||||
__cg14_reset(&all->par);
|
||||
__cg14_reset(par);
|
||||
|
||||
if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
|
||||
cg14_unmap_regs(op, all);
|
||||
kfree(all);
|
||||
return -ENOMEM;
|
||||
}
|
||||
fb_set_cmap(&all->info.cmap, &all->info);
|
||||
if (fb_alloc_cmap(&info->cmap, 256, 0))
|
||||
goto out_unmap_regs;
|
||||
|
||||
cg14_init_fix(&all->info, linebytes, dp);
|
||||
fb_set_cmap(&info->cmap, info);
|
||||
|
||||
err = register_framebuffer(&all->info);
|
||||
if (err < 0) {
|
||||
fb_dealloc_cmap(&all->info.cmap);
|
||||
cg14_unmap_regs(op, all);
|
||||
kfree(all);
|
||||
return err;
|
||||
}
|
||||
cg14_init_fix(info, linebytes, dp);
|
||||
|
||||
dev_set_drvdata(&op->dev, all);
|
||||
err = register_framebuffer(info);
|
||||
if (err < 0)
|
||||
goto out_dealloc_cmap;
|
||||
|
||||
dev_set_drvdata(&op->dev, info);
|
||||
|
||||
printk("%s: cgfourteen at %lx:%lx, %dMB\n",
|
||||
dp->full_name,
|
||||
all->par.iospace, all->par.physbase,
|
||||
all->par.ramsize >> 20);
|
||||
par->iospace, par->physbase,
|
||||
par->ramsize >> 20);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __devinit cg14_probe(struct of_device *dev, const struct of_device_id *match)
|
||||
{
|
||||
struct of_device *op = to_of_device(&dev->dev);
|
||||
out_dealloc_cmap:
|
||||
fb_dealloc_cmap(&info->cmap);
|
||||
|
||||
return cg14_init_one(op);
|
||||
out_unmap_regs:
|
||||
cg14_unmap_regs(op, info, par);
|
||||
|
||||
out_err:
|
||||
return err;
|
||||
}
|
||||
|
||||
static int __devexit cg14_remove(struct of_device *op)
|
||||
{
|
||||
struct all_info *all = dev_get_drvdata(&op->dev);
|
||||
struct fb_info *info = dev_get_drvdata(&op->dev);
|
||||
struct cg14_par *par = info->par;
|
||||
|
||||
unregister_framebuffer(&all->info);
|
||||
fb_dealloc_cmap(&all->info.cmap);
|
||||
unregister_framebuffer(info);
|
||||
fb_dealloc_cmap(&info->cmap);
|
||||
|
||||
cg14_unmap_regs(op, all);
|
||||
cg14_unmap_regs(op, info, par);
|
||||
|
||||
kfree(all);
|
||||
framebuffer_release(info);
|
||||
|
||||
dev_set_drvdata(&op->dev, NULL);
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user