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rk31: add initial support

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This commit is contained in:
黄涛
2012-07-17 14:47:33 +08:00
parent 323e1a575e
commit 3145fc703e
13 changed files with 93 additions and 38 deletions
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13
arch/arm/Kconfig
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@@ -895,6 +895,19 @@ config ARCH_RK30
help
Support for Rockchip's RK30xx SoCs.
config ARCH_RK31
bool "Rockchip RK31xx"
select PLAT_RK
select CPU_V7
select ARM_GIC
select RK_PL330_DMA
select HAVE_SMP
select MIGHT_HAVE_CACHE_L2X0
select ARM_ERRATA_764369
select ARM_ERRATA_754322
help
Support for Rockchip's RK31xx SoCs.
config PLAT_SPEAR
bool "ST SPEAr"
select ARM_AMBA

1
arch/arm/Makefile
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@@ -174,6 +174,7 @@ machine-$(CONFIG_ARCH_REALVIEW) := realview
machine-$(CONFIG_ARCH_RK29) := rk29
machine-$(CONFIG_ARCH_RK2928) := rk2928
machine-$(CONFIG_ARCH_RK30) := rk30
machine-$(CONFIG_ARCH_RK31) := rk30
machine-$(CONFIG_ARCH_RPC) := rpc
machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2416 s3c2440 s3c2443
machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0

12
arch/arm/mach-rk30/Kconfig
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@@ -24,3 +24,15 @@ config MACH_RK30_PHONE_A22
endchoice
endif
if ARCH_RK31
choice
prompt "RK31xx Board Type"
config MACH_RK31_FPGA
bool "RK31 FPGA board"
endchoice
endif

3
arch/arm/mach-rk30/Makefile
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@@ -1,5 +1,7 @@
ifneq ($(CONFIG_MACH_RK31_FPGA),y)
obj-y += clock.o
obj-y += clock_data.o
endif
obj-y += common.o
CFLAGS_common.o += -DTEXT_OFFSET=$(TEXT_OFFSET)
obj-y += ddr.o
@@ -27,3 +29,4 @@ obj-$(CONFIG_MACH_RK30_PHONE_LOQUAT) += board-rk30-phone-loquat.o board-rk30-pho
obj-$(CONFIG_MACH_RK30_DS1001B) += board-rk30-ds1001b.o board-rk30-ds1001b-key.o board-rk30-ds1001b-rfkill.o
obj-$(CONFIG_MACH_RK30_PHONE_A22) += board-rk30-phone-a22.o board-rk30-phone-a22-key.o
obj-$(CONFIG_MACH_RK31_FPGA) += board-rk31-fpga.o

6
arch/arm/mach-rk30/devices.c
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@@ -51,6 +51,7 @@ struct platform_device device_adc = {
};
#endif
#ifdef CONFIG_ARCH_RK30
static struct resource rk30_tsadc_resource[] = {
{
.start = IRQ_TSADC,
@@ -64,12 +65,13 @@ static struct resource rk30_tsadc_resource[] = {
},
};
struct platform_device device_tsadc = {
static struct platform_device device_tsadc = {
.name = "rk30-tsadc",
.id = -1,
.num_resources = ARRAY_SIZE(rk30_tsadc_resource),
.resource = rk30_tsadc_resource,
};
#endif
static u64 dma_dmamask = DMA_BIT_MASK(32);
@@ -1161,7 +1163,9 @@ static int __init rk30_init_devices(void)
#ifdef CONFIG_ADC_RK30
platform_device_register(&device_adc);
#endif
#ifdef CONFIG_ARCH_RK30
platform_device_register(&device_tsadc);
#endif
rk30_init_sdmmc();
#if defined(CONFIG_FIQ_DEBUGGER) && defined(DEBUG_UART_PHYS)
rk_serial_debug_init(DEBUG_UART_BASE, IRQ_DEBUG_UART, IRQ_UART_SIGNAL, -1);

27
arch/arm/mach-rk30/include/mach/io.h
View File

@@ -26,7 +26,11 @@
#define RK30_IMEM_PHYS 0x10080000
#define RK30_IMEM_BASE IOMEM(0xFEF00000)
#define RK30_IMEM_NONCACHED RK30_IO_TO_VIRT0(RK30_IMEM_PHYS)
#ifdef CONFIG_ARCH_RK31
#define RK30_IMEM_SIZE SZ_16K
#else
#define RK30_IMEM_SIZE SZ_64K
#endif
#define RK30_GPU_PHYS 0x10090000
#define RK30_GPU_SIZE SZ_64K
@@ -36,8 +40,10 @@
#define RK30_VCODEC_SIZE SZ_16K
#define RK30_CIF0_PHYS 0x10108000
#define RK30_CIF0_SIZE SZ_8K
#ifdef CONFIG_ARCH_RK30
#define RK30_CIF1_PHYS 0x1010a000
#define RK30_CIF1_SIZE SZ_8K
#endif
#define RK30_LCDC0_PHYS 0x1010c000
#define RK30_LCDC0_SIZE SZ_8K
#define RK30_LCDC1_PHYS 0x1010e000
@@ -46,14 +52,18 @@
#define RK30_IPP_SIZE SZ_16K
#define RK30_RGA_PHYS 0x10114000
#define RK30_RGA_SIZE SZ_8K
#ifdef CONFIG_ARCH_RK30
#define RK30_HDMI_PHYS 0x10116000
#define RK30_HDMI_SIZE SZ_8K
#define RK30_I2S0_8CH_PHYS 0x10118000
#define RK30_I2S0_8CH_SIZE SZ_8K
#endif
#define RK30_I2S1_2CH_PHYS 0x1011a000
#define RK30_I2S1_2CH_SIZE SZ_8K
#ifdef CONFIG_ARCH_RK30
#define RK30_I2S2_2CH_PHYS 0x1011c000
#define RK30_I2S2_2CH_SIZE SZ_8K
#endif
#define RK30_SPDIF_PHYS 0x1011e000
#define RK30_SPDIF_SIZE SZ_8K
@@ -133,9 +143,11 @@
#define RK30_GRF_PHYS 0x20008000
#define RK30_GRF_BASE RK30_IO_TO_VIRT1(RK30_GRF_PHYS)
#define RK30_GRF_SIZE SZ_8K
#ifdef CONFIG_ARCH_RK30
#define RK30_GPIO6_PHYS 0x2000a000
#define RK30_GPIO6_BASE RK30_IO_TO_VIRT1(RK30_GPIO6_PHYS)
#define RK30_GPIO6_SIZE SZ_8K
#endif
#define RK30_TIMER2_PHYS 0x2000e000
#define RK30_TIMER2_BASE RK30_IO_TO_VIRT1(RK30_TIMER2_PHYS)
@@ -159,7 +171,11 @@
#define RK30_PWM01_PHYS 0x20030000
#define RK30_PWM01_BASE RK30_IO_TO_VIRT1(RK30_PWM01_PHYS)
#define RK30_PWM01_SIZE SZ_16K
#ifdef CONFIG_ARCH_RK31
#define RK30_GPIO0_PHYS 0x2000a000
#else
#define RK30_GPIO0_PHYS 0x20034000
#endif
#define RK30_GPIO0_BASE RK30_IO_TO_VIRT1(RK30_GPIO0_PHYS)
#define RK30_GPIO0_SIZE SZ_16K
#define RK30_TIMER0_PHYS 0x20038000
@@ -189,8 +205,10 @@
#define RK30_I2C3_SIZE SZ_16K
#define RK30_I2C4_PHYS 0x2005c000
#define RK30_I2C4_SIZE SZ_16K
#ifdef CONFIG_ARCH_RK30
#define RK30_TSADC_PHYS 0x20060000
#define RK30_TSADC_SIZE SZ_16K
#endif
#define RK30_UART2_PHYS 0x20064000
#define RK30_UART2_BASE RK30_IO_TO_VIRT1(RK30_UART2_PHYS)
#define RK30_UART2_SIZE SZ_16K
@@ -210,9 +228,18 @@
#define RK30_GPIO3_PHYS 0x20080000
#define RK30_GPIO3_BASE RK30_IO_TO_VIRT1(RK30_GPIO3_PHYS)
#define RK30_GPIO3_SIZE SZ_16K
#ifdef CONFIG_ARCH_RK30
#define RK30_GPIO4_PHYS 0x20084000
#define RK30_GPIO4_BASE RK30_IO_TO_VIRT1(RK30_GPIO4_PHYS)
#define RK30_GPIO4_SIZE SZ_16K
#endif
#ifdef CONFIG_ARCH_RK31
#define RK31_GPS_PHYS 0x10230000
#define RK31_GPS_SIZE SZ_64K
#define RK31_HSIC_PHYS 0x10240000
#define RK31_HSIC_SIZE SZ_256K
#endif
#if CONFIG_RK_DEBUG_UART == 0
#define DEBUG_UART_PHYS RK30_UART0_PHYS

5
arch/arm/mach-rk30/include/mach/irqs.h
View File

@@ -12,6 +12,8 @@
#define IRQ_DMAC2_0 RK30XX_IRQ(2)
#define IRQ_DMAC2_1 RK30XX_IRQ(3)
#define IRQ_DDR_PCTL RK30XX_IRQ(4)
#define IRQ_HSIC 37
#define IRQ_GPU 39
#define IRQ_GPU_GP RK30XX_IRQ(5)
#define IRQ_GPU_MMU RK30XX_IRQ(6)
#define IRQ_GPU_PP RK30XX_IRQ(7)
@@ -25,7 +27,7 @@
#define IRQ_IPP RK30XX_IRQ(15)
#define IRQ_USB_OTG RK30XX_IRQ(16)
#define IRQ_USB_HOST RK30XX_IRQ(17)
#define IRQ_GPS 50
#define IRQ_MAC RK30XX_IRQ(19)
#define IRQ_I2S2_2CH RK30XX_IRQ(20)
#define IRQ_TSADC RK30XX_IRQ(21)
@@ -79,6 +81,7 @@
#define IRQ_PMU_STOP_EXIT_INT RK30XX_IRQ(69)
#define IRQ_OBSERVER_MAINFAULT RK30XX_IRQ(70)
#define IRQ_VPU_OBSRV_MAINFAULT RK30XX_IRQ(71)
#define IRQ_ARM_PMU 103
#define IRQ_PERI_OBSRV_MAINFAULT RK30XX_IRQ(72)
#define IRQ_VIO1_OBSRV_MAINFAULT RK30XX_IRQ(73)
#define IRQ_VIO0_OBSRV_MAINFAULT RK30XX_IRQ(74)

2
arch/arm/mach-rk30/io.c
View File

@@ -46,8 +46,10 @@ static struct map_desc rk30_io_desc[] __initdata = {
RK30_DEVICE(GPIO1),
RK30_DEVICE(GPIO2),
RK30_DEVICE(GPIO3),
#ifdef CONFIG_ARCH_RK30
RK30_DEVICE(GPIO4),
RK30_DEVICE(GPIO6),
#endif
RK30_DEVICE(TIMER0),
RK30_DEVICE(TIMER1),
RK30_DEVICE(TIMER2),

4
arch/arm/mach-rk30/pm.c
View File

@@ -190,10 +190,12 @@ static noinline void rk30_pm_dump_irq(void)
printk("wakeup gpio2: %08x\n", readl_relaxed(RK30_GPIO2_BASE + GPIO_INT_STATUS));
if (irq_gpio & 8)
printk("wakeup gpio3: %08x\n", readl_relaxed(RK30_GPIO3_BASE + GPIO_INT_STATUS));
#ifdef CONFIG_ARCH_RK30
if (irq_gpio & 0x10)
printk("wakeup gpio4: %08x\n", readl_relaxed(RK30_GPIO4_BASE + GPIO_INT_STATUS));
if (irq_gpio & 0x40)
printk("wakeup gpio6: %08x\n", readl_relaxed(RK30_GPIO6_BASE + GPIO_INT_STATUS));
#endif
}
#define DUMP_GPIO_INTEN(ID) \
@@ -212,8 +214,10 @@ static noinline void rk30_pm_dump_inten(void)
DUMP_GPIO_INTEN(1);
DUMP_GPIO_INTEN(2);
DUMP_GPIO_INTEN(3);
#ifdef CONFIG_ARCH_RK30
DUMP_GPIO_INTEN(4);
DUMP_GPIO_INTEN(6);
#endif
}
static void pm_pll_wait_lock(int pll_idx)

1
arch/arm/tools/mach-types
View File

@@ -572,6 +572,7 @@ ventana MACH_VENTANA VENTANA 2927
rk29 MACH_RK29 RK29 2929
rk2928 ARCH_RK2928 RK2928 2928
rk30 ARCH_RK30 RK30 3066
rk31 ARCH_RK31 RK31 3066
#ec4350sdb MACH_EC4350SDB EC4350SDB 2929
mimas MACH_MIMAS MIMAS 2930
titan MACH_TITAN TITAN 2931

3
drivers/gpio/Makefile
View File

@@ -46,8 +46,9 @@ obj-$(CONFIG_MACH_U300) += gpio-u300.o
obj-$(CONFIG_PLAT_NOMADIK) += gpio-nomadik.o
obj-$(CONFIG_GPIO_RDC321X) += rdc321x-gpio.o
obj-$(CONFIG_ARCH_RK29) += gpio-rk29.o
obj-$(CONFIG_ARCH_RK30) += gpio-rk30.o
obj-$(CONFIG_ARCH_RK2928) += gpio-rk30.o
obj-$(CONFIG_ARCH_RK30) += gpio-rk30.o
obj-$(CONFIG_ARCH_RK31) += gpio-rk30.o
obj-$(CONFIG_GPIO_JANZ_TTL) += janz-ttl.o
obj-$(CONFIG_GPIO_SX150X) += sx150x.o
obj-$(CONFIG_GPIO_VX855) += vx855_gpio.o

52
drivers/gpio/gpio-rk30.c
View File

@@ -34,9 +34,23 @@
#ifdef CONFIG_ARCH_RK30
#define MAX_PIN RK30_PIN6_PB7
#endif
#ifdef CONFIG_ARCH_RK2928
#elif defined(CONFIG_ARCH_RK31)
#define MAX_PIN RK30_PIN3_PD7
#elif defined(CONFIG_ARCH_RK2928)
#define MAX_PIN RK2928_PIN3_PD7
#define RK30_GPIO0_PHYS RK2928_GPIO0_PHYS
#define RK30_GPIO0_BASE RK2928_GPIO0_BASE
#define RK30_GPIO0_SIZE RK2928_GPIO0_SIZE
#define RK30_GPIO1_PHYS RK2928_GPIO1_PHYS
#define RK30_GPIO1_BASE RK2928_GPIO1_BASE
#define RK30_GPIO1_SIZE RK2928_GPIO1_SIZE
#define RK30_GPIO2_PHYS RK2928_GPIO2_PHYS
#define RK30_GPIO2_BASE RK2928_GPIO2_BASE
#define RK30_GPIO2_SIZE RK2928_GPIO2_SIZE
#define RK30_GPIO3_PHYS RK2928_GPIO3_PHYS
#define RK30_GPIO3_BASE RK2928_GPIO3_BASE
#define RK30_GPIO3_SIZE RK2928_GPIO3_SIZE
#define RK30_GRF_BASE RK2928_GRF_BASE
#endif
#define to_rk30_gpio_bank(c) container_of(c, struct rk30_gpio_bank, chip)
@@ -62,7 +76,6 @@ static int rk30_gpiolib_direction_input(struct gpio_chip *chip,unsigned offset);
static int rk30_gpiolib_pull_updown(struct gpio_chip *chip, unsigned offset, unsigned enable);
static int rk30_gpiolib_to_irq(struct gpio_chip *chip,unsigned offset);
#ifdef CONFIG_ARCH_RK30
#define RK30_GPIO_BANK(ID) \
{ \
.chip = { \
@@ -81,27 +94,6 @@ static int rk30_gpiolib_to_irq(struct gpio_chip *chip,unsigned offset);
.irq = IRQ_GPIO##ID, \
.regbase = (unsigned char __iomem *) RK30_GPIO##ID##_BASE, \
}
#endif
#ifdef CONFIG_ARCH_RK2928
#define RK30_GPIO_BANK(ID) \
{ \
.chip = { \
.label = "gpio" #ID, \
.direction_input = rk30_gpiolib_direction_input, \
.direction_output = rk30_gpiolib_direction_output, \
.get = rk30_gpiolib_get, \
.set = rk30_gpiolib_set, \
.pull_updown = rk30_gpiolib_pull_updown, \
.dbg_show = rk30_gpiolib_dbg_show, \
.to_irq = rk30_gpiolib_to_irq, \
.base = ID < 6 ? PIN_BASE + ID*NUM_GROUP : PIN_BASE + 5*NUM_GROUP, \
.ngpio = ID < 6 ? NUM_GROUP : 16, \
}, \
.id = ID, \
.irq = IRQ_GPIO##ID, \
.regbase = (unsigned char __iomem *) RK2928_GPIO##ID##_BASE, \
}
#endif
static struct rk30_gpio_bank rk30_gpio_banks[] = {
RK30_GPIO_BANK(0),
@@ -332,18 +324,10 @@ static int rk30_gpiolib_pull_updown(struct gpio_chip *chip, unsigned offset, uns
unsigned long flags;
spin_lock_irqsave(&bank->lock, flags);
#ifdef CONFIG_ARCH_RK30
if(offset>=16)
rk30_gpio_bit_op((void *__iomem) RK30_GRF_BASE, GRF_GPIO0H_PULL + bank->id * 8, (1<<offset) | offset_to_bit(offset-16), !enable);
rk30_gpio_bit_op((void *__iomem) RK30_GRF_BASE, GRF_GPIO0H_PULL + bank->id * 8, (1<<offset) | offset_to_bit(offset-16), !enable);
else
rk30_gpio_bit_op((void *__iomem) RK30_GRF_BASE, GRF_GPIO0L_PULL + bank->id * 8, (1<<(offset+16)) | offset_to_bit(offset), !enable);
#endif
#ifdef CONFIG_ARCH_RK2928
if(offset>=16)
rk30_gpio_bit_op((void *__iomem) RK2928_GRF_BASE, GRF_GPIO0H_PULL + bank->id * 8, (1<<offset) | offset_to_bit(offset-16), !enable);
else
rk30_gpio_bit_op((void *__iomem) RK2928_GRF_BASE, GRF_GPIO0L_PULL + bank->id * 8, (1<<(offset+16)) | offset_to_bit(offset), !enable);
#endif
rk30_gpio_bit_op((void *__iomem) RK30_GRF_BASE, GRF_GPIO0L_PULL + bank->id * 8, (1<<(offset+16)) | offset_to_bit(offset), !enable);
spin_unlock_irqrestore(&bank->lock, flags);
return 0;

2
drivers/i2c/busses/i2c-rk30.h
View File

@@ -44,7 +44,7 @@
#define rk30_ceil(x, y) \
({ unsigned long __x = (x), __y = (y); (__x + __y - 1) / __y; })
#ifdef CONFIG_ARCH_RK30
#if defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK31)
#define GRF_I2C_CON_BASE (RK30_GRF_BASE + GRF_SOC_CON1)
#endif
#ifdef CONFIG_ARCH_RK2928