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Merge tag 'powerpc-6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Browse Source 
Pull powerpc updates from Michael Ellerman:

 - Add support for syscall stack randomization

 - Add support for atomic operations to the 32 & 64-bit BPF JIT

 - Full support for KASAN on 64-bit Book3E

 - Add a watchdog driver for the new PowerVM hypervisor watchdog

 - Add a number of new selftests for the Power10 PMU support

 - Add a driver for the PowerVM Platform KeyStore

 - Increase the NMI watchdog timeout during live partition migration, to
   avoid timeouts due to increased memory access latency

 - Add support for using the 'linux,pci-domain' device tree property for
   PCI domain assignment

 - Many other small features and fixes

Thanks to Alexey Kardashevskiy, Andy Shevchenko, Arnd Bergmann, Athira
Rajeev, Bagas Sanjaya, Christophe Leroy, Erhard Furtner, Fabiano Rosas,
Greg Kroah-Hartman, Greg Kurz, Haowen Bai, Hari Bathini, Jason A.
Donenfeld, Jason Wang, Jiang Jian, Joel Stanley, Juerg Haefliger, Kajol
Jain, Kees Cook, Laurent Dufour, Madhavan Srinivasan, Masahiro Yamada,
Maxime Bizon, Miaoqian Lin, Murilo Opsfelder Araújo, Nathan Lynch,
Naveen N.  Rao, Nayna Jain, Nicholas Piggin, Ning Qiang, Pali Rohár,
Petr Mladek, Rashmica Gupta, Sachin Sant, Scott Cheloha, Segher
Boessenkool, Stephen Rothwell, Uwe Kleine-König, Wolfram Sang, Xiu
Jianfeng, and Zhouyi Zhou.

* tag 'powerpc-6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (191 commits)
  powerpc/64e: Fix kexec build error
  EDAC/ppc_4xx: Include required of_irq header directly
  powerpc/pci: Fix PHB numbering when using opal-phbid
  powerpc/64: Init jump labels before parse_early_param()
  selftests/powerpc: Avoid GCC 12 uninitialised variable warning
  powerpc/cell/axon_msi: Fix refcount leak in setup_msi_msg_address
  powerpc/xive: Fix refcount leak in xive_get_max_prio
  powerpc/spufs: Fix refcount leak in spufs_init_isolated_loader
  powerpc/perf: Include caps feature for power10 DD1 version
  powerpc: add support for syscall stack randomization
  powerpc: Move system_call_exception() to syscall.c
  powerpc/powernv: rename remaining rng powernv_ functions to pnv_
  powerpc/powernv/kvm: Use darn for H_RANDOM on Power9
  powerpc/powernv: Avoid crashing if rng is NULL
  selftests/powerpc: Fix matrix multiply assist test
  powerpc/signal: Update comment for clarity
  powerpc: make facility_unavailable_exception 64s
  powerpc/platforms/83xx/suspend: Remove write-only global variable
  powerpc/platforms/83xx/suspend: Prevent unloading the driver
  powerpc/platforms/83xx/suspend: Reorder to get rid of a forward declaration
  ...
This commit is contained in:
Linus Torvalds
2022-08-06 16:38:17 -07:00
parent 4d1044fcb9 4cfa6ff24a
commit cae4199f93
276 changed files with 6807 additions and 2118 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
Documentation/ABI/testing/sysfs-bus-event_source-devices-caps Normal file
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@@ -0,0 +1,18 @@
What: /sys/bus/event_source/devices/<dev>/caps
Date: May 2022
KernelVersion: 5.19
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
Description:
Attribute group to describe the capabilities exposed
for a particular pmu. Each attribute of this group can
expose information specific to a PMU, say pmu_name, so that
userspace can understand some of the feature which the
platform specific PMU supports.
One of the example available capability in supported platform
like Intel is pmu_name, which exposes underlying CPU name known
to the PMU driver.
Example output in powerpc:
grep . /sys/bus/event_source/devices/cpu/caps/*
/sys/bus/event_source/devices/cpu/caps/pmu_name:POWER9

6
Documentation/admin-guide/kernel-parameters.txt
View File

@@ -3553,9 +3553,6 @@
noautogroup Disable scheduler automatic task group creation.
nobats [PPC] Do not use BATs for mapping kernel lowmem
on "Classic" PPC cores.
nocache [ARM]
nodsp [SH] Disable hardware DSP at boot time.
@@ -3725,9 +3722,6 @@
nolapic_timer [X86-32,APIC] Do not use the local APIC timer.
noltlbs [PPC] Do not use large page/tlb entries for kernel
lowmem mapping on PPC40x and PPC8xx
nomca [IA-64] Disable machine check abort handling
nomce [X86-32] Disable Machine Check Exception

12
Documentation/admin-guide/sysctl/kernel.rst
View File

@@ -592,6 +592,18 @@ to the guest kernel command line (see
Documentation/admin-guide/kernel-parameters.rst).
nmi_wd_lpm_factor (PPC only)
============================
Factor to apply to the NMI watchdog timeout (only when ``nmi_watchdog`` is
set to 1). This factor represents the percentage added to
``watchdog_thresh`` when calculating the NMI watchdog timeout during an
LPM. The soft lockup timeout is not impacted.
A value of 0 means no change. The default value is 200 meaning the NMI
watchdog is set to 30s (based on ``watchdog_thresh`` equal to 10).
numa_balancing
==============

231
Documentation/powerpc/elf_hwcaps.rst Normal file
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@@ -0,0 +1,231 @@
.. _elf_hwcaps_powerpc:
==================
POWERPC ELF HWCAPs
==================
This document describes the usage and semantics of the powerpc ELF HWCAPs.
1. Introduction
---------------
Some hardware or software features are only available on some CPU
implementations, and/or with certain kernel configurations, but have no other
discovery mechanism available to userspace code. The kernel exposes the
presence of these features to userspace through a set of flags called HWCAPs,
exposed in the auxiliary vector.
Userspace software can test for features by acquiring the AT_HWCAP or
AT_HWCAP2 entry of the auxiliary vector, and testing whether the relevant
flags are set, e.g.::
bool floating_point_is_present(void)
{
unsigned long HWCAPs = getauxval(AT_HWCAP);
if (HWCAPs & PPC_FEATURE_HAS_FPU)
return true;
return false;
}
Where software relies on a feature described by a HWCAP, it should check the
relevant HWCAP flag to verify that the feature is present before attempting to
make use of the feature.
HWCAP is the preferred method to test for the presence of a feature rather
than probing through other means, which may not be reliable or may cause
unpredictable behaviour.
Software that targets a particular platform does not necessarily have to
test for required or implied features. For example if the program requires
FPU, VMX, VSX, it is not necessary to test those HWCAPs, and it may be
impossible to do so if the compiler generates code requiring those features.
2. Facilities
-------------
The Power ISA uses the term "facility" to describe a class of instructions,
registers, interrupts, etc. The presence or absence of a facility indicates
whether this class is available to be used, but the specifics depend on the
ISA version. For example, if the VSX facility is available, the VSX
instructions that can be used differ between the v3.0B and v3.1B ISA
versions.
3. Categories
-------------
The Power ISA before v3.0 uses the term "category" to describe certain
classes of instructions and operating modes which may be optional or
mutually exclusive, the exact meaning of the HWCAP flag may depend on
context, e.g., the presence of the BOOKE feature implies that the server
category is not implemented.
4. HWCAP allocation
-------------------
HWCAPs are allocated as described in Power Architecture 64-Bit ELF V2 ABI
Specification (which will be reflected in the kernel's uapi headers).
5. The HWCAPs exposed in AT_HWCAP
---------------------------------
PPC_FEATURE_32
32-bit CPU
PPC_FEATURE_64
64-bit CPU (userspace may be running in 32-bit mode).
PPC_FEATURE_601_INSTR
The processor is PowerPC 601.
Unused in the kernel since f0ed73f3fa2c ("powerpc: Remove PowerPC 601")
PPC_FEATURE_HAS_ALTIVEC
Vector (aka Altivec, VMX) facility is available.
PPC_FEATURE_HAS_FPU
Floating point facility is available.
PPC_FEATURE_HAS_MMU
Memory management unit is present and enabled.
PPC_FEATURE_HAS_4xxMAC
The processor is 40x or 44x family.
PPC_FEATURE_UNIFIED_CACHE
The processor has a unified L1 cache for instructions and data, as
found in NXP e200.
Unused in the kernel since 39c8bf2b3cc1 ("powerpc: Retire e200 core (mpc555x processor)")
PPC_FEATURE_HAS_SPE
Signal Processing Engine facility is available.
PPC_FEATURE_HAS_EFP_SINGLE
Embedded Floating Point single precision operations are available.
PPC_FEATURE_HAS_EFP_DOUBLE
Embedded Floating Point double precision operations are available.
PPC_FEATURE_NO_TB
The timebase facility (mftb instruction) is not available.
This is a 601 specific HWCAP, so if it is known that the processor
running is not a 601, via other HWCAPs or other means, it is not
required to test this bit before using the timebase.
Unused in the kernel since f0ed73f3fa2c ("powerpc: Remove PowerPC 601")
PPC_FEATURE_POWER4
The processor is POWER4 or PPC970/FX/MP.
POWER4 support dropped from the kernel since 471d7ff8b51b ("powerpc/64s: Remove POWER4 support")
PPC_FEATURE_POWER5
The processor is POWER5.
PPC_FEATURE_POWER5_PLUS
The processor is POWER5+.
PPC_FEATURE_CELL
The processor is Cell.
PPC_FEATURE_BOOKE
The processor implements the embedded category ("BookE") architecture.
PPC_FEATURE_SMT
The processor implements SMT.
PPC_FEATURE_ICACHE_SNOOP
The processor icache is coherent with the dcache, and instruction storage
can be made consistent with data storage for the purpose of executing
instructions with the sequence (as described in, e.g., POWER9 Processor
User's Manual, 4.6.2.2 Instruction Cache Block Invalidate (icbi))::
sync
icbi (to any address)
isync
PPC_FEATURE_ARCH_2_05
The processor supports the v2.05 userlevel architecture. Processors
supporting later architectures DO NOT set this feature.
PPC_FEATURE_PA6T
The processor is PA6T.
PPC_FEATURE_HAS_DFP
DFP facility is available.
PPC_FEATURE_POWER6_EXT
The processor is POWER6.
PPC_FEATURE_ARCH_2_06
The processor supports the v2.06 userlevel architecture. Processors
supporting later architectures also set this feature.
PPC_FEATURE_HAS_VSX
VSX facility is available.
PPC_FEATURE_PSERIES_PERFMON_COMPAT
The processor supports architected PMU events in the range 0xE0-0xFF.
PPC_FEATURE_TRUE_LE
The processor supports true little-endian mode.
PPC_FEATURE_PPC_LE
The processor supports "PowerPC Little-Endian", that uses address
munging to make storage access appear to be little-endian, but the
data is stored in a different format that is unsuitable to be
accessed by other agents not running in this mode.
6. The HWCAPs exposed in AT_HWCAP2
----------------------------------
PPC_FEATURE2_ARCH_2_07
The processor supports the v2.07 userlevel architecture. Processors
supporting later architectures also set this feature.
PPC_FEATURE2_HTM
Transactional Memory feature is available.
PPC_FEATURE2_DSCR
DSCR facility is available.
PPC_FEATURE2_EBB
EBB facility is available.
PPC_FEATURE2_ISEL
isel instruction is available. This is superseded by ARCH_2_07 and
later.
PPC_FEATURE2_TAR
TAR facility is available.
PPC_FEATURE2_VEC_CRYPTO
v2.07 crypto instructions are available.
PPC_FEATURE2_HTM_NOSC
System calls fail if called in a transactional state, see
Documentation/powerpc/syscall64-abi.rst
PPC_FEATURE2_ARCH_3_00
The processor supports the v3.0B / v3.0C userlevel architecture. Processors
supporting later architectures also set this feature.
PPC_FEATURE2_HAS_IEEE128
IEEE 128-bit binary floating point is supported with VSX
quad-precision instructions and data types.
PPC_FEATURE2_DARN
darn instruction is available.
PPC_FEATURE2_SCV
The scv 0 instruction may be used for system calls, see
Documentation/powerpc/syscall64-abi.rst.
PPC_FEATURE2_HTM_NO_SUSPEND
A limited Transactional Memory facility that does not support suspend is
available, see Documentation/powerpc/transactional_memory.rst.
PPC_FEATURE2_ARCH_3_1
The processor supports the v3.1 userlevel architecture. Processors
supporting later architectures also set this feature.
PPC_FEATURE2_MMA
MMA facility is available.

1
Documentation/powerpc/index.rst
View File

@@ -17,6 +17,7 @@ powerpc
dawr-power9
dscr
eeh-pci-error-recovery
elf_hwcaps
elfnote
firmware-assisted-dump
hvcs

12
Documentation/watchdog/watchdog-parameters.rst
View File

@@ -425,6 +425,18 @@ pnx833x_wdt:
-------------------------------------------------
pseries-wdt:
action:
Action taken when watchdog expires: 0 (power off), 1 (restart),
2 (dump and restart). (default=1)
timeout:
Initial watchdog timeout in seconds. (default=60)
nowayout:
Watchdog cannot be stopped once started.
(default=kernel config parameter)
-------------------------------------------------
rc32434_wdt:
timeout:
Watchdog timeout value, in seconds (default=20)

4
MAINTAINERS
View File

@@ -11628,8 +11628,8 @@ F: drivers/macintosh/
LINUX FOR POWERPC (32-BIT AND 64-BIT)
M: Michael Ellerman <mpe@ellerman.id.au>
R: Benjamin Herrenschmidt <benh@kernel.crashing.org>
R: Paul Mackerras <paulus@samba.org>
R: Nicholas Piggin <npiggin@gmail.com>
R: Christophe Leroy <christophe.leroy@csgroup.eu>
L: linuxppc-dev@lists.ozlabs.org
S: Supported
W: https://github.com/linuxppc/wiki/wiki

19
arch/powerpc/Kconfig
View File

@@ -11,7 +11,7 @@ config 64BIT
config LIVEPATCH_64
def_bool PPC64
depends on LIVEPATCH
depends on LIVEPATCH
config MMU
bool
@@ -192,8 +192,10 @@ config PPC
select HAVE_ARCH_JUMP_LABEL_RELATIVE
select HAVE_ARCH_KASAN if PPC32 && PPC_PAGE_SHIFT <= 14
select HAVE_ARCH_KASAN if PPC_RADIX_MMU
select HAVE_ARCH_KASAN if PPC_BOOK3E_64
select HAVE_ARCH_KASAN_VMALLOC if HAVE_ARCH_KASAN
select HAVE_ARCH_KFENCE if PPC_BOOK3S_32 || PPC_8xx || 40x
select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET
select HAVE_ARCH_KGDB
select HAVE_ARCH_MMAP_RND_BITS
select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT
@@ -253,6 +255,7 @@ config PPC
select IOMMU_HELPER if PPC64
select IRQ_DOMAIN
select IRQ_FORCED_THREADING
select KASAN_VMALLOC if KASAN && MODULES
select MMU_GATHER_PAGE_SIZE
select MMU_GATHER_RCU_TABLE_FREE
select MMU_GATHER_MERGE_VMAS
@@ -376,6 +379,17 @@ config PPC_DCR
depends on PPC_DCR_NATIVE || PPC_DCR_MMIO
default y
config PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT
depends on PPC32
depends on !PPC_PMAC && !PPC_CHRP
bool "Assign PCI bus numbers from zero individually for each PCI domain"
help
By default on PPC32 were PCI bus numbers unique across all PCI domains.
So system could have only 256 PCI buses independently of available
PCI domains. When this option is enabled then PCI bus numbers are
PCI domain dependent and each PCI controller on own domain can have
256 PCI buses, like it is on other Linux architectures.
config PPC_OF_PLATFORM_PCI
bool
depends on PCI
@@ -452,7 +466,7 @@ choice
default MATH_EMULATION_FULL
depends on MATH_EMULATION
config MATH_EMULATION_FULL
config MATH_EMULATION_FULL
bool "Emulate all the floating point instructions"
help
Select this option will enable the kernel to support to emulate
@@ -554,7 +568,6 @@ config KEXEC_FILE
bool "kexec file based system call"
select KEXEC_CORE
select HAVE_IMA_KEXEC if IMA
select BUILD_BIN2C
select KEXEC_ELF
depends on PPC64
depends on CRYPTO=y

4
arch/powerpc/Kconfig.debug
View File

@@ -305,7 +305,6 @@ config PPC_EARLY_DEBUG_OPAL
def_bool y
depends on PPC_EARLY_DEBUG_OPAL_RAW || PPC_EARLY_DEBUG_OPAL_HVSI
config PPC_EARLY_DEBUG_HVSI_VTERMNO
hex "vterm number to use with early debug HVSI"
depends on PPC_EARLY_DEBUG_LPAR_HVSI
@@ -375,4 +374,5 @@ config KASAN_SHADOW_OFFSET
hex
depends on KASAN
default 0xe0000000 if PPC32
default 0xa80e000000000000 if PPC64
default 0xa80e000000000000 if PPC_BOOK3S_64
default 0xa8001c0000000000 if PPC_BOOK3E_64

34
arch/powerpc/Makefile
View File

@@ -15,23 +15,6 @@ HAS_BIARCH := $(call cc-option-yn, -m32)
# Set default 32 bits cross compilers for vdso and boot wrapper
CROSS32_COMPILE ?=
ifeq ($(HAS_BIARCH),y)
ifeq ($(CROSS32_COMPILE),)
ifdef CONFIG_PPC32
# These options will be overridden by any -mcpu option that the CPU
# or platform code sets later on the command line, but they are needed
# to set a sane 32-bit cpu target for the 64-bit cross compiler which
# may default to the wrong ISA.
KBUILD_CFLAGS += -mcpu=powerpc
KBUILD_AFLAGS += -mcpu=powerpc
endif
endif
endif
ifdef CONFIG_PPC_BOOK3S_32
KBUILD_CFLAGS += -mcpu=powerpc
endif
# If we're on a ppc/ppc64/ppc64le machine use that defconfig, otherwise just use
# ppc64_defconfig because we have nothing better to go on.
uname := $(shell uname -m)
@@ -183,24 +166,11 @@ endif
endif
CFLAGS-$(CONFIG_TARGET_CPU_BOOL) += $(call cc-option,-mcpu=$(CONFIG_TARGET_CPU))
AFLAGS-$(CONFIG_TARGET_CPU_BOOL) += $(call cc-option,-mcpu=$(CONFIG_TARGET_CPU))
# Altivec option not allowed with e500mc64 in GCC.
ifdef CONFIG_ALTIVEC
E5500_CPU := -mcpu=powerpc64
else
E5500_CPU := $(call cc-option,-mcpu=e500mc64,-mcpu=powerpc64)
endif
CFLAGS-$(CONFIG_E5500_CPU) += $(E5500_CPU)
CFLAGS-$(CONFIG_E5500_CPU) += $(call cc-option,-mcpu=e500mc64,-mcpu=powerpc64)
CFLAGS-$(CONFIG_E6500_CPU) += $(call cc-option,-mcpu=e6500,$(E5500_CPU))
ifdef CONFIG_PPC32
ifdef CONFIG_PPC_E500MC
CFLAGS-y += $(call cc-option,-mcpu=e500mc,-mcpu=powerpc)
else
CFLAGS-$(CONFIG_E500) += $(call cc-option,-mcpu=8540 -msoft-float,-mcpu=powerpc)
endif
endif
asinstr := $(call as-instr,lis 9$(comma)foo@high,-DHAVE_AS_ATHIGH=1)
KBUILD_CPPFLAGS += -I $(srctree)/arch/$(ARCH) $(asinstr)

3
arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
View File

@@ -48,6 +48,7 @@
bus-range = <0 255>;
clock-frequency = <33333333>;
interrupts = <26 2 0 0>;
law_trgt_if = <2>;
pcie@0 {
reg = <0 0 0 0 0>;
@@ -76,6 +77,7 @@
bus-range = <0 255>;
clock-frequency = <33333333>;
interrupts = <25 2 0 0>;
law_trgt_if = <1>;
pcie@0 {
reg = <0 0 0 0 0>;
@@ -105,6 +107,7 @@
bus-range = <0 255>;
clock-frequency = <33333333>;
interrupts = <24 2 0 0>;
law_trgt_if = <0>;
pcie@0 {
reg = <0 0 0 0 0>;

483
arch/powerpc/boot/dts/turris1x.dts Normal file
View File

@@ -0,0 +1,483 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Turris 1.x Device Tree Source
*
* Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/)
*
* Pinout, Schematics and Altium hardware design files are open source
* and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/leds/common.h>
/include/ "fsl/p2020si-pre.dtsi"
/ {
model = "Turris 1.x";
compatible = "cznic,turris1x", "fsl,P2020RDB-PC"; /* fsl,P2020RDB-PC is required for booting Linux */
aliases {
ethernet0 = &enet0;
ethernet1 = &enet1;
ethernet2 = &enet2;
serial0 = &serial0;
serial1 = &serial1;
pci0 = &pci0;
pci1 = &pci1;
pci2 = &pci2;
spi0 = &spi0;
};
memory {
device_type = "memory";
};
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x00100000>;
i2c@3000 {
/* PCA9557PW GPIO controller for boot config */
gpio-controller@18 {
compatible = "nxp,pca9557";
label = "bootcfg";
reg = <0x18>;
#gpio-cells = <2>;
gpio-controller;
polarity = <0x00>;
};
/* STM32F030R8T6 MCU for power control */
power-control@2a {
/*
* Turris Power Control firmware runs on STM32F0 MCU.
* This firmware is open source and available at:
* https://gitlab.nic.cz/turris/hw/turris_power_control
*/
reg = <0x2a>;
};
/* DDR3 SPD/EEPROM PSWP instruction */
eeprom@32 {
reg = <0x32>;
};
/* SA56004ED temperature control */
temperature-sensor@4c {
compatible = "nxp,sa56004";
reg = <0x4c>;
interrupt-parent = <&gpio>;
interrupts = <12 IRQ_TYPE_LEVEL_LOW>, /* GPIO12 - ALERT pin */
<13 IRQ_TYPE_LEVEL_LOW>; /* GPIO13 - CRIT pin */
};
/* DDR3 SPD/EEPROM */
eeprom@52 {
compatible = "atmel,spd";
reg = <0x52>;
};
/* MCP79402-I/ST Protected EEPROM */
eeprom@57 {
reg = <0x57>;
};
/* ATSHA204-TH-DA-T crypto module */
crypto@64 {
compatible = "atmel,atsha204";
reg = <0x64>;
};
/* IDT6V49205BNLGI clock generator */
clock-generator@69 {
compatible = "idt,6v49205b";
reg = <0x69>;
};
/* MCP79402-I/ST RTC */
rtc@6f {
compatible = "microchip,mcp7940x";
reg = <0x6f>;
interrupt-parent = <&gpio>;
interrupts = <14 0>; /* GPIO14 - MFP pin */
};
};
/* SPI on connector P1 */
spi0: spi@7000 {
};
gpio: gpio-controller@fc00 {
#interrupt-cells = <2>;
interrupt-controller;
};
/* Connected to SMSC USB2412-DZK 2-Port USB 2.0 Hub Controller */
usb@22000 {
phy_type = "ulpi";
dr_mode = "host";
};
enet0: ethernet@24000 {
/* Connected to port 6 of QCA8337N-AL3C switch */
phy-connection-type = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
mdio@24520 {
/* KSZ9031RNXCA ethernet phy for WAN port */
phy: ethernet-phy@7 {
interrupts = <3 1 0 0>;
reg = <0x7>;
};
/* QCA8337N-AL3C switch with integrated ethernet PHYs for LAN ports */
switch@10 {
compatible = "qca,qca8337";
interrupts = <2 1 0 0>;
reg = <0x10>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "cpu1";
ethernet = <&enet1>;
phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@1 {
reg = <1>;
label = "lan5";
};
port@2 {
reg = <2>;
label = "lan4";
};
port@3 {
reg = <3>;
label = "lan3";
};
port@4 {
reg = <4>;
label = "lan2";
};
port@5 {
reg = <5>;
label = "lan1";
};
port@6 {
reg = <6>;
label = "cpu0";
ethernet = <&enet0>;
phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
ptp_clock@24e00 {
fsl,tclk-period = <5>;
fsl,tmr-prsc = <200>;
fsl,tmr-add = <0xcccccccd>;
fsl,tmr-fiper1 = <0x3b9ac9fb>;
fsl,tmr-fiper2 = <0x0001869b>;
fsl,max-adj = <249999999>;
};
enet1: ethernet@25000 {
/* Connected to port 0 of QCA8337N-AL3C switch */
phy-connection-type = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
mdio@25520 {
status = "disabled";
};
enet2: ethernet@26000 {
/* Connected to KSZ9031RNXCA ethernet phy (WAN port) */
label = "wan";
phy-handle = <&phy>;
phy-connection-type = "rgmii-id";
};
mdio@26520 {
status = "disabled";
};
sdhc@2e000 {
bus-width = <4>;
cd-gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
};
};
lbc: localbus@ffe05000 {
reg = <0 0xffe05000 0 0x1000>;
ranges = <0x0 0x0 0x0 0xef000000 0x01000000>, /* NOR */
<0x1 0x0 0x0 0xff800000 0x00040000>, /* NAND */
<0x3 0x0 0x0 0xffa00000 0x00020000>; /* CPLD */
/* S29GL128P90TFIR10 NOR */
nor@0,0 {
compatible = "cfi-flash";
reg = <0x0 0x0 0x01000000>;
bank-width = <2>;
device-width = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
/* 128 kB for Device Tree Blob */
reg = <0x00000000 0x00020000>;
label = "dtb";
};
partition@20000 {
/* 1.7 MB for Rescue Linux Kernel Image */
reg = <0x00020000 0x001a0000>;
label = "rescue-kernel";
};
partition@1c0000 {
/* 1.5 MB for Rescue JFFS2 Root File System */
reg = <0x001c0000 0x00180000>;
label = "rescue-rootfs";
};
partition@340000 {
/* 11 MB for TAR.XZ Backup with content of NAND Root File System */
reg = <0x00340000 0x00b00000>;
label = "backup-rootfs";
};
partition@e40000 {
/* 768 kB for Certificates JFFS2 File System */
reg = <0x00e40000 0x000c0000>;
label = "certificates";
};
/* free unused space 0x00f00000-0x00f20000 */
partition@f20000 {
/* 128 kB for U-Boot Environment Variables */
reg = <0x00f20000 0x00020000>;
label = "u-boot-env";
};
partition@f40000 {
/* 768 kB for U-Boot Bootloader Image */
reg = <0x00f40000 0x000c0000>;
label = "u-boot";
};
};
};
/* MT29F2G08ABAEAWP:E NAND */
nand@1,0 {
compatible = "fsl,p2020-fcm-nand", "fsl,elbc-fcm-nand";
reg = <0x1 0x0 0x00040000>;
nand-ecc-mode = "soft";
nand-ecc-algo = "bch";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
/* 256 MB for UBI with one volume: UBIFS Root File System */
reg = <0x00000000 0x10000000>;
label = "rootfs";
};
};
};
/* LCMXO1200C-3FTN256C FPGA */
cpld@3,0 {
/*
* Turris CPLD firmware which runs on this Lattice FPGA,
* is extended version of P1021RDB-PC CPLD v4.1 firmware.
* It is backward compatible with its original version
* and the only extension is support for Turris LEDs.
* Turris CPLD firmware is open source and available at:
* https://gitlab.nic.cz/turris/hw/turris_cpld/-/blob/master/CZ_NIC_Router_CPLD.v
*/
compatible = "cznic,turris1x-cpld", "fsl,p1021rdb-pc-cpld", "simple-bus", "syscon";
reg = <0x3 0x0 0x30>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x3 0x0 0x00020000>;
/* MAX6370KA+T watchdog */
watchdog@2 {
/*
* CPLD firmware maps SET0, SET1 and SET2
* input logic of MAX6370KA+T chip to CPLD
* memory space at byte offset 0x2. WDI
* input logic is outside of the CPLD and
* connected via external GPIO.
*/
compatible = "maxim,max6370";
reg = <0x02 0x01>;
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
reboot@d {
compatible = "syscon-reboot";
reg = <0x0d 0x01>;
offset = <0x0d>;
mask = <0x01>;
value = <0x01>;
};
led-controller@13 {
/*
* LEDs are controlled by CPLD firmware.
* All five LAN LEDs share common RGB settings
* and so it is not possible to set different
* colors on different LAN ports.
*/
compatible = "cznic,turris1x-leds";
reg = <0x13 0x1d>;
#address-cells = <1>;
#size-cells = <0>;
multi-led@0 {
reg = <0x0>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_WAN;
};
multi-led@1 {
reg = <0x1>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_LAN;
function-enumerator = <5>;
};
multi-led@2 {
reg = <0x2>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_LAN;
function-enumerator = <4>;
};
multi-led@3 {
reg = <0x3>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_LAN;
function-enumerator = <3>;
};
multi-led@4 {
reg = <0x4>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
};
multi-led@5 {
reg = <0x5>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
};
multi-led@6 {
reg = <0x6>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_WLAN;
};
multi-led@7 {
reg = <0x7>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_POWER;
};
};
};
};
pci2: pcie@ffe08000 {
/*
* PCIe bus for on-board TUSB7340RKM USB 3.0 xHCI controller.
* This xHCI controller is available only on Turris 1.1 boards.
* Turris 1.0 boards have nothing connected to this PCIe bus,
* so system would see only PCIe Root Port of this PCIe Root
* Complex. TUSB7340RKM xHCI controller has four SuperSpeed
* channels. Channel 0 is connected to the front USB 3.0 port,
* channel 1 (but only USB 2.0 subset) to USB 2.0 pins on mPCIe
* slot 1 (CN5), channels 2 and 3 to connector P600.
*
* P2020 PCIe Root Port uses 1MB of PCIe MEM and xHCI controller
* uses 64kB + 8kB of PCIe MEM. No PCIe IO is used or required.
* So allocate 2MB of PCIe MEM for this PCIe bus.
*/
reg = <0 0xffe08000 0 0x1000>;
ranges = <0x02000000 0x0 0xc0000000 0 0xc0000000 0x0 0x00200000>, /* MEM */
<0x01000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>; /* IO */
pcie@0 {
ranges;
};
};
pci1: pcie@ffe09000 {
/* PCIe bus on mPCIe slot 2 (CN6) for expansion mPCIe card */
reg = <0 0xffe09000 0 0x1000>;
ranges = <0x02000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>, /* MEM */
<0x01000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>; /* IO */
pcie@0 {
ranges;
};
};
pci0: pcie@ffe0a000 {
/*
* PCIe bus on mPCIe slot 1 (CN5) for expansion mPCIe card.
* Turris 1.1 boards have in this mPCIe slot additional USB 2.0
* pins via channel 1 of TUSB7340RKM xHCI controller and also
* additional SIM card slot, both for USB-based WWAN cards.
*/
reg = <0 0xffe0a000 0 0x1000>;
ranges = <0x02000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000>, /* MEM */
<0x01000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>; /* IO */
pcie@0 {
ranges;
};
};
};
/include/ "fsl/p2020si-post.dtsi"

2
arch/powerpc/configs/44x/akebono_defconfig
View File

@@ -118,7 +118,7 @@ CONFIG_CRAMFS=y
CONFIG_NLS_DEFAULT="n"
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_XMON=y

2
arch/powerpc/configs/44x/currituck_defconfig
View File

@@ -73,7 +73,7 @@ CONFIG_NFS_FS=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_NLS_DEFAULT="n"
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_XMON=y

2
arch/powerpc/configs/44x/fsp2_defconfig
View File

@@ -110,7 +110,7 @@ CONFIG_XZ_DEC=y
CONFIG_PRINTK_TIME=y
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=3
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_CRYPTO_CBC=y

2
arch/powerpc/configs/44x/iss476-smp_defconfig
View File

@@ -56,7 +56,7 @@ CONFIG_PROC_KCORE=y
CONFIG_TMPFS=y
CONFIG_CRAMFS=y
# CONFIG_NETWORK_FILESYSTEMS is not set
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_PPC_EARLY_DEBUG=y

2
arch/powerpc/configs/44x/warp_defconfig
View File

@@ -88,7 +88,7 @@ CONFIG_NLS_UTF8=y
CONFIG_CRC_CCITT=y
CONFIG_CRC_T10DIF=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
CONFIG_DEBUG_FS=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DETECT_HUNG_TASK=y

2
arch/powerpc/configs/52xx/lite5200b_defconfig
View File

@@ -58,6 +58,6 @@ CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
CONFIG_DETECT_HUNG_TASK=y
# CONFIG_DEBUG_BUGVERBOSE is not set

2
arch/powerpc/configs/52xx/motionpro_defconfig
View File

@@ -84,7 +84,7 @@ CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
CONFIG_DETECT_HUNG_TASK=y
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_CRYPTO_ECB=y

2
arch/powerpc/configs/52xx/tqm5200_defconfig
View File

@@ -85,7 +85,7 @@ CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
CONFIG_DETECT_HUNG_TASK=y
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_CRYPTO_ECB=y

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