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Merge tag 'devicetree-fixes-for-5.6-3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree fixes from Rob Herring:
"Another batch of DT fixes. I think this should be the last of it, but
sending pull requests seems to cause people to send more fixes.
Summary:
- Fixes for warnings introduced by hierarchical PSCI binding changes
- Fixes for broken doc references due to DT schema conversions
- Several grammar and typo fixes
- Fix a bunch of dtc warnings in examples"
* tag 'devicetree-fixes-for-5.6-3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
dt-bindings: arm: Fixup the DT bindings for hierarchical PSCI states
dt-bindings: power: Extend nodename pattern for power-domain providers
MAINTAINERS: update ALLWINNER CPUFREQ DRIVER entry
dt-bindings: bus: Drop empty compatible string in example
dt-bindings: power: Convert domain-idle-states bindings to json-schema
dt-bindings: arm: Fix cpu compatibles in the hierarchical example for PSCI
dt-bindings: arm: Correct links to idle states definitions
dt-bindings: mfd: Fix typo in file name of twl-familly.txt
dt-bindings: mfd: tps65910: Improve grammar
dt-bindings: mfd: zii,rave-sp: Fix a typo ("onborad")
dt-bindings: arm: fsl: fix APF6Dev compatible
dt-bindings: Fix dtc warnings in examples
docs: dt: fix several broken doc references
docs: dt: fix several broken references due to renames
MAINTAINERS: clean up PCIE DRIVER FOR CAVIUM THUNDERX
This commit is contained in:
Linus Torvalds
@@ -102,7 +102,7 @@ Required sub-node properties:
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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[2] Documentation/devicetree/bindings/power/power-domain.yaml
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[3] Documentation/devicetree/bindings/thermal/thermal.txt
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[4] Documentation/devicetree/bindings/sram/sram.txt
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[4] Documentation/devicetree/bindings/sram/sram.yaml
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[5] Documentation/devicetree/bindings/reset/reset.txt
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Example:
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@@ -109,7 +109,7 @@ Required properties:
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[0] http://infocenter.arm.com/help/topic/com.arm.doc.dui0922b/index.html
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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[2] Documentation/devicetree/bindings/thermal/thermal.txt
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[3] Documentation/devicetree/bindings/sram/sram.txt
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[3] Documentation/devicetree/bindings/sram/sram.yaml
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[4] Documentation/devicetree/bindings/power/power-domain.yaml
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Example:
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@@ -62,7 +62,7 @@ Timer node:
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Syscon reboot node:
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See Documentation/devicetree/bindings/power/reset/syscon-reboot.txt for the
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See Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml for the
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detailed list of properties, the two values defined below are specific to the
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BCM6328-style timer:
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@@ -216,7 +216,7 @@ properties:
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$ref: '/schemas/types.yaml#/definitions/phandle-array'
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description: |
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List of phandles to idle state nodes supported
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by this cpu (see ./idle-states.txt).
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by this cpu (see ./idle-states.yaml).
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capacity-dmips-mhz:
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$ref: '/schemas/types.yaml#/definitions/uint32'
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@@ -160,7 +160,7 @@ properties:
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items:
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- enum:
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- armadeus,imx6dl-apf6 # APF6 (Solo) SoM
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- armadeus,imx6dl-apf6dldev # APF6 (Solo) SoM on APF6Dev board
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- armadeus,imx6dl-apf6dev # APF6 (Solo) SoM on APF6Dev board
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- eckelmann,imx6dl-ci4x10
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- emtrion,emcon-mx6 # emCON-MX6S or emCON-MX6DL SoM
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- emtrion,emcon-mx6-avari # emCON-MX6S or emCON-MX6DL SoM on Avari Base
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@@ -1,7 +1,7 @@
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* Hisilicon Hi3519 System Controller Block
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This bindings use the following binding:
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Documentation/devicetree/bindings/mfd/syscon.txt
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Documentation/devicetree/bindings/mfd/syscon.yaml
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Required properties:
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- compatible: "hisilicon,hi3519-sysctrl".
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@@ -81,4 +81,4 @@ Example:
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};
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};
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[1]. Documentation/devicetree/bindings/arm/idle-states.txt
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[1]. Documentation/devicetree/bindings/arm/idle-states.yaml
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@@ -17,7 +17,7 @@ am335x and am437x only:
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- pm-sram: Phandles to ocmcram nodes to be used for power management.
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First should be type 'protect-exec' for the driver to use to copy
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and run PM functions, second should be regular pool to be used for
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data region for code. See Documentation/devicetree/bindings/sram/sram.txt
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data region for code. See Documentation/devicetree/bindings/sram/sram.yaml
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for more details.
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Examples:
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@@ -100,13 +100,14 @@ properties:
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bindings in [1]) must specify this property.
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[1] Kernel documentation - ARM idle states bindings
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Documentation/devicetree/bindings/arm/idle-states.txt
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"#power-domain-cells":
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description:
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The number of cells in a PM domain specifier as per binding in [3].
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Must be 0 as to represent a single PM domain.
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Documentation/devicetree/bindings/arm/idle-states.yaml
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patternProperties:
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"^power-domain-":
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allOf:
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- $ref: "../power/power-domain.yaml#"
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type: object
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description: |
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ARM systems can have multiple cores, sometimes in an hierarchical
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arrangement. This often, but not always, maps directly to the processor
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power topology of the system. Individual nodes in a topology have their
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@@ -122,14 +123,8 @@ properties:
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helps to implement support for OSI mode and OS implementations may choose
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to mandate it.
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[3] Documentation/devicetree/bindings/power/power_domain.txt
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[4] Documentation/devicetree/bindings/power/domain-idle-state.txt
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power-domains:
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$ref: '/schemas/types.yaml#/definitions/phandle-array'
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description:
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List of phandles and PM domain specifiers, as defined by bindings of the
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PM domain provider.
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[3] Documentation/devicetree/bindings/power/power-domain.yaml
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[4] Documentation/devicetree/bindings/power/domain-idle-state.yaml
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required:
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- compatible
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@@ -199,7 +194,7 @@ examples:
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CPU0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53", "arm,armv8";
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compatible = "arm,cortex-a53";
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reg = <0x0>;
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enable-method = "psci";
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power-domains = <&CPU_PD0>;
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@@ -208,7 +203,7 @@ examples:
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CPU1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a57", "arm,armv8";
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compatible = "arm,cortex-a53";
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reg = <0x100>;
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enable-method = "psci";
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power-domains = <&CPU_PD1>;
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@@ -224,6 +219,9 @@ examples:
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exit-latency-us = <10>;
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min-residency-us = <100>;
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};
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};
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domain-idle-states {
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CLUSTER_RET: cluster-retention {
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compatible = "domain-idle-state";
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@@ -247,19 +245,19 @@ examples:
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compatible = "arm,psci-1.0";
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method = "smc";
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CPU_PD0: cpu-pd0 {
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CPU_PD0: power-domain-cpu0 {
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#power-domain-cells = <0>;
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domain-idle-states = <&CPU_PWRDN>;
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power-domains = <&CLUSTER_PD>;
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};
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CPU_PD1: cpu-pd1 {
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CPU_PD1: power-domain-cpu1 {
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#power-domain-cells = <0>;
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domain-idle-states = <&CPU_PWRDN>;
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power-domains = <&CLUSTER_PD>;
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};
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CLUSTER_PD: cluster-pd {
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CLUSTER_PD: power-domain-cluster {
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#power-domain-cells = <0>;
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domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;
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};
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@@ -52,7 +52,7 @@ required:
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examples:
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- |
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mlahb: ahb {
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mlahb: ahb@38000000 {
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compatible = "st,mlahb", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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@@ -70,7 +70,6 @@ examples:
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#size-cells = <0>;
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pmic@3e3 {
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compatible = "...";
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reg = <0x3e3>;
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/* ... */
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@@ -40,7 +40,7 @@ additionalProperties: false
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examples:
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- |
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osc24M: clk@01c20050 {
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osc24M: clk@1c20050 {
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#clock-cells = <0>;
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compatible = "allwinner,sun4i-a10-osc-clk";
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reg = <0x01c20050 0x4>;
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@@ -41,7 +41,7 @@ additionalProperties: false
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examples:
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- |
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clk@0600005c {
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clk@600005c {
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#clock-cells = <0>;
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compatible = "allwinner,sun9i-a80-gt-clk";
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reg = <0x0600005c 0x4>;
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@@ -42,7 +42,7 @@ properties:
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be part of GCC and hence the TSENS properties can also be part
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of the GCC/clock-controller node.
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For more details on the TSENS properties please refer
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Documentation/devicetree/bindings/thermal/qcom-tsens.txt
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Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
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nvmem-cell-names:
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minItems: 1
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@@ -49,11 +49,7 @@ examples:
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resets = <&tcon_ch0_clk 0>;
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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tve0_in_tcon0: endpoint@0 {
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reg = <0>;
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tve0_in_tcon0: endpoint {
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remote-endpoint = <&tcon0_out_tve0>;
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};
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};
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@@ -79,21 +79,15 @@ examples:
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#size-cells = <0>;
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anx6345_in: port@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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anx6345_in_tcon0: endpoint@0 {
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reg = <0>;
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anx6345_in_tcon0: endpoint {
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remote-endpoint = <&tcon0_out_anx6345>;
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};
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};
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anx6345_out: port@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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anx6345_out_panel: endpoint@0 {
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reg = <0>;
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anx6345_out_panel: endpoint {
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remote-endpoint = <&panel_in_edp>;
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};
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};
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@@ -37,6 +37,8 @@ examples:
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dsi@ff450000 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xff450000 0x1000>;
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panel@0 {
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compatible = "leadtek,ltk500hd1829";
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reg = <0>;
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@@ -37,6 +37,8 @@ examples:
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dsi@ff450000 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xff450000 0x1000>;
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panel@0 {
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compatible = "xinpeng,xpp055c272";
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reg = <0>;
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@@ -174,10 +174,6 @@ examples:
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};
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};
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soc@1c00000 {
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lcdc0: lcdc@1c0c000 {
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compatible = "allwinner,sun4i-a10-lcdc";
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};
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};
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lcdc0: lcdc { };
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...
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@@ -37,7 +37,7 @@ Optional nodes:
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supports a single port with a single endpoint.
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- See also Documentation/devicetree/bindings/display/tilcdc/panel.txt and
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Documentation/devicetree/bindings/display/tilcdc/tfp410.txt for connecting
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Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt for connecting
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tfp410 DVI encoder or lcd panel to lcdc
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[1] There is an errata about AM335x color wiring. For 16-bit color mode
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