Fix PCI SATA link training instability on rock-5-itx

Based on upstream initial dts definition.

Signed-off-by: Alban Browaeys <alban.browaeys@gmail.com>

arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts

@@ -984,6 +984,8 @@
 };
 
 &pcie30phy {
+	/* separate clock lines from the clock generator to phy and devices */
+	rockchip,rx-common-refclk-mode = <0 0 0 0>;
 	rockchip,pcie30-phymode = <PHY_MODE_PCIE_NANBNB>;
 	status = "okay";
 };