arch: arm64: dts: add overlay for pcie on rock-2

This commit is contained in:
ChenJiali
2025-03-03 16:28:53 +08:00
committed by Jianfeng Liu
parent e090871063
commit 573481cc59
2 changed files with 48 additions and 0 deletions

View File

@@ -91,6 +91,7 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
nanopi-m6-spi-nor-flash.dtbo \
rockchip-rk3588-opp-oc-24ghz.dtbo \
rockchip-rk3588-panthor-gpu.dtbo \
rk3528-rock-2-enable-pcie.dtbo \
rk3566-roc-pc-sata2.dtbo \
rk3576-can1-m1.dtbo \
rk3576-i2c0-m1.dtbo \

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@@ -0,0 +1,47 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
/ {
metadata {
title = "Enable PCIe";
compatible = "radxa,rock-2";
category = "misc";
exclusive = "pcie2x1";
description = "After enabling PCIe, the USB OTG port supports up to high speed";
};
};
&{/} {
vcc3v3_pcie: vcc3v3-pcie {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <5000>;
enable-active-high;
gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_sys>;
};
};
&pcie_usb_selection {
enable-active-high;
gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
};
&usbdrd_dwc3 {
phys = <&u2phy_otg>;
phy-names = "usb2-phy";
maximum-speed = "high-speed";
snps,dis_u2_susphy_quirk;
snps,usb2-lpm-disable;
};
&pcie2x1 {
reset-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};