arm64: dts: rockchip: add the Orange Pi CM5

This commit is contained in:
Joshua Riek
2024-07-23 17:57:01 -04:00
committed by Ricardo Pardini
parent 5893bb74ae
commit 55095cd0ea
11 changed files with 1739 additions and 0 deletions

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@@ -328,6 +328,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5-sata.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-cm5.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-radxa-cm5-io.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-radxa-cm5-rpi-cm4-io.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-radxa-nx5-io.dtb

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@@ -0,0 +1,70 @@
/dts-v1/;
/plugin/;
/ {
compatible = "rockchip,rk3588s-orangepi-cm5", "rockchip,rk3588";
fragment@0 {
target = <&leds>;
__overlay__ {
status = "okay";
gpio1_b3@0 {
gpios = <&gpio1 11 0>;
label = "gpio1_b3";
linux,default-trigger = "heartbeat";
linux,default-trigger-delay-ms = <0>;
};
gpio1_b1@1 {
gpios = <&gpio1 9 0>;
label = "gpio1_b1";
linux,default-trigger = "heartbeat";
linux,default-trigger-delay-ms = <0>;
};
gpio1_b4@2 {
gpios = <&gpio1 12 0>;
label = "gpio1_b4";
linux,default-trigger = "heartbeat";
linux,default-trigger-delay-ms = <0>;
};
gpio1_b2@3 {
gpios = <&gpio1 10 0>;
label = "gpio1_b2";
linux,default-trigger = "heartbeat";
linux,default-trigger-delay-ms = <0>;
};
gpio1_b7@4 {
gpios = <&gpio1 15 0>;
label = "gpio1_b7";
linux,default-trigger = "heartbeat";
linux,default-trigger-delay-ms = <0>;
};
gpio1_b6@5 {
gpios = <&gpio1 14 0>;
label = "gpio1_b6";
linux,default-trigger = "heartbeat";
linux,default-trigger-delay-ms = <0>;
};
gpio4_b2@6 {
gpios = <&gpio4 10 0>;
label = "gpio4_b2";
linux,default-trigger = "heartbeat";
linux,default-trigger-delay-ms = <0>;
};
gpio4_b3@7 {
gpios = <&gpio4 11 0>;
label = "gpio4_b3";
linux,default-trigger = "heartbeat";
linux,default-trigger-delay-ms = <0>;
};
};
};
};

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@@ -0,0 +1,60 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&csi2_dphy1>;
__overlay__ {
status = "okay";
};
};
fragment@1 {
target = <&mipi2_csi2>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&rkcif_mipi_lvds2>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target = <&rkcif_mipi_lvds2_sditf>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&rkisp0_vir0>;
__overlay__ {
status = "okay";
};
};
fragment@5 {
target = <&i2c4>;
__overlay__ {
status = "okay";
ov5647-1@36 {
status = "okay";
};
imx219-1@10 {
status = "okay";
};
};
};
};

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@@ -0,0 +1,60 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&csi2_dphy2>;
__overlay__ {
status = "okay";
};
};
fragment@1 {
target = <&mipi3_csi2>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&rkcif_mipi_lvds3>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target = <&rkcif_mipi_lvds3_sditf>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&rkisp0_vir1>;
__overlay__ {
status = "okay";
};
};
fragment@5 {
target = <&i2c3>;
__overlay__ {
status = "okay";
ov5647-2@36 {
status = "okay";
};
imx219-2@10 {
status = "okay";
};
};
};
};

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@@ -0,0 +1,68 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&csi2_dcphy1>;
__overlay__ {
status = "okay";
};
};
fragment@1 {
target = <&mipi1_csi2>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&rkcif_mipi_lvds1>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target = <&rkcif_mipi_lvds1_sditf>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&rkisp1>;
__overlay__ {
status = "okay";
};
};
fragment@5 {
target = <&rkisp1_vir1>;
__overlay__ {
status = "okay";
};
};
fragment@6 {
target = <&i2c5>;
__overlay__ {
status = "okay";
ov5647-3@36 {
status = "okay";
};
imx219-3@10 {
status = "okay";
};
};
};
};

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@@ -0,0 +1,68 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&csi2_dcphy0>;
__overlay__ {
status = "okay";
};
};
fragment@1 {
target = <&mipi0_csi2>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&rkcif_mipi_lvds>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target = <&rkcif_mipi_lvds_sditf>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&rkisp1>;
__overlay__ {
status = "okay";
};
};
fragment@5 {
target = <&rkisp1_vir0>;
__overlay__ {
status = "okay";
};
};
fragment@6 {
target = <&i2c6>;
__overlay__ {
status = "okay";
ov5647-4@36 {
status = "okay";
};
imx219-4@10 {
status = "okay";
};
};
};
};

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@@ -0,0 +1,143 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
&csi2_dphy0_hw {
status = "okay";
};
&csi2_dphy1 {
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipidphy1_in_ucam0: endpoint@0 {
reg = <0>;
remote-endpoint = <&ov5647_1_out1>;
data-lanes = <1 2>;
};
mipidphy1_in_ucam1: endpoint@1 {
reg = <1>;
remote-endpoint = <&imx219_1_out1>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidphy0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi2_csi2_input>;
};
};
};
};
&i2c4 {
status = "okay";
ddpinctrl-names = "default";
pinctrl-0 = <&i2c4m3_xfer>;
ov5647_1: ov5647-1@36 {
status = "disabled";
compatible = "ovti,ov5647";
reg = <0x36>;
clocks = <&ext_cam_ov5647_clk>;
clock-names = "ext_cam_ov5647_clk";
pwdn-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "rpi-camera-v1";
rockchip,camera-module-lens-name = "default";
port {
ov5647_1_out1: endpoint {
remote-endpoint = <&mipidphy1_in_ucam0>;
data-lanes = <1 2>;
};
};
};
imx219_1: imx219-1@10 {
status = "disabled";
compatible = "sony,imx219";
reg = <0x10>;
clocks = <&ext_cam_ov5647_clk>;
clock-names = "ext_cam_ov5647_clk";
pwdn-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "rpi-camera-v2";
rockchip,camera-module-lens-name = "default";
port {
imx219_1_out1: endpoint {
remote-endpoint = <&mipidphy1_in_ucam1>;
data-lanes = <1 2>;
};
};
};
};
&mipi2_csi2 {
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi2_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csidphy0_out>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi2_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in2>;
};
};
};
};
&rkcif_mipi_lvds2 {
status = "disabled";
port {
cif_mipi_in2: endpoint {
remote-endpoint = <&mipi2_csi2_output>;
};
};
};
&rkcif_mipi_lvds2_sditf {
status = "disabled";
port {
mipi2_lvds_sditf: endpoint {
remote-endpoint = <&isp0_vir0>;
};
};
};
&rkisp0_vir0 {
status = "disabled";
port {
#address-cells = <1>;
#size-cells = <0>;
isp0_vir0: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi2_lvds_sditf>;
};
};
};

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@@ -0,0 +1,143 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
&csi2_dphy0_hw {
status = "okay";
};
&csi2_dphy2 {
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipidphy2_in_ucam0: endpoint@0 {
reg = <0>;
remote-endpoint = <&ov5647_2_out1>;
data-lanes = <1 2>;
};
mipidphy2_in_ucam1: endpoint@1 {
reg = <1>;
remote-endpoint = <&imx219_2_out1>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidphy2_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi3_csi2_input>;
};
};
};
};
&i2c3 {
status = "okay";
ddpinctrl-names = "default";
pinctrl-0 = <&i2c3m2_xfer>;
ov5647_2: ov5647-2@36 {
status = "disabled";
compatible = "ovti,ov5647";
reg = <0x36>;
clocks = <&ext_cam_ov5647_clk>;
clock-names = "ext_cam_ov5647_clk";
pwdn-gpios = <&gpio1 RK_PD1 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "rpi-camera-v1";
rockchip,camera-module-lens-name = "default";
port {
ov5647_2_out1: endpoint {
remote-endpoint = <&mipidphy2_in_ucam0>;
data-lanes = <1 2>;
};
};
};
imx219_2: imx219-2@10 {
status = "disabled";
compatible = "sony,imx219";
reg = <0x10>;
clocks = <&ext_cam_ov5647_clk>;
clock-names = "ext_cam_ov5647_clk";
pwdn-gpios = <&gpio1 RK_PD1 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "rpi-camera-v2";
rockchip,camera-module-lens-name = "default";
port {
imx219_2_out1: endpoint {
remote-endpoint = <&mipidphy2_in_ucam1>;
data-lanes = <1 2>;
};
};
};
};
&mipi3_csi2 {
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi3_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csidphy2_out>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi3_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in3>;
};
};
};
};
&rkcif_mipi_lvds3 {
status = "disabled";
port {
cif_mipi_in3: endpoint {
remote-endpoint = <&mipi3_csi2_output>;
};
};
};
&rkcif_mipi_lvds3_sditf {
status = "disabled";
port {
mipi3_lvds_sditf: endpoint {
remote-endpoint = <&isp0_vir1>;
};
};
};
&rkisp0_vir1 {
status = "disabled";
port {
#address-cells = <1>;
#size-cells = <0>;
isp0_vir1: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi3_lvds_sditf>;
};
};
};

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@@ -0,0 +1,152 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
&csi2_dcphy1 {
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipidcphy1_in_ucam0: endpoint@0 {
reg = <0>;
remote-endpoint = <&ov5647_3_out1>;
data-lanes = <1 2>;
};
mipidcphy1_in_ucam1: endpoint@1 {
reg = <1>;
remote-endpoint = <&imx219_3_out1>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidcphy1_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi1_csi2_input>;
};
};
};
};
&i2c5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c5m2_xfer>;
ov5647_3: ov5647-3@36 {
status = "disabled";
compatible = "ovti,ov5647";
reg = <0x36>;
clocks = <&ext_cam_ov5647_clk>;
clock-names = "ext_cam_ov5647_clk";
pwdn-gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <2>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "rpi-camera-v1";
rockchip,camera-module-lens-name = "default";
port {
ov5647_3_out1: endpoint {
remote-endpoint = <&mipidcphy1_in_ucam0>;
data-lanes = <1 2>;
};
};
};
imx219_3: imx219-3@10 {
status = "disabled";
compatible = "sony,imx219";
reg = <0x10>;
clocks = <&ext_cam_ov5647_clk>;
clock-names = "ext_cam_ov5647_clk";
pwdn-gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <2>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "rpi-camera-v2";
rockchip,camera-module-lens-name = "default";
port {
imx219_3_out1: endpoint {
remote-endpoint = <&mipidcphy1_in_ucam1>;
data-lanes = <1 2>;
};
};
};
};
&mipi1_csi2 {
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi1_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csidcphy1_out>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi1_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in1>;
};
};
};
};
&rkcif_mipi_lvds1 {
status = "disabled";
port {
cif_mipi_in1: endpoint {
remote-endpoint = <&mipi1_csi2_output>;
};
};
};
&rkcif_mipi_lvds1_sditf {
status = "disabled";
port {
mipi1_lvds_sditf: endpoint {
remote-endpoint = <&isp1_in0>;
};
};
};
&rkisp1_vir1 {
status = "disabled";
port {
#address-cells = <1>;
#size-cells = <0>;
isp1_in0: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi1_lvds_sditf>;
};
};
};

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@@ -0,0 +1,151 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
&csi2_dcphy0 {
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipidcphy0_in_ucam0: endpoint@0 {
reg = <0>;
remote-endpoint = <&ov5647_4_out>;
data-lanes = <1 2>;
};
mipidcphy0_in_ucam1: endpoint@1 {
reg = <1>;
remote-endpoint = <&imx219_4_out>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidcphy0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi0_csi2_input>;
};
};
};
};
&i2c6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c6m3_xfer>;
ov5647_4: ov5647-4@36 {
status = "disabled";
compatible = "ovti,ov5647";
reg = <0x36>;
clocks = <&ext_cam_ov5647_clk>;
clock-names = "ext_cam_ov5647_clk";
pwdn-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <3>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "rpi-camera-v1";
rockchip,camera-module-lens-name = "default";
port {
ov5647_4_out: endpoint {
remote-endpoint = <&mipidcphy0_in_ucam0>;
data-lanes = <1 2>;
};
};
};
imx219_4: imx219-4@10 {
status = "disabled";
compatible = "sony,imx219";
reg = <0x10>;
clocks = <&ext_cam_ov5647_clk>;
clock-names = "ext_cam_ov5647_clk";
pwdn-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <3>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "rpi-camera-v2";
rockchip,camera-module-lens-name = "default";
port {
imx219_4_out: endpoint {
remote-endpoint = <&mipidcphy0_in_ucam1>;
data-lanes = <1 2>;
};
};
};
};
&mipi0_csi2 {
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi0_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csidcphy0_out>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi0_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in0>;
};
};
};
};
&rkcif_mipi_lvds {
status = "disabled";
port {
cif_mipi_in0: endpoint {
remote-endpoint = <&mipi0_csi2_output>;
};
};
};
&rkcif_mipi_lvds_sditf {
status = "disabled";
port {
mipi_lvds_sditf: endpoint {
remote-endpoint = <&isp1_in1>;
};
};
};
&rkisp1_vir0 {
status = "disabled";
port {
#address-cells = <1>;
#size-cells = <0>;
isp1_in1: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_lvds_sditf>;
};
};
};

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