You've already forked linux-rockchip
mirror of
https://github.com/armbian/linux-rockchip.git
synced 2026-01-06 11:08:10 -08:00
arch: arm: dts: add armsom forge1 support
This commit is contained in:
Jianfeng Liu
@@ -1223,6 +1223,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
rk3308hs-voice-module-board-v10-aarch32.dtb \
|
||||
rk3502g-evb1-v10.dtb \
|
||||
rk3503g-evb1-v10.dtb \
|
||||
rk3506-armsom-forge1.dtb \
|
||||
rk3506b-evb1-v10.dtb \
|
||||
rk3506b-test2-v10.dtb \
|
||||
rk3506g-demo-display-control.dtb \
|
||||
|
||||
348
arch/arm/boot/dts/rk3506-armsom-forge1-display-8hd.dtsi
Normal file
348
arch/arm/boot/dts/rk3506-armsom-forge1-display-8hd.dtsi
Normal file
@@ -0,0 +1,348 @@
|
||||
|
||||
/ {
|
||||
backlight: backlight {
|
||||
status = "okay";
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm0_4ch_2 0 25000 0>;
|
||||
brightness-levels = <
|
||||
0 20 20 21 21 22 22 23
|
||||
23 24 24 25 25 26 26 27
|
||||
27 28 28 29 29 30 30 31
|
||||
31 32 32 33 33 34 34 35
|
||||
35 36 36 37 37 38 38 39
|
||||
40 41 42 43 44 45 46 47
|
||||
48 49 50 51 52 53 54 55
|
||||
56 57 58 59 60 61 62 63
|
||||
64 65 66 67 68 69 70 71
|
||||
72 73 74 75 76 77 78 79
|
||||
80 81 82 83 84 85 86 87
|
||||
88 89 90 91 92 93 94 95
|
||||
96 97 98 99 100 101 102 103
|
||||
104 105 106 107 108 109 110 111
|
||||
112 113 114 115 116 117 118 119
|
||||
120 121 122 123 124 125 126 127
|
||||
128 129 130 131 132 133 134 135
|
||||
136 137 138 139 140 141 142 143
|
||||
144 145 146 147 148 149 150 151
|
||||
152 153 154 155 156 157 158 159
|
||||
160 161 162 163 164 165 166 167
|
||||
168 169 170 171 172 173 174 175
|
||||
176 177 178 179 180 181 182 183
|
||||
184 185 186 187 188 189 190 191
|
||||
192 193 194 195 196 197 198 199
|
||||
200 201 202 203 204 205 206 207
|
||||
208 209 210 211 212 213 214 215
|
||||
216 217 218 219 220 221 222 223
|
||||
224 225 226 227 228 229 230 231
|
||||
232 233 234 235 236 237 238 239
|
||||
240 241 242 243 244 245 246 247
|
||||
248 249 250 251 252 253 254 255
|
||||
>;
|
||||
default-brightness-level = <200>;
|
||||
};
|
||||
};
|
||||
|
||||
&display_subsystem {
|
||||
logo-memory-region = <&drm_logo>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi {
|
||||
status = "okay";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dsi_panel: panel@0 {
|
||||
status = "okay";
|
||||
compatible = "simple-panel-dsi";
|
||||
reg = <0>;
|
||||
backlight = <&backlight>;
|
||||
|
||||
power-supply = <&vcc3v3_lcd_n>;
|
||||
width-mm = <107>;
|
||||
height-mm = <199>;
|
||||
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
|
||||
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET)>;
|
||||
dsi,format = <MIPI_DSI_FMT_RGB888>;
|
||||
dsi,lanes = <2>;
|
||||
panel-init-sequence = [
|
||||
15 00 02 E0 00
|
||||
15 00 02 E1 93
|
||||
15 00 02 E2 65
|
||||
15 00 02 E3 F8
|
||||
15 00 02 80 03
|
||||
15 00 02 E0 01
|
||||
15 00 02 00 00
|
||||
15 00 02 01 72
|
||||
15 00 02 03 00
|
||||
15 00 02 04 65
|
||||
15 00 02 0C 74
|
||||
15 00 02 17 00
|
||||
15 00 02 18 B7
|
||||
15 00 02 19 00
|
||||
15 00 02 1A 00
|
||||
15 00 02 1B B7
|
||||
15 00 02 1C 00
|
||||
15 00 02 24 FE
|
||||
15 00 02 37 19
|
||||
15 00 02 38 05
|
||||
15 00 02 39 00
|
||||
15 00 02 3A 01
|
||||
15 00 02 3B 01
|
||||
15 00 02 3C 70
|
||||
15 00 02 3D FF
|
||||
15 00 02 3E FF
|
||||
15 00 02 3F FF
|
||||
15 00 02 40 06
|
||||
15 00 02 41 A0
|
||||
15 00 02 43 1E
|
||||
15 00 02 44 0F
|
||||
15 00 02 45 28
|
||||
15 00 02 4B 04
|
||||
15 00 02 55 02
|
||||
15 00 02 56 01
|
||||
15 00 02 57 A9
|
||||
15 00 02 58 0A
|
||||
15 00 02 59 0A
|
||||
15 00 02 5A 37
|
||||
15 00 02 5B 19
|
||||
15 00 02 5D 78
|
||||
15 00 02 5E 63
|
||||
15 00 02 5F 54
|
||||
15 00 02 60 48
|
||||
15 00 02 61 45
|
||||
15 00 02 62 38
|
||||
15 00 02 63 3D
|
||||
15 00 02 64 28
|
||||
15 00 02 65 43
|
||||
15 00 02 66 41
|
||||
15 00 02 67 43
|
||||
15 00 02 68 62
|
||||
15 00 02 69 50
|
||||
15 00 02 6A 57
|
||||
15 00 02 6B 49
|
||||
15 00 02 6C 44
|
||||
15 00 02 6D 37
|
||||
15 00 02 6E 23
|
||||
15 00 02 6F 10
|
||||
15 00 02 70 78
|
||||
15 00 02 71 63
|
||||
15 00 02 72 54
|
||||
15 00 02 73 49
|
||||
15 00 02 74 45
|
||||
15 00 02 75 38
|
||||
15 00 02 76 3D
|
||||
15 00 02 77 28
|
||||
15 00 02 78 43
|
||||
15 00 02 79 41
|
||||
15 00 02 7A 43
|
||||
15 00 02 7B 62
|
||||
15 00 02 7C 50
|
||||
15 00 02 7D 57
|
||||
15 00 02 7E 49
|
||||
15 00 02 7F 44
|
||||
15 00 02 80 37
|
||||
15 00 02 81 23
|
||||
15 00 02 82 10
|
||||
15 00 02 E0 02
|
||||
15 00 02 00 47
|
||||
15 00 02 01 47
|
||||
15 00 02 02 45
|
||||
15 00 02 03 45
|
||||
15 00 02 04 4B
|
||||
15 00 02 05 4B
|
||||
15 00 02 06 49
|
||||
15 00 02 07 49
|
||||
15 00 02 08 41
|
||||
15 00 02 09 1F
|
||||
15 00 02 0A 1F
|
||||
15 00 02 0B 1F
|
||||
15 00 02 0C 1F
|
||||
15 00 02 0D 1F
|
||||
15 00 02 0E 1F
|
||||
15 00 02 0F 5F
|
||||
15 00 02 10 5F
|
||||
15 00 02 11 57
|
||||
15 00 02 12 77
|
||||
15 00 02 13 35
|
||||
15 00 02 14 1F
|
||||
15 00 02 15 1F
|
||||
15 00 02 16 46
|
||||
15 00 02 17 46
|
||||
15 00 02 18 44
|
||||
15 00 02 19 44
|
||||
15 00 02 1A 4A
|
||||
15 00 02 1B 4A
|
||||
15 00 02 1C 48
|
||||
15 00 02 1D 48
|
||||
15 00 02 1E 40
|
||||
15 00 02 1F 1F
|
||||
15 00 02 20 1F
|
||||
15 00 02 21 1F
|
||||
15 00 02 22 1F
|
||||
15 00 02 23 1F
|
||||
15 00 02 24 1F
|
||||
15 00 02 25 5F
|
||||
15 00 02 26 5F
|
||||
15 00 02 27 57
|
||||
15 00 02 28 77
|
||||
15 00 02 29 35
|
||||
15 00 02 2A 1F
|
||||
15 00 02 2B 1F
|
||||
15 00 02 58 40
|
||||
15 00 02 59 00
|
||||
15 00 02 5A 00
|
||||
15 00 02 5B 10
|
||||
15 00 02 5C 06
|
||||
15 00 02 5D 40
|
||||
15 00 02 5E 01
|
||||
15 00 02 5F 02
|
||||
15 00 02 60 30
|
||||
15 00 02 61 01
|
||||
15 00 02 62 02
|
||||
15 00 02 63 03
|
||||
15 00 02 64 6B
|
||||
15 00 02 65 05
|
||||
15 00 02 66 0C
|
||||
15 00 02 67 73
|
||||
15 00 02 68 09
|
||||
15 00 02 69 03
|
||||
15 00 02 6A 56
|
||||
15 00 02 6B 08
|
||||
15 00 02 6C 00
|
||||
15 00 02 6D 04
|
||||
15 00 02 6E 04
|
||||
15 00 02 6F 88
|
||||
15 00 02 70 00
|
||||
15 00 02 71 00
|
||||
15 00 02 72 06
|
||||
15 00 02 73 7B
|
||||
15 00 02 74 00
|
||||
15 00 02 75 F8
|
||||
15 00 02 76 00
|
||||
15 00 02 77 D5
|
||||
15 00 02 78 2E
|
||||
15 00 02 79 12
|
||||
15 00 02 7A 03
|
||||
15 00 02 7B 00
|
||||
15 00 02 7C 00
|
||||
15 00 02 7D 03
|
||||
15 00 02 7E 7B
|
||||
15 00 02 E0 04
|
||||
15 00 02 00 0E
|
||||
15 00 02 02 B3
|
||||
15 00 02 09 60
|
||||
15 00 02 0E 2A
|
||||
15 00 02 36 59
|
||||
15 00 02 E0 00
|
||||
15 00 02 80 01
|
||||
15 00 02 E0 00
|
||||
15 00 02 11 00
|
||||
15 78 02 29 00
|
||||
];
|
||||
|
||||
panel-exit-sequence = [
|
||||
05 00 01 28
|
||||
05 00 01 10
|
||||
];
|
||||
|
||||
disp_timings0: display-timings {
|
||||
native-mode = <&dsi0_timing0>;
|
||||
dsi0_timing0: timing0 {
|
||||
clock-frequency = <70000000>;
|
||||
hactive = <800>;
|
||||
vactive = <1280>;
|
||||
hsync-len = <20>;
|
||||
hback-porch = <20>;
|
||||
hfront-porch = <40>;
|
||||
vsync-len = <4>;
|
||||
vback-porch = <28>;
|
||||
vfront-porch = <30>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <0>;
|
||||
de-active = <0>;
|
||||
pixelclk-active = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
panel_in_dsi: endpoint {
|
||||
remote-endpoint = <&dsi_out_panel>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
dsi_out_panel: endpoint {
|
||||
remote-endpoint = <&panel_in_dsi>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
// &route_dsi {
|
||||
// status = "okay";
|
||||
// };
|
||||
|
||||
&dsi_dphy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi_in_vop {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rm_io4_i2c2_scl &rm_io5_i2c2_sda>;
|
||||
status = "okay";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gt9xx: gt9xx@14 {
|
||||
status = "okay";
|
||||
compatible = "goodix,gt9xx";
|
||||
reg = <0x14>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <>9xx_gpio>;
|
||||
touch-gpio = <&gpio1 RK_PC5 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
|
||||
max-x = <800>;
|
||||
max-y = <1280>;
|
||||
tp-size = <9112>;
|
||||
tp-supply = <&vcc3v3_lcd_n>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
gt9xx {
|
||||
gt9xx_gpio: gt9xx-gpio {
|
||||
rockchip,pins =
|
||||
<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&vop {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm0_4ch_2 {
|
||||
pinctrl-names = "active";
|
||||
pinctrl-0 = <&rm_io29_pwm0_ch2>;
|
||||
status = "okay";
|
||||
};
|
||||
406
arch/arm/boot/dts/rk3506-armsom-forge1.dts
Normal file
406
arch/arm/boot/dts/rk3506-armsom-forge1.dts
Normal file
@@ -0,0 +1,406 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
// from rk3506b-evb1-v10
|
||||
#include <dt-bindings/display/drm_mipi_dsi.h>
|
||||
#include <dt-bindings/suspend/rockchip-rk3506.h>
|
||||
#include <dt-bindings/input/rk-input.h>
|
||||
#include "rk3506.dtsi"
|
||||
#include "rk3506-armsom-forge1-display-8hd.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Rockchip RK3506J(BGA) ArmSoM Forge1";
|
||||
compatible = "rockchip,rk3506J-armsom-forge1", "rockchip,rk3506";
|
||||
|
||||
vcc12v_dc: vcc12v-dc {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc12v_dc";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
};
|
||||
|
||||
vcc5v0_sys: vcc5v0-sys {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_sys";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&vcc12v_dc>;
|
||||
};
|
||||
|
||||
vcc_3v3: vcc-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
};
|
||||
|
||||
vcc_1v8: vcc-1v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
};
|
||||
|
||||
vcc_ddr: vcc-ddr {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_ddr";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
};
|
||||
|
||||
vdd_arm: vdd-arm {
|
||||
compatible = "pwm-regulator";
|
||||
pwms = <&pwm0_4ch_0 0 5000 1>;
|
||||
regulator-name = "vdd_arm";
|
||||
regulator-min-microvolt = <710000>;
|
||||
regulator-max-microvolt = <1207000>;
|
||||
regulator-init-microvolt = <1011000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-settling-time-up-us = <250>;
|
||||
pwm-supply = <&vcc5v0_sys>;
|
||||
};
|
||||
|
||||
dd_0v9: vdd-0v9 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_0v9";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
};
|
||||
|
||||
vcc3v3_lcd_n: vcc3v3-lcd0-n {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc3v3_lcd_n";
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
enable-active-high;
|
||||
gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
|
||||
vin-supply = <&vcc_3v3>;
|
||||
};
|
||||
|
||||
vcc5v0_otg1: vcc5v0-otg1-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_otg1";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vcc5v0_otg1_en>;
|
||||
};
|
||||
|
||||
fiq_debugger: fiq-debugger {
|
||||
compatible = "rockchip,fiq-debugger";
|
||||
rockchip,serial-id = <0>;
|
||||
rockchip,wake-irq = <0>;
|
||||
rockchip,irq-mode-enable = <1>;
|
||||
rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
|
||||
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
rk730_sound: rk730-sound {
|
||||
compatible = "rockchip,multicodecs-card";
|
||||
rockchip,card-name = "rockchip-rk730";
|
||||
spk-con-gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
hp-det-gpio = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hp_det_pin>;
|
||||
rockchip,pre-power-on-delay-ms = <30>;
|
||||
rockchip,post-power-down-delay-ms = <40>;
|
||||
rockchip,format = "i2s";
|
||||
rockchip,mclk-fs = <512>;
|
||||
rockchip,cpu = <&sai1>;
|
||||
rockchip,codec = <&rk730>;
|
||||
rockchip,audio-routing =
|
||||
"Headphone", "LOUT1",
|
||||
"Headphone", "ROUT1",
|
||||
"Speaker", "LOUT2",
|
||||
"Speaker", "ROUT2",
|
||||
"Headphone", "Headphone Power",
|
||||
"Headphone", "Headphone Power",
|
||||
"Speaker", "Speaker Power",
|
||||
"Speaker", "Speaker Power",
|
||||
"MIC2", "Main Mic",
|
||||
"MIC1", "Main Mic";
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-name = "default";
|
||||
pinctrl-0 = <&work_led>;
|
||||
|
||||
green-led {
|
||||
default-state = "on";
|
||||
gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
|
||||
label = "rockchip:work_led:system";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&can0 {
|
||||
assigned-clocks = <&cru CLK_CAN0>;
|
||||
assigned-clock-rates = <300000000>;
|
||||
pinctrl-0 = <&rm_io19_can0_tx &rm_io20_can0_rx>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cma {
|
||||
size = <0x1600000>;
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <&vdd_arm>;
|
||||
};
|
||||
|
||||
&fspi {
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <80000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&gmac0 {
|
||||
phy-mode = "rmii";
|
||||
clock_in_out = "output";
|
||||
|
||||
snps,reset-gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
|
||||
snps,reset-active-low;
|
||||
snps,reset-delays-us = <0 20000 100000>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <ð_rmii0_miim_pins
|
||||
ð_rmii0_tx_bus2_pins
|
||||
ð_rmii0_rx_bus2_pins
|
||||
ð_rmii0_clk_pins>;
|
||||
|
||||
phy-handle = <&rmii_phy0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gmac1 {
|
||||
phy-mode = "rmii";
|
||||
clock_in_out = "output";
|
||||
|
||||
snps,reset-gpio = <&gpio1 RK_PC7 GPIO_ACTIVE_LOW>;
|
||||
snps,reset-active-low;
|
||||
snps,reset-delays-us = <0 20000 100000>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <ð_rmii1_miim_pins
|
||||
ð_rmii1_tx_bus2_pins
|
||||
ð_rmii1_rx_bus2_pins
|
||||
ð_rmii1_clk_pins>;
|
||||
|
||||
phy-handle = <&rmii_phy1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc {
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc_bus4_pins &sdmmc_clk_pins &sdmmc_cmd_pins &sd_det>;
|
||||
cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>;
|
||||
// cd-debounce-delay-ms = <5>;
|
||||
disable-wp;
|
||||
vmmc-supply = <&vcc_3v3>;
|
||||
vqmmc-supply = <&vcc_3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
ethernet {
|
||||
rmii0_rstn: rmii0-rstn {
|
||||
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
rmii1_rstn: rmii1-rstn {
|
||||
rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
sdcard {
|
||||
sd_det: sd-det {
|
||||
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
usb {
|
||||
vcc5v0_otg1_en: vcc5v0-otg1-en {
|
||||
rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
rk730 {
|
||||
hp_det_pin: hp-det-pin {
|
||||
rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
led {
|
||||
work_led: work-led {
|
||||
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rga2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rng {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rockchip_suspend {
|
||||
rockchip,sleep-mode-config = <
|
||||
(0
|
||||
| RKPM_ARMOFF_DDRPD
|
||||
| RKPM_24M_OSC_DIS
|
||||
| RKPM_32K_CLK
|
||||
| RKPM_32K_SRC_RC
|
||||
| RKPM_PWM0_CH0_REGULATOR
|
||||
)
|
||||
>;
|
||||
|
||||
rockchip,apios-suspend = <
|
||||
(0
|
||||
| RKPM_PWREN_CORE_GPIO0A2 | RKPM_PWREN_CORE_ACT_LOW
|
||||
| RKPM_PWREN_SLEEP_GPIO0A0 | RKPM_PWREN_SLEEP_ACT_LOW
|
||||
)
|
||||
>;
|
||||
|
||||
#define GPIO0_IOC_GPIO0A_PULL_REG 0xff950200
|
||||
#define GPIO0_IOC_GPIO0B_PULL_REG 0xff950204
|
||||
#define GPIO0_IOC_GPIO0C_PULL_REG 0xff950208
|
||||
#define GPIO0A3_PULL_DOWN 0x00c00080
|
||||
#define GPIO0B0_PULL_DOWN 0x00030002
|
||||
#define GPIO0C5_PULL_DOWN 0x0c000800
|
||||
|
||||
/* Note: support max 16 pairs */
|
||||
rockchip,sleep-io-config = <
|
||||
GPIO0_IOC_GPIO0C_PULL_REG GPIO0C5_PULL_DOWN /* PWM0_CH0_CPU */
|
||||
GPIO0_IOC_GPIO0A_PULL_REG GPIO0A3_PULL_DOWN /* PWM0_CH2_LCD_BL */
|
||||
GPIO0_IOC_GPIO0B_PULL_REG GPIO0B0_PULL_DOWN /* SAI1_MCLK */
|
||||
>;
|
||||
};
|
||||
|
||||
|
||||
&sai1 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&rm_io9_sai1_sclk
|
||||
&rm_io10_sai1_lrck
|
||||
&rm_io11_sai1_sdi
|
||||
&rm_io12_sai1_sdo0>;
|
||||
pinctrl-1 = <&rm_io9_idle_pins
|
||||
&rm_io10_idle_pins
|
||||
&rm_io11_idle_pins
|
||||
&rm_io12_idle_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rm_io16_i2c1_scl &rm_io17_i2c1_sda>;
|
||||
|
||||
rk730: rk730@17 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "rockchip,rk730";
|
||||
reg = <0x17>;
|
||||
clocks = <&mclkout_sai1>;
|
||||
clock-names = "mclk";
|
||||
assigned-clocks = <&mclkout_sai1>;
|
||||
assigned-clock-rates = <12288000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rm_io8_sai1_mclk>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2{
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rm_io4_i2c2_scl &rm_io5_i2c2_sda>;
|
||||
|
||||
hym8563: hym8563@51 {
|
||||
compatible = "haoyu,hym8563";
|
||||
reg = <0x51>;
|
||||
};
|
||||
};
|
||||
|
||||
&mdio0 {
|
||||
rmii_phy0: phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
&mdio1 {
|
||||
rmii_phy1: phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
&saradc {
|
||||
vref-supply = <&vcc_1v8>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tsadc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rm_io14_uart3_tx &rm_io15_uart3_rx>;
|
||||
linux,rs485-enabled-at-boot-time;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb20_otg0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy_otg1 {
|
||||
phy-supply = <&vcc5v0_otg1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb20_otg1 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
Reference in New Issue
Block a user