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soc: rockchip: opp_select: adjust pvtpll by volt-sel in clk-pvtpll driver

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Change-Id: I9f2142dcea31acf688555646db3dbe4576104b54
Signed-off-by: Liang Chen <cl@rock-chips.com>
This commit is contained in:
Liang Chen
2024-11-27 10:31:12 +08:00
parent 48cc83ec5e
commit 3f9ac9b161
2 changed files with 8 additions and 1 deletions
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7
drivers/soc/rockchip/rockchip_opp_select.c
View File

@@ -1390,7 +1390,7 @@ static void rockchip_init_pvtpll_table(struct device *dev,
res = sip_smc_get_pvtpll_info(PVTPLL_GET_INFO, info->pvtpll_clk_id);
if (res.a0) {
info->pvtpll_clk_id = UINT_MAX;
info->pvtpll_smc = false;
goto out;
}
if (!res.a1)
@@ -1698,6 +1698,7 @@ int rockchip_init_opp_info(struct device *dev, struct rockchip_opp_info *info,
info->process = -EINVAL;
info->volt_sel = -EINVAL;
info->pvtpll_clk_id = UINT_MAX;
info->pvtpll_smc = true;
info->is_runtime_active = true;
mutex_init(&info->dvfs_mutex);
@@ -2070,6 +2071,10 @@ static int rockchip_pvtpll_set_volt_sel(struct device *dev,
if (info->pvtpll_clk_id == UINT_MAX)
return 0;
if (!info->pvtpll_smc)
return rockchip_pvtpll_volt_sel_adjust(info->pvtpll_clk_id,
info->volt_sel);
res = sip_smc_pvtpll_config(PVTPLL_VOLT_SEL, info->pvtpll_clk_id,
(u32)info->volt_sel, 0, 0, 0, 0);
if (res.a0)

2
include/soc/rockchip/rockchip_opp_select.h
View File

@@ -97,6 +97,7 @@ struct pvtpll_opp_table {
* @init_freq: Set the initial frequency when init opp table.
* @is_rate_volt_checked: Marks if device has checked initial rate and voltage.
* @pvtpll_clk_id: Device's clock id.
* @pvtpll_smc: Marks if smc call of pvtpll is available.
* @pvtpll_low_temp: Marks if device has low temperature pvtpll config.
*/
struct rockchip_opp_info {
@@ -138,6 +139,7 @@ struct rockchip_opp_info {
bool is_rate_volt_checked;
u32 pvtpll_clk_id;
bool pvtpll_smc;
bool pvtpll_low_temp;
};