MALI: rockchip: upgrade bifrost DDK to g17p0-01eac0, from g15p0-01eac0

In addition, add some more modifications, according to
commit ccf3f0670c ("MALI: bifrost: from ARM: Remove references to PageMovable()").

Note, the corresponding mali_csffw.bin for DDK g15 MUST be used.

Change-Id: Ie233cd29d8d169202d5b80b00a97ccb90e6bd3f2
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>

Documentation/ABI/testing/sysfs-device-mali-coresight-source

@@ -0,0 +1,113 @@
+/*
+ *
+ * (C) COPYRIGHT 2022 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation) and any use by you of this program is subject to the terms
+ * of such GNU licence.
+ *
+ * A copy of the licence is included with the program) and can also be obtained
+ * from Free Software Foundation) Inc.) 51 Franklin Street) Fifth Floor)
+ * Boston) MA  02110-1301) USA.
+ *
+ */
+
+What:		/sys/bus/coresight/devices/mali-source-etm/enable_source
+Description:
+        Attribute used to enable Coresight Source ETM.
+
+What:		/sys/bus/coresight/devices/mali-source-etm/is_enabled
+Description:
+        Attribute used to check if Coresight Source ITM is enabled.
+
+What:		/sys/bus/coresight/devices/mali-source-etm/trcconfigr
+Description:
+        Coresight Source ETM trace configuration to enable global
+        timestamping, and data value tracing.
+
+What:		/sys/bus/coresight/devices/mali-source-etm/trctraceidr
+Description:
+        Coresight Source ETM trace ID.
+
+What:		/sys/bus/coresight/devices/mali-source-etm/trcvdarcctlr
+Description:
+        Coresight Source ETM viewData include/exclude address
+        range comparators.
+
+What:		/sys/bus/coresight/devices/mali-source-etm/trcviiectlr
+Description:
+        Coresight Source ETM viewInst include and exclude control.
+
+What:		/sys/bus/coresight/devices/mali-source-etm/trcstallctlr
+Description:
+        Coresight Source ETM stall control register.
+
+What:		/sys/bus/coresight/devices/mali-source-itm/enable_source
+Description:
+        Attribute used to enable Coresight Source ITM.
+
+What:		/sys/bus/coresight/devices/mali-source-itm/is_enabled
+Description:
+        Attribute used to check if Coresight Source ITM is enabled.
+
+What:		/sys/bus/coresight/devices/mali-source-itm/dwt_ctrl
+Description:
+        Coresight Source DWT configuration:
+            [0] = 1, enable cycle counter
+            [4:1] = 4, set PC sample rate pf 256 cycles
+            [8:5] = 1, set initial post count value
+            [9] = 1, select position of post count tap on the cycle counter
+            [10:11] = 1, enable sync packets
+            [12] = 1, enable periodic PC sample packets
+
+What:		/sys/bus/coresight/devices/mali-source-itm/itm_tcr
+Description:
+        Coresight Source ITM configuration:
+            [0] = 1, Enable ITM
+            [1] = 1, Enable Time stamp generation
+            [2] = 1, Enable sync packet transmission
+            [3] = 1, Enable HW event forwarding
+            [11:10] = 1, Generate TS request approx every 128 cycles
+            [22:16] = 1, Trace bus ID
+
+What:		/sys/bus/coresight/devices/mali-source-ela/enable_source
+Description:
+        Attribute used to enable Coresight Source ELA.
+
+What:		/sys/bus/coresight/devices/mali-source-ela/is_enabled
+Description:
+        Attribute used to check if Coresight Source ELA is enabled.
+
+What:		/sys/bus/coresight/devices/mali-source-ela/select
+Description:
+        Coresight Source ELA select trace mode:
+            [0], NONE
+            [1], JCN
+            [2], CEU_EXEC
+            [3], CEU_CMDS
+            [4], MCU_AHBP
+            [5], HOST_AXI
+            [6], NR_TRACEMODE
+
+        Refer to specification for more details.
+
+What:		/sys/bus/coresight/devices/mali-source-ela/sigmask0
+Description:
+        Coresight Source ELA SIGMASK0 register set/get.
+        Refer to specification for more details.
+
+What:		/sys/bus/coresight/devices/mali-source-ela/sigmask4
+Description:
+        Coresight Source ELA SIGMASK4 register set/get.
+        Refer to specification for more details.
+
+What:		/sys/bus/coresight/devices/mali-source-ela/sigcomp0
+Description:
+        Coresight Source ELA SIGCOMP0 register set/get.
+        Refer to specification for more details.
+
+What:		/sys/bus/coresight/devices/mali-source-ela/sigcomp4
+Description:
+        Coresight Source ELA SIGCOMP4 register set/get.
+        Refer to specification for more details.

Documentation/csf_sync_state_dump.txt

@@ -0,0 +1,111 @@
+# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+#
+# (C) COPYRIGHT 2022 ARM Limited. All rights reserved.
+#
+# This program is free software and is provided to you under the terms of the
+# GNU General Public License version 2 as published by the Free Software
+# Foundation, and any use by you of this program is subject to the terms
+# of such GNU license.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+#
+
+DebugFS interface:
+------------------
+
+A new per-kbase-context debugfs file called csf_sync has been implemented
+which captures the current KCPU & GPU queue state of the not-yet-completed
+operations and displayed through the debugfs file.
+This file is at:
+=======================================================
+/sys/kernel/debug/mali0/ctx/<pid>_<context id>/csf_sync
+=======================================================
+
+Output Format:
+----------------
+
+The csf_sync file contains important data for the currently active queues.
+This data is formatted into two segments, which are separated by a
+pipe character: the common properties and the operation-specific properties.
+
+Common Properties:
+------------------
+
+* Queue type: GPU or KCPU.
+* kbase context id and the queue id.
+* If the queue type is a GPU queue then the group handle is also noted,
+in the middle of the other two IDs. The slot value is also dumped.
+* Execution status, which can either be 'P' for pending or 'S' for started.
+* Command type is then output which indicates the type of dependency
+(i.e. wait or signal).
+* Object address which is a pointer to the sync object that the
+command operates on.
+* The live value, which is the value of the synchronization object
+at the time of dumping. This could help to determine why wait
+operations might be blocked.
+
+Operation-Specific Properties:
+------------------------------
+
+The operation-specific values for KCPU queue fence operations
+are as follows: a unique timeline name, timeline context, and a fence
+sequence number. The CQS WAIT and CQS SET are denoted in the sync dump
+as their OPERATION counterparts, and therefore show the same operation
+specific values; the argument value to wait on or set to, and operation type,
+being (by definition) op:gt and op:set for CQS_WAIT and CQS_SET respectively.
+
+There are only two operation-specific values for operations in GPU queues
+which are always shown; the argument value to wait on or set/add to,
+and the operation type (set/add) or wait condition (e.g. LE, GT, GE).
+
+Examples
+--------
+GPU Queue Example
+------------------
+
+The following output is of a GPU queue, from a process that has a KCTX ID of 52,
+is in Queue Group (CSG) 0, and has Queue ID 0. It has started and is waiting on
+the object at address 0x0000007f81ffc800. The live value is 0,
+as is the arg value. However, the operation "op" is GT, indicating it's waiting
+for the live value to surpass the arg value:
+
+======================================================================================================================================
+queue:GPU-52-0-0 exec:S cmd:SYNC_WAIT slot:4 obj:0x0000007f81ffc800 live_value:0x0000000000000000 | op:gt arg_value:0x0000000000000000
+======================================================================================================================================
+
+The following is an example of GPU queue dump, where the SYNC SET operation
+is blocked by the preceding SYNC WAIT operation. This shows two GPU queues,
+with the same KCTX ID of 8, Queue Group (CSG) 0, and Queue ID 0. The SYNC WAIT
+operation has started, while the SYNC SET is pending, blocked by the SYNC WAIT.
+Both operations are on the same slot, 2 and have live value of 0. The SYNC WAIT
+is waiting on the object at address 0x0000007f81ffc800, while the SYNC SET will
+set the object at address 0x00000000a3bad4fb when it is unblocked.
+The operation "op" is GT for the SYNC WAIT, indicating it's waiting for the
+live value to surpass the arg value, while the operation and arg value for the
+SYNC SET is "set" and "1" respectively:
+
+======================================================================================================================================
+queue:GPU-8-0-0 exec:S cmd:SYNC_WAIT slot:2 obj:0x0000007f81ffc800 live_value:0x0000000000000000 | op:gt arg_value:0x0000000000000000
+queue:GPU-8-0-0 exec:P cmd:SYNC_SET slot:2 obj:0x00000000a3bad4fb live_value:0x0000000000000000 | op:set arg_value:0x0000000000000001
+======================================================================================================================================
+
+KCPU Queue Example
+------------------
+
+The following is an example of a KCPU queue, from a process that has
+a KCTX ID of 0 and has Queue ID 1. It has started and is waiting on the
+object at address 0x0000007fbf6f2ff8. The live value is currently 0 with
+the "op" being GT indicating it is waiting on the live value to
+surpass the arg value.
+
+===============================================================================================================================
+queue:KCPU-0-1 exec:S cmd:CQS_WAIT_OPERATION obj:0x0000007fbf6f2ff8 live_value:0x0000000000000000 | op:gt arg_value: 0x00000000
+===============================================================================================================================

Documentation/devicetree/bindings/arm/mali-bifrost.txt

@@ -235,6 +235,7 @@ gpu@0xfc010000 {
     ...
     pbha {
         int_id_override = <2 0x32>, <9 0x05>, <16 0x32>;
+        propagate_bits = <0x03>;
     };
     ...
 };

Documentation/devicetree/bindings/arm/mali-coresight-source.txt

@@ -0,0 +1,160 @@
+# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+#
+# (C) COPYRIGHT 2022 ARM Limited. All rights reserved.
+#
+# This program is free software and is provided to you under the terms of the
+# GNU General Public License version 2 as published by the Free Software
+# Foundation, and any use by you of this program is subject to the terms
+# of such GNU license.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+#
+=====================================
+ARM CoreSight Mali Source integration
+=====================================
+
+See Documentation/trace/coresight/coresight.rst for detailed information
+about Coresight.
+
+This documentation will cover Mali specific devicetree integration.
+
+References to Sink ports are given as examples. Access to Sink is specific
+to an implementation and would require dedicated kernel modules.
+
+ARM Coresight Mali Source ITM
+=============================
+
+Required properties
+-------------------
+
+- compatible: Has to be "arm,coresight-mali-source-itm"
+- gpu : phandle to a Mali GPU definition
+- port:
+  - endpoint:
+    - remote-endpoint: phandle to a Coresight sink port
+
+Example
+-------
+
+mali-source-itm {
+  compatible = "arm,coresight-mali-source-itm";
+  gpu = <&gpu>;
+  port {
+    mali_source_itm_out_port0: endpoint {
+      remote-endpoint = <&mali_sink_in_port0>;
+    };
+  };
+};
+
+ARM Coresight Mali Source ETM
+=============================
+
+Required properties
+-------------------
+
+- compatible: Has to be "arm,coresight-mali-source-etm"
+- gpu : phandle to a Mali GPU definition
+- port:
+  - endpoint:
+    - remote-endpoint: phandle to a Coresight sink port
+
+Example
+-------
+
+mali-source-etm {
+  compatible = "arm,coresight-mali-source-etm";
+  gpu = <&gpu>;
+  port {
+    mali_source_etm_out_port0: endpoint {
+      remote-endpoint = <&mali_sink_in_port1>;
+    };
+  };
+};
+
+ARM Coresight Mali Source ELA
+=============================
+
+Required properties
+-------------------
+
+- compatible: Has to be "arm,coresight-mali-source-ela"
+- gpu : phandle to a Mali GPU definition
+- signal-groups: Signal groups indexed from 0 to 5.
+                 Used to configure the signal channels.
+  - sgN: Types of signals attached to one channel.
+         It can be more than one type in the case of
+         JCN request/response.
+
+         Types:
+           - "jcn-request": Can share the channel with "jcn-response"
+           - "jcn-response": Can share the channel with "jcn-request"
+           - "ceu-execution": Cannot share the channel with other types
+           - "ceu-commands": Cannot share the channel with other types
+           - "mcu-ahbp": Cannot share the channel with other types
+           - "host-axi": Cannot share the channel with other types
+
+
+         If the HW implementation shares a common channel
+         for JCN response and request (total of 4 channels),
+         Refer to:
+           - "Example: Shared JCN request/response channel"
+         Otherwise (total of 5 channels), refer to:
+           - "Example: Split JCN request/response channel"
+- port:
+  - endpoint:
+    - remote-endpoint: phandle to a Coresight sink port
+
+Example: Split JCN request/response channel
+--------------------------------------------
+
+This examples applies to implementations with a total of 5 signal groups,
+where JCN request and response are assigned to independent channels.
+
+mali-source-ela {
+  compatible = "arm,coresight-mali-source-ela";
+  gpu = <&gpu>;
+  signal-groups {
+    sg0 = "jcn-request";
+    sg1 = "jcn-response";
+    sg2 = "ceu-execution";
+    sg3 = "ceu-commands";
+    sg4 = "mcu-ahbp";
+    sg5 = "host-axi";
+  };
+  port {
+    mali_source_ela_out_port0: endpoint {
+      remote-endpoint = <&mali_sink_in_port2>;
+    };
+  };
+};
+
+Example: Shared JCN request/response channel
+--------------------------------------------
+
+This examples applies to implementations with a total of 4 signal groups,
+where JCN request and response are assigned to the same channel.
+
+mali-source-ela {
+  compatible = "arm,coresight-mali-source-ela";
+  gpu = <&gpu>;
+  signal-groups {
+    sg0 = "jcn-request", "jcn-response";
+    sg1 = "ceu-execution";
+    sg2 = "ceu-commands";
+    sg3 = "mcu-ahbp";
+    sg4 = "host-axi";
+  };
+  port {
+    mali_source_ela_out_port0: endpoint {
+      remote-endpoint = <&mali_sink_in_port1>;
+    };
+  };
+};

Documentation/dma-buf-test-exporter.txt

@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
 #
-# (C) COPYRIGHT 2012-2013, 2020-2021 ARM Limited. All rights reserved.
+# (C) COPYRIGHT 2012-2013, 2020-2022 ARM Limited. All rights reserved.
 #
 # This program is free software and is provided to you under the terms of the
 # GNU General Public License version 2 as published by the Free Software
@@ -38,5 +38,5 @@ The buffers support all of the dma_buf API, including mmap.
 
 It supports being compiled as a module both in-tree and out-of-tree.
 
-See include/linux/dma-buf-test-exporter.h for the ioctl interface.
+See include/uapi/base/arm/dma_buf_test_exporter/dma-buf-test-exporter.h for the ioctl interface.
 See Documentation/dma-buf-sharing.txt for details on dma_buf.

drivers/base/arm/Makefile

@@ -90,6 +90,12 @@ EXTRA_CFLAGS := $(foreach config,$(CONFIGS), \
 
 KBUILD_CFLAGS += -Wall -Werror
 
+ifeq ($(CONFIG_GCOV_KERNEL), y)
+    KBUILD_CFLAGS += $(call cc-option, -ftest-coverage)
+    KBUILD_CFLAGS += $(call cc-option, -fprofile-arcs)
+    EXTRA_CFLAGS += -DGCOV_PROFILE=1
+endif
+
 # The following were added to align with W=1 in scripts/Makefile.extrawarn
 # from the Linux source tree (v5.18.14)
 KBUILD_CFLAGS += -Wextra -Wunused -Wno-unused-parameter
@@ -120,7 +126,8 @@ KBUILD_CFLAGS += -Wdisabled-optimization
 # global variables.
 KBUILD_CFLAGS += $(call cc-option, -Wlogical-op)
 KBUILD_CFLAGS += -Wmissing-field-initializers
-KBUILD_CFLAGS += -Wtype-limits
+# -Wtype-limits must be disabled due to build failures on kernel 5.x
+KBUILD_CFLAGS += -Wno-type-limit
 KBUILD_CFLAGS += $(call cc-option, -Wmaybe-uninitialized)
 KBUILD_CFLAGS += $(call cc-option, -Wunused-macros)
 

drivers/base/arm/Mconfig

@@ -1,64 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
-#
-# (C) COPYRIGHT 2021-2022 ARM Limited. All rights reserved.
-#
-# This program is free software and is provided to you under the terms of the
-# GNU General Public License version 2 as published by the Free Software
-# Foundation, and any use by you of this program is subject to the terms
-# of such GNU license.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, you can access it online at
-# http://www.gnu.org/licenses/gpl-2.0.html.
-#
-#
-
-menuconfig MALI_BASE_MODULES
-	bool "Mali Base extra modules"
-	default y if BACKEND_KERNEL
-	help
-	  Enable this option to build support for a Arm Mali base modules.
-	  Those modules provide extra features or debug interfaces and,
-	  are optional for the use of the Mali GPU modules.
-
-config DMA_SHARED_BUFFER_TEST_EXPORTER
-	bool "Build dma-buf framework test exporter module"
-	depends on MALI_BASE_MODULES
-	default y
-	help
-	  This option will build the dma-buf framework test exporter module.
-	  Usable to help test importers.
-
-	  Modules:
-	  - dma-buf-test-exporter.ko
-
-config MALI_MEMORY_GROUP_MANAGER
-	bool "Build Mali Memory Group Manager module"
-	depends on MALI_BASE_MODULES
-	default y
-	help
-	  This option will build the memory group manager module.
-	  This is an example implementation for allocation and release of pages
-	  for memory pools managed by Mali GPU device drivers.
-
-	  Modules:
-	  - memory_group_manager.ko
-
-config MALI_PROTECTED_MEMORY_ALLOCATOR
-	bool "Build Mali Protected Memory Allocator module"
-	depends on MALI_BASE_MODULES && GPU_HAS_CSF
-	default y
-	help
-	  This option will build the protected memory allocator module.
-	  This is an example implementation for allocation and release of pages
-	  of secure memory intended to be used by the firmware
-	  of Mali GPU device drivers.
-
-	  Modules:
-	  - protected_memory_allocator.ko
-

drivers/base/arm/memory_group_manager/memory_group_manager.c

@@ -228,8 +228,8 @@ static int mgm_initialize_debugfs(struct mgm_groups *mgm_data)
 
 #define ORDER_SMALL_PAGE 0
 #define ORDER_LARGE_PAGE 9
-static void update_size(struct memory_group_manager_device *mgm_dev, int
-		group_id, int order, bool alloc)
+static void update_size(struct memory_group_manager_device *mgm_dev, unsigned int group_id,
+			int order, bool alloc)
 {
 	struct mgm_groups *data = mgm_dev->data;
 

drivers/gpu/arm/bifrost/Kbuild

@@ -69,7 +69,7 @@ endif
 #
 
 # Driver version string which is returned to userspace via an ioctl
-MALI_RELEASE_NAME ?= '"g15p0-01eac0"'
+MALI_RELEASE_NAME ?= '"g17p0-01eac0"'
 # Set up defaults if not defined by build system
 ifeq ($(CONFIG_MALI_BIFROST_DEBUG), y)
     MALI_UNIT_TEST = 1

drivers/gpu/arm/bifrost/Kconfig

@@ -41,9 +41,30 @@ config MALI_PLATFORM_NAME
 	  include in the build. 'platform/$(MALI_PLATFORM_NAME)/Kbuild' must
 	  exist.
 
-config MALI_REAL_HW
+choice
+	prompt "Mali HW backend"
 	depends on MALI_BIFROST
-	def_bool !MALI_BIFROST_NO_MALI
+	default MALI_REAL_HW
+
+config MALI_REAL_HW
+	bool "Enable build of Mali kernel driver for real HW"
+	depends on MALI_BIFROST
+	help
+	  This is the default HW backend.
+
+config MALI_BIFROST_NO_MALI
+	bool "Enable build of Mali kernel driver for No Mali"
+	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
+	help
+	  This can be used to test the driver in a simulated environment
+	  whereby the hardware is not physically present. If the hardware is physically
+	  present it will not be used. This can be used to test the majority of the
+	  driver without needing actual hardware or for software benchmarking.
+	  All calls to the simulated hardware will complete immediately as if the hardware
+	  completed the task.
+
+
+endchoice
 
 menu "Platform specific options"
 source "drivers/gpu/arm/bifrost/platform/Kconfig"
@@ -91,6 +112,21 @@ config MALI_BIFROST_ENABLE_TRACE
 	  Enables tracing in kbase. Trace log available through
 	  the "mali_trace" debugfs file, when the CONFIG_DEBUG_FS is enabled
 
+config MALI_FW_CORE_DUMP
+	bool "Enable support for FW core dump"
+	depends on MALI_BIFROST && MALI_CSF_SUPPORT
+	default n
+	help
+	  Adds ability to request firmware core dump through the "fw_core_dump"
+	  debugfs file
+
+	  Example:
+	  * To explicitly request core dump:
+	      echo 1 > /sys/kernel/debug/mali0/fw_core_dump
+	  * To output current core dump (after explicitly requesting a core dump,
+	    or kernel driver reported an internal firmware error):
+	      cat /sys/kernel/debug/mali0/fw_core_dump
+
 config MALI_ARBITER_SUPPORT
 	bool "Enable arbiter support for Mali"
 	depends on MALI_BIFROST && !MALI_CSF_SUPPORT
@@ -127,6 +163,11 @@ config MALI_DMA_BUF_LEGACY_COMPAT
 	  flushes in other drivers. This only has an effect for clients using
 	  UK 11.18 or older. For later UK versions it is not possible.
 
+config MALI_CORESIGHT
+	depends on MALI_BIFROST && MALI_CSF_SUPPORT && !MALI_BIFROST_NO_MALI
+	bool "Enable Kbase CoreSight tracing support"
+	default n
+
 menuconfig MALI_BIFROST_EXPERT
 	depends on MALI_BIFROST
 	bool "Enable Expert Settings"
@@ -174,18 +215,6 @@ config MALI_CORESTACK
 comment "Platform options"
 	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
 
-config MALI_BIFROST_NO_MALI
-	bool "Enable No Mali"
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
-	default n
-	help
-	  This can be used to test the driver in a simulated environment
-	  whereby the hardware is not physically present. If the hardware is physically
-	  present it will not be used. This can be used to test the majority of the
-	  driver without needing actual hardware or for software benchmarking.
-	  All calls to the simulated hardware will complete immediately as if the hardware
-	  completed the task.
-
 config MALI_BIFROST_ERROR_INJECT
 	bool "Enable No Mali error injection"
 	depends on MALI_BIFROST && MALI_BIFROST_EXPERT && MALI_BIFROST_NO_MALI
@@ -204,20 +233,6 @@ config MALI_GEM5_BUILD
 comment "Debug options"
 	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
 
-config MALI_FW_CORE_DUMP
-        bool "Enable support for FW core dump"
-        depends on MALI_BIFROST && MALI_BIFROST_EXPERT && MALI_CSF_SUPPORT
-        default n
-        help
-          Adds ability to request firmware core dump
-
-          Example:
-          * To explicitly request core dump:
-                echo 1 >/sys/kernel/debug/mali0/fw_core_dump
-          * To output current core dump (after explicitly requesting a core dump,
-            or kernel driver reported an internal firmware error):
-                cat /sys/kernel/debug/mali0/fw_core_dump
-
 config MALI_BIFROST_DEBUG
 	bool "Enable debug build"
 	depends on MALI_BIFROST && MALI_BIFROST_EXPERT

drivers/gpu/arm/bifrost/Makefile

@@ -39,17 +39,10 @@ ifeq ($(CONFIG_MALI_BIFROST),m)
     CONFIG_MALI_ARBITRATION ?= n
     CONFIG_MALI_PARTITION_MANAGER ?= n
 
-    ifeq ($(origin CONFIG_MALI_ABITER_MODULES), undefined)
-        CONFIG_MALI_ARBITER_MODULES := $(CONFIG_MALI_ARBITRATION)
-    endif
-
-    ifeq ($(origin CONFIG_MALI_GPU_POWER_MODULES), undefined)
-        CONFIG_MALI_GPU_POWER_MODULES := $(CONFIG_MALI_ARBITRATION)
-    endif
-
     ifneq ($(CONFIG_MALI_BIFROST_NO_MALI),y)
         # Prevent misuse when CONFIG_MALI_BIFROST_NO_MALI
         CONFIG_MALI_REAL_HW ?= y
+        CONFIG_MALI_CORESIGHT = n
     endif
 
     ifeq ($(CONFIG_MALI_BIFROST_DVFS),y)
@@ -64,10 +57,11 @@ ifeq ($(CONFIG_MALI_BIFROST),m)
         CONFIG_MALI_DMA_BUF_LEGACY_COMPAT = n
     endif
 
-    ifeq ($(CONFIG_XEN),y)
-        ifneq ($(CONFIG_MALI_ARBITER_SUPPORT), n)
-            CONFIG_MALI_XEN ?= m
-        endif
+    ifeq ($(CONFIG_MALI_CSF_SUPPORT), y)
+        CONFIG_MALI_FW_CORE_DUMP ?= y
+        CONFIG_MALI_CORESIGHT ?= n
+    else
+        CONFIG_MALI_FW_CORE_DUMP ?= n
     endif
 
     #
@@ -76,12 +70,14 @@ ifeq ($(CONFIG_MALI_BIFROST),m)
     ifeq ($(CONFIG_MALI_BIFROST_EXPERT), y)
         ifeq ($(CONFIG_MALI_BIFROST_NO_MALI), y)
             CONFIG_MALI_REAL_HW = n
+
         else
             # Prevent misuse when CONFIG_MALI_BIFROST_NO_MALI=n
             CONFIG_MALI_REAL_HW = y
             CONFIG_MALI_BIFROST_ERROR_INJECT = n
         endif
 
+
         ifeq ($(CONFIG_MALI_HW_ERRATA_1485982_NOT_AFFECTED), y)
             # Prevent misuse when CONFIG_MALI_HW_ERRATA_1485982_NOT_AFFECTED=y
             CONFIG_MALI_HW_ERRATA_1485982_USE_CLOCK_ALTERNATIVE = n
@@ -143,12 +139,11 @@ ifeq ($(CONFIG_MALI_BIFROST),m)
 else
     # Prevent misuse when CONFIG_MALI_BIFROST=n
     CONFIG_MALI_ARBITRATION = n
-    CONFIG_MALI_ARBITER_MODULES = n
-    CONFIG_MALI_GPU_POWER_MODULES = n
     CONFIG_MALI_KUTF = n
     CONFIG_MALI_KUTF_IRQ_TEST = n
     CONFIG_MALI_KUTF_CLK_RATE_TRACE = n
     CONFIG_MALI_KUTF_MGM_INTEGRATION_TEST = n
+    CONFIG_MALI_FW_CORE_DUMP = n
 endif
 
 # All Mali CONFIG should be listed here
@@ -158,8 +153,6 @@ CONFIGS := \
     CONFIG_MALI_BIFROST_GATOR_SUPPORT \
     CONFIG_MALI_ARBITER_SUPPORT \
     CONFIG_MALI_ARBITRATION \
-    CONFIG_MALI_ARBITER_MODULES \
-    CONFIG_MALI_GPU_POWER_MODULES \
     CONFIG_MALI_PARTITION_MANAGER \
     CONFIG_MALI_REAL_HW \
     CONFIG_MALI_GEM5_BUILD \
@@ -189,10 +182,14 @@ CONFIGS := \
     CONFIG_MALI_KUTF_IRQ_TEST \
     CONFIG_MALI_KUTF_CLK_RATE_TRACE \
     CONFIG_MALI_KUTF_MGM_INTEGRATION_TEST \
-    CONFIG_MALI_XEN
+    CONFIG_MALI_XEN \
+    CONFIG_MALI_FW_CORE_DUMP \
+    CONFIG_MALI_CORESIGHT
 
 
-#
+THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
+-include $(THIS_DIR)/../arbitration/Makefile
+
 # MAKE_ARGS to pass the custom CONFIGs on out-of-tree build
 #
 # Generate the list of CONFIGs and values.
@@ -254,7 +251,8 @@ KBUILD_CFLAGS += -Wdisabled-optimization
 # global variables.
 KBUILD_CFLAGS += $(call cc-option, -Wlogical-op)
 KBUILD_CFLAGS += -Wmissing-field-initializers
-KBUILD_CFLAGS += -Wtype-limits
+# -Wtype-limits must be disabled due to build failures on kernel 5.x
+KBUILD_CFLAGS += -Wno-type-limit
 KBUILD_CFLAGS += $(call cc-option, -Wmaybe-uninitialized)
 KBUILD_CFLAGS += $(call cc-option, -Wunused-macros)
 
@@ -263,6 +261,12 @@ KBUILD_CPPFLAGS += -DKBUILD_EXTRA_WARN2
 # This warning is disabled to avoid build failures in some kernel versions
 KBUILD_CFLAGS += -Wno-ignored-qualifiers
 
+ifeq ($(CONFIG_GCOV_KERNEL),y)
+    KBUILD_CFLAGS += $(call cc-option, -ftest-coverage)
+    KBUILD_CFLAGS += $(call cc-option, -fprofile-arcs)
+    EXTRA_CFLAGS += -DGCOV_PROFILE=1
+endif
+
 all:
 	$(MAKE) -C $(KDIR) M=$(CURDIR) $(MAKE_ARGS) EXTRA_CFLAGS="$(EXTRA_CFLAGS)" KBUILD_EXTRA_SYMBOLS="$(EXTRA_SYMBOLS)" modules
 

drivers/gpu/arm/bifrost/Mconfig

@@ -1,326 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
-#
-# (C) COPYRIGHT 2012-2022 ARM Limited. All rights reserved.
-#
-# This program is free software and is provided to you under the terms of the
-# GNU General Public License version 2 as published by the Free Software
-# Foundation, and any use by you of this program is subject to the terms
-# of such GNU license.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, you can access it online at
-# http://www.gnu.org/licenses/gpl-2.0.html.
-#
-#
-
-menuconfig MALI_BIFROST
-	bool "Mali Midgard series support"
-	default y
-	help
-	  Enable this option to build support for a ARM Mali Midgard GPU.
-
-	  To compile this driver as a module, choose M here:
-	  this will generate a single module, called mali_kbase.
-
-config MALI_PLATFORM_NAME
-	depends on MALI_BIFROST
-	string "Platform name"
-	default "hisilicon" if PLATFORM_HIKEY960
-	default "hisilicon" if PLATFORM_HIKEY970
-	default "devicetree"
-	help
-	  Enter the name of the desired platform configuration directory to
-	  include in the build. 'platform/$(MALI_PLATFORM_NAME)/Kbuild' must
-	  exist.
-
-	  When PLATFORM_CUSTOM is set, this needs to be set manually to
-	  pick up the desired platform files.
-
-config MALI_REAL_HW
-	bool
-	depends on MALI_BIFROST
-	default y
-	default n if NO_MALI
-
-config MALI_PLATFORM_DT_PIN_RST
-	bool "Enable Juno GPU Pin reset"
-	depends on MALI_BIFROST
-	default n
-	default y if BUSLOG
-	help
-	  Enables support for GPUs pin reset on Juno platforms.
-
-config MALI_CSF_SUPPORT
-	bool "Enable Mali CSF based GPU support"
-	depends on MALI_BIFROST
-	default y if GPU_HAS_CSF
-	help
-	  Enables support for CSF based GPUs.
-
-config MALI_BIFROST_DEVFREQ
-	bool "Enable devfreq support for Mali"
-	depends on MALI_BIFROST
-	default y
-	help
-	  Support devfreq for Mali.
-
-	  Using the devfreq framework and, by default, the simple on-demand
-	  governor, the frequency of Mali will be dynamically selected from the
-	  available OPPs.
-
-config MALI_BIFROST_DVFS
-	bool "Enable legacy DVFS"
-	depends on MALI_BIFROST && !MALI_BIFROST_DEVFREQ
-	default n
-	help
-	  Choose this option to enable legacy DVFS in the Mali Midgard DDK.
-
-config MALI_BIFROST_GATOR_SUPPORT
-	bool "Enable Streamline tracing support"
-	depends on MALI_BIFROST && !BACKEND_USER
-	default y
-	help
-	  Enables kbase tracing used by the Arm Streamline Performance Analyzer.
-	  The tracepoints are used to derive GPU activity charts in Streamline.
-
-config MALI_BIFROST_ENABLE_TRACE
-	bool "Enable kbase tracing"
-	depends on MALI_BIFROST
-	default y if MALI_BIFROST_DEBUG
-	default n
-	help
-	  Enables tracing in kbase. Trace log available through
-	  the "mali_trace" debugfs file, when the CONFIG_DEBUG_FS is enabled
-
-config MALI_ARBITER_SUPPORT
-	bool "Enable arbiter support for Mali"
-	depends on MALI_BIFROST && !MALI_CSF_SUPPORT
-	default n
-	help
-	  Enable support for the arbiter interface in the driver.
-	  This allows an external arbiter to manage driver access
-	  to GPU hardware in a virtualized environment
-
-	  If unsure, say N.
-
-config DMA_BUF_SYNC_IOCTL_SUPPORTED
-	bool "Enable Kernel DMA buffers support DMA_BUF_IOCTL_SYNC"
-	depends on MALI_BIFROST && BACKEND_KERNEL
-	default y
-
-config MALI_DMA_BUF_MAP_ON_DEMAND
-	bool "Enable map imported dma-bufs on demand"
-	depends on MALI_BIFROST
-	default n
-	default y if !DMA_BUF_SYNC_IOCTL_SUPPORTED
-	help
-	  This option will cause kbase to set up the GPU mapping of imported
-	  dma-buf when needed to run atoms. This is the legacy behavior.
-
-	  This is intended for testing and the option will get removed in the
-	  future.
-
-config MALI_DMA_BUF_LEGACY_COMPAT
-	bool "Enable legacy compatibility cache flush on dma-buf map"
-	depends on MALI_BIFROST && !MALI_DMA_BUF_MAP_ON_DEMAND
-	default n
-	help
-	  This option enables compatibility with legacy dma-buf mapping
-	  behavior, then the dma-buf is mapped on import, by adding cache
-	  maintenance where MALI_DMA_BUF_MAP_ON_DEMAND would do the mapping,
-	  including a cache flush.
-
-	  This option might work-around issues related to missing cache
-	  flushes in other drivers. This only has an effect for clients using
-	  UK 11.18 or older. For later UK versions it is not possible.
-
-menuconfig MALI_BIFROST_EXPERT
-	depends on MALI_BIFROST
-	bool "Enable Expert Settings"
-	default y
-	help
-	  Enabling this option and modifying the default settings may produce
-	  a driver with performance or other limitations.
-
-config MALI_MEMORY_FULLY_BACKED
-	bool "Enable memory fully physically-backed"
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
-	default n
-	help
-	  This option enables full physical backing of all virtual
-	  memory allocations in the kernel. Notice that this build
-	  option only affects allocations of grow-on-GPU-page-fault
-	  memory.
-
-config MALI_CORESTACK
-	bool "Enable support of GPU core stack power control"
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
-	default n
-	help
-	  Enabling this feature on supported GPUs will let the driver powering
-	  on/off the GPU core stack independently without involving the Power
-	  Domain Controller. This should only be enabled on platforms which
-	  integration of the PDC to the Mali GPU is known to be problematic.
-	  This feature is currently only supported on t-Six and t-HEx GPUs.
-
-	  If unsure, say N.
-
-config MALI_FW_CORE_DUMP
-	bool "Enable support for FW core dump"
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT && MALI_CSF_SUPPORT
-	default n
-	help
-	  Adds ability to request firmware core dump
-
-	  Example:
-	  * To explicitly request core dump:
-	  echo 1 >/sys/kernel/debug/mali0/fw_core_dump
-	  * To output current core dump (after explicitly requesting a core dump,
-	  or kernel driver reported an internal firmware error):
-	  cat /sys/kernel/debug/mali0/fw_core_dump
-
-choice
-	prompt "Error injection level"
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
-	default MALI_ERROR_INJECT_NONE
-	help
-	  Enables insertion of errors to test module failure and recovery mechanisms.
-
-config MALI_ERROR_INJECT_NONE
-	bool "disabled"
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
-	help
-	  Error injection is disabled.
-
-config MALI_ERROR_INJECT_TRACK_LIST
-	bool "error track list"
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT && NO_MALI
-	help
-	  Errors to inject are pre-configured by the user.
-
-config MALI_ERROR_INJECT_RANDOM
-	bool "random error injection"
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT && NO_MALI
-	help
-	  Injected errors are random, rather than user-driven.
-
-endchoice
-
-config MALI_ERROR_INJECT_ON
-	string
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
-	default "0" if MALI_ERROR_INJECT_NONE
-	default "1" if MALI_ERROR_INJECT_TRACK_LIST
-	default "2" if MALI_ERROR_INJECT_RANDOM
-
-config MALI_BIFROST_ERROR_INJECT
-	bool
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
-	default y if !MALI_ERROR_INJECT_NONE
-
-config MALI_GEM5_BUILD
-	bool "Enable build of Mali kernel driver for GEM5"
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
-	default n
-	help
-	  This option is to do a Mali GEM5 build.
-	  If unsure, say N.
-
-config MALI_BIFROST_DEBUG
-	bool "Enable debug build"
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
-	default y if DEBUG
-	default n
-	help
-	  Select this option for increased checking and reporting of errors.
-
-config MALI_BIFROST_FENCE_DEBUG
-	bool "Enable debug sync fence usage"
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
-	default y if MALI_BIFROST_DEBUG
-	help
-	  Select this option to enable additional checking and reporting on the
-	  use of sync fences in the Mali driver.
-
-	  This will add a 3s timeout to all sync fence waits in the Mali
-	  driver, so that when work for Mali has been waiting on a sync fence
-	  for a long time a debug message will be printed, detailing what fence
-	  is causing the block, and which dependent Mali atoms are blocked as a
-	  result of this.
-
-	  The timeout can be changed at runtime through the js_soft_timeout
-	  device attribute, where the timeout is specified in milliseconds.
-
-config MALI_BIFROST_SYSTEM_TRACE
-	bool "Enable system event tracing support"
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
-	default y if MALI_BIFROST_DEBUG
-	default n
-	help
-	  Choose this option to enable system trace events for each
-	  kbase event. This is typically used for debugging but has
-	  minimal overhead when not in use. Enable only if you know what
-	  you are doing.
-
-# Instrumentation options.
-
-# config MALI_PRFCNT_SET_PRIMARY exists in the Kernel Kconfig but is configured using CINSTR_PRIMARY_HWC in Mconfig.
-# config MALI_BIFROST_PRFCNT_SET_SECONDARY exists in the Kernel Kconfig but is configured using CINSTR_SECONDARY_HWC in Mconfig.
-# config MALI_PRFCNT_SET_TERTIARY exists in the Kernel Kconfig but is configured using CINSTR_TERTIARY_HWC in Mconfig.
-# config MALI_PRFCNT_SET_SELECT_VIA_DEBUG_FS exists in the Kernel Kconfig but is configured using CINSTR_HWC_SET_SELECT_VIA_DEBUG_FS in Mconfig.
-
-config MALI_JOB_DUMP
-	bool "Enable system level support needed for job dumping"
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
-	default n
-	help
-	  Choose this option to enable system level support needed for
-	  job dumping. This is typically used for instrumentation but has
-	  minimal overhead when not in use. Enable only if you know what
-	  you are doing.
-
-config MALI_PWRSOFT_765
-	bool "Enable workaround for PWRSOFT-765"
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
-	default n
-	help
-	  PWRSOFT-765 fixes devfreq cooling devices issues. The fix was merged
-	  in kernel v4.10, however if backported into the kernel then this
-	  option must be manually selected.
-
-	  If using kernel >= v4.10 then say N, otherwise if devfreq cooling
-	  changes have been backported say Y to avoid compilation errors.
-
-
-config MALI_HW_ERRATA_1485982_NOT_AFFECTED
-	bool "Disable workaround for BASE_HW_ISSUE_GPU2017_1336"
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT
-	default n
-	default y if PLATFORM_JUNO
-	help
-	  This option disables the default workaround for GPU2017-1336. The
-	  workaround keeps the L2 cache powered up except for powerdown and reset.
-
-	  The workaround introduces a limitation that will prevent the running of
-	  protected mode content on fully coherent platforms, as the switch to IO
-	  coherency mode requires the L2 to be turned off.
-
-config MALI_HW_ERRATA_1485982_USE_CLOCK_ALTERNATIVE
-	bool "Use alternative workaround for BASE_HW_ISSUE_GPU2017_1336"
-	depends on MALI_BIFROST && MALI_BIFROST_EXPERT && !MALI_HW_ERRATA_1485982_NOT_AFFECTED
-	default n
-	help
-	  This option uses an alternative workaround for GPU2017-1336. Lowering
-	  the GPU clock to a, platform specific, known good frequeuncy before
-	  powering down the L2 cache. The clock can be specified in the device
-	  tree using the property, opp-mali-errata-1485982. Otherwise the
-	  slowest clock will be selected.
-
-
-source "kernel/drivers/gpu/arm/arbitration/Mconfig"
-source "kernel/drivers/gpu/arm/midgard/tests/Mconfig"

drivers/gpu/arm/bifrost/backend/gpu/Kbuild

@@ -47,8 +47,12 @@ endif
 bifrost_kbase-$(CONFIG_MALI_BIFROST_DEVFREQ) += \
     backend/gpu/mali_kbase_devfreq.o
 
-# Dummy model
+ifneq ($(CONFIG_MALI_REAL_HW),y)
+    bifrost_kbase-y += backend/gpu/mali_kbase_model_linux.o
+endif
+
+# NO_MALI Dummy model interface
 bifrost_kbase-$(CONFIG_MALI_BIFROST_NO_MALI) += backend/gpu/mali_kbase_model_dummy.o
-bifrost_kbase-$(CONFIG_MALI_BIFROST_NO_MALI) += backend/gpu/mali_kbase_model_linux.o
 # HW error simulation
 bifrost_kbase-$(CONFIG_MALI_BIFROST_NO_MALI) += backend/gpu/mali_kbase_model_error_generator.o
+

drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_irq_linux.c

@@ -25,12 +25,12 @@
 
 #include <linux/interrupt.h>
 
-#if !IS_ENABLED(CONFIG_MALI_BIFROST_NO_MALI)
+#if IS_ENABLED(CONFIG_MALI_REAL_HW)
 
 /* GPU IRQ Tags */
-#define	JOB_IRQ_TAG	0
-#define MMU_IRQ_TAG	1
-#define GPU_IRQ_TAG	2
+#define JOB_IRQ_TAG 0
+#define MMU_IRQ_TAG 1
+#define GPU_IRQ_TAG 2
 
 static void *kbase_tag(void *ptr, u32 tag)
 {
@@ -500,4 +500,4 @@ void kbase_synchronize_irqs(struct kbase_device *kbdev)
 
 KBASE_EXPORT_TEST_API(kbase_synchronize_irqs);
 
-#endif /* !IS_ENABLED(CONFIG_MALI_BIFROST_NO_MALI) */
+#endif /* IS_ENABLED(CONFIG_MALI_REAL_HW) */

drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_jm_as.c

@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
 /*
  *
- * (C) COPYRIGHT 2014-2021 ARM Limited. All rights reserved.
+ * (C) COPYRIGHT 2014-2022 ARM Limited. All rights reserved.
  *
  * This program is free software and is provided to you under the terms of the
  * GNU General Public License version 2 as published by the Free Software
@@ -67,9 +67,8 @@ static void assign_and_activate_kctx_addr_space(struct kbase_device *kbdev,
 	kbase_js_runpool_inc_context_count(kbdev, kctx);
 }
 
-bool kbase_backend_use_ctx_sched(struct kbase_device *kbdev,
-						struct kbase_context *kctx,
-						int js)
+bool kbase_backend_use_ctx_sched(struct kbase_device *kbdev, struct kbase_context *kctx,
+				 unsigned int js)
 {
 	int i;
 
@@ -240,4 +239,3 @@ bool kbase_backend_use_ctx(struct kbase_device *kbdev,
 
 	return true;
 }
-

drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_jm_hw.c

@@ -44,9 +44,8 @@ static void kbasep_try_reset_gpu_early_locked(struct kbase_device *kbdev);
 static u64 kbasep_apply_limited_core_mask(const struct kbase_device *kbdev,
 				const u64 affinity, const u64 limited_core_mask);
 
-static u64 kbase_job_write_affinity(struct kbase_device *kbdev,
-				base_jd_core_req core_req,
-				int js, const u64 limited_core_mask)
+static u64 kbase_job_write_affinity(struct kbase_device *kbdev, base_jd_core_req core_req,
+				    unsigned int js, const u64 limited_core_mask)
 {
 	u64 affinity;
 	bool skip_affinity_check = false;
@@ -191,7 +190,7 @@ static u64 select_job_chain(struct kbase_jd_atom *katom)
 	return jc;
 }
 
-int kbase_job_hw_submit(struct kbase_device *kbdev, struct kbase_jd_atom *katom, int js)
+int kbase_job_hw_submit(struct kbase_device *kbdev, struct kbase_jd_atom *katom, unsigned int js)
 {
 	struct kbase_context *kctx;
 	u32 cfg;
@@ -344,10 +343,8 @@ int kbase_job_hw_submit(struct kbase_device *kbdev, struct kbase_jd_atom *katom,
  * work out the best estimate (which might still result in an over-estimate to
  * the calculated time spent)
  */
-static void kbasep_job_slot_update_head_start_timestamp(
-						struct kbase_device *kbdev,
-						int js,
-						ktime_t end_timestamp)
+static void kbasep_job_slot_update_head_start_timestamp(struct kbase_device *kbdev, unsigned int js,
+							ktime_t end_timestamp)
 {
 	ktime_t timestamp_diff;
 	struct kbase_jd_atom *katom;
@@ -377,8 +374,7 @@ static void kbasep_job_slot_update_head_start_timestamp(
  * Make a tracepoint call to the instrumentation module informing that
  * softstop happened on given lpu (job slot).
  */
-static void kbasep_trace_tl_event_lpu_softstop(struct kbase_device *kbdev,
-					int js)
+static void kbasep_trace_tl_event_lpu_softstop(struct kbase_device *kbdev, unsigned int js)
 {
 	KBASE_TLSTREAM_TL_EVENT_LPU_SOFTSTOP(
 		kbdev,
@@ -387,7 +383,6 @@ static void kbasep_trace_tl_event_lpu_softstop(struct kbase_device *kbdev,
 
 void kbase_job_done(struct kbase_device *kbdev, u32 done)
 {
-	int i;
 	u32 count = 0;
 	ktime_t end_timestamp;
 
@@ -398,6 +393,7 @@ void kbase_job_done(struct kbase_device *kbdev, u32 done)
 	end_timestamp = ktime_get_raw();
 
 	while (done) {
+		unsigned int i;
 		u32 failed = done >> 16;
 
 		/* treat failed slots as finished slots */
@@ -407,8 +403,6 @@ void kbase_job_done(struct kbase_device *kbdev, u32 done)
 		 * numbered interrupts before the higher numbered ones.
 		 */
 		i = ffs(finished) - 1;
-		if (WARN(i < 0, "%s: called without receiving any interrupts\n", __func__))
-			break;
 
 		do {
 			int nr_done;
@@ -607,11 +601,9 @@ void kbase_job_done(struct kbase_device *kbdev, u32 done)
 	KBASE_KTRACE_ADD_JM(kbdev, JM_IRQ_END, NULL, NULL, 0, count);
 }
 
-void kbasep_job_slot_soft_or_hard_stop_do_action(struct kbase_device *kbdev,
-					int js,
-					u32 action,
-					base_jd_core_req core_reqs,
-					struct kbase_jd_atom *target_katom)
+void kbasep_job_slot_soft_or_hard_stop_do_action(struct kbase_device *kbdev, unsigned int js,
+						 u32 action, base_jd_core_req core_reqs,
+						 struct kbase_jd_atom *target_katom)
 {
 #if KBASE_KTRACE_ENABLE
 	u32 status_reg_before;
@@ -669,6 +661,10 @@ void kbasep_job_slot_soft_or_hard_stop_do_action(struct kbase_device *kbdev,
 		struct kbase_context *head_kctx;
 
 		head = kbase_gpu_inspect(kbdev, js, 0);
+		if (unlikely(!head)) {
+			dev_err(kbdev->dev, "Can't get a katom from js(%d)\n", js);
+			return;
+		}
 		head_kctx = head->kctx;
 
 		if (status_reg_before == BASE_JD_EVENT_ACTIVE)
@@ -737,7 +733,7 @@ void kbasep_job_slot_soft_or_hard_stop_do_action(struct kbase_device *kbdev,
 void kbase_backend_jm_kill_running_jobs_from_kctx(struct kbase_context *kctx)
 {
 	struct kbase_device *kbdev = kctx->kbdev;
-	int i;
+	unsigned int i;
 
 	lockdep_assert_held(&kbdev->hwaccess_lock);
 
@@ -749,7 +745,7 @@ void kbase_job_slot_ctx_priority_check_locked(struct kbase_context *kctx,
 				struct kbase_jd_atom *target_katom)
 {
 	struct kbase_device *kbdev;
-	int target_js = target_katom->slot_nr;
+	unsigned int target_js = target_katom->slot_nr;
 	int i;
 	bool stop_sent = false;
 
@@ -927,8 +923,8 @@ KBASE_EXPORT_TEST_API(kbase_job_slot_term);
  *
  * Where possible any job in the next register is evicted before the soft-stop.
  */
-void kbase_job_slot_softstop_swflags(struct kbase_device *kbdev, int js,
-			struct kbase_jd_atom *target_katom, u32 sw_flags)
+void kbase_job_slot_softstop_swflags(struct kbase_device *kbdev, unsigned int js,
+				     struct kbase_jd_atom *target_katom, u32 sw_flags)
 {
 	dev_dbg(kbdev->dev, "Soft-stop atom %pK with flags 0x%x (s:%d)\n",
 		target_katom, sw_flags, js);
@@ -948,8 +944,8 @@ void kbase_job_slot_softstop(struct kbase_device *kbdev, int js,
 	kbase_job_slot_softstop_swflags(kbdev, js, target_katom, 0u);
 }
 
-void kbase_job_slot_hardstop(struct kbase_context *kctx, int js,
-				struct kbase_jd_atom *target_katom)
+void kbase_job_slot_hardstop(struct kbase_context *kctx, unsigned int js,
+			     struct kbase_jd_atom *target_katom)
 {
 	struct kbase_device *kbdev = kctx->kbdev;
 	bool stopped;
@@ -1258,7 +1254,7 @@ static enum hrtimer_restart kbasep_reset_timer_callback(struct hrtimer *timer)
 
 static void kbasep_try_reset_gpu_early_locked(struct kbase_device *kbdev)
 {
-	int i;
+	unsigned int i;
 	int pending_jobs = 0;
 
 	/* Count the number of jobs */

drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_jm_internal.h

@@ -33,21 +33,6 @@
 #include <backend/gpu/mali_kbase_jm_rb.h>
 #include <device/mali_kbase_device.h>
 
-/**
- * kbase_job_submit_nolock() - Submit a job to a certain job-slot
- * @kbdev:	Device pointer
- * @katom:	Atom to submit
- * @js:		Job slot to submit on
- *
- * The caller must check kbasep_jm_is_submit_slots_free() != false before
- * calling this.
- *
- * The following locking conditions are made on the caller:
- * - it must hold the hwaccess_lock
- */
-void kbase_job_submit_nolock(struct kbase_device *kbdev,
-					struct kbase_jd_atom *katom, int js);
-
 /**
  * kbase_job_done_slot() - Complete the head job on a particular job-slot
  * @kbdev:		Device pointer
@@ -60,17 +45,16 @@ void kbase_job_done_slot(struct kbase_device *kbdev, int s, u32 completion_code,
 					u64 job_tail, ktime_t *end_timestamp);
 
 #if IS_ENABLED(CONFIG_GPU_TRACEPOINTS)
-static inline char *kbasep_make_job_slot_string(int js, char *js_string,
-						size_t js_size)
+static inline char *kbasep_make_job_slot_string(unsigned int js, char *js_string, size_t js_size)
 {
-	snprintf(js_string, js_size, "job_slot_%i", js);
+	snprintf(js_string, js_size, "job_slot_%u", js);
 	return js_string;
 }
 #endif
 
 #if !MALI_USE_CSF
-static inline int kbasep_jm_is_js_free(struct kbase_device *kbdev, int js,
-						struct kbase_context *kctx)
+static inline int kbasep_jm_is_js_free(struct kbase_device *kbdev, unsigned int js,
+				       struct kbase_context *kctx)
 {
 	return !kbase_reg_read(kbdev, JOB_SLOT_REG(js, JS_COMMAND_NEXT));
 }
@@ -90,7 +74,7 @@ static inline int kbasep_jm_is_js_free(struct kbase_device *kbdev, int js,
  *
  * Return: 0 if the job was successfully submitted to hardware, an error otherwise.
  */
-int kbase_job_hw_submit(struct kbase_device *kbdev, struct kbase_jd_atom *katom, int js);
+int kbase_job_hw_submit(struct kbase_device *kbdev, struct kbase_jd_atom *katom, unsigned int js);
 
 #if !MALI_USE_CSF
 /**
@@ -106,11 +90,9 @@ int kbase_job_hw_submit(struct kbase_device *kbdev, struct kbase_jd_atom *katom,
  * The following locking conditions are made on the caller:
  * - it must hold the hwaccess_lock
  */
-void kbasep_job_slot_soft_or_hard_stop_do_action(struct kbase_device *kbdev,
-					int js,
-					u32 action,
-					base_jd_core_req core_reqs,
-					struct kbase_jd_atom *target_katom);
+void kbasep_job_slot_soft_or_hard_stop_do_action(struct kbase_device *kbdev, unsigned int js,
+						 u32 action, base_jd_core_req core_reqs,
+						 struct kbase_jd_atom *target_katom);
 #endif /* !MALI_USE_CSF */
 
 /**
@@ -134,11 +116,8 @@ void kbasep_job_slot_soft_or_hard_stop_do_action(struct kbase_device *kbdev,
  *
  * Return: true if an atom was stopped, false otherwise
  */
-bool kbase_backend_soft_hard_stop_slot(struct kbase_device *kbdev,
-					struct kbase_context *kctx,
-					int js,
-					struct kbase_jd_atom *katom,
-					u32 action);
+bool kbase_backend_soft_hard_stop_slot(struct kbase_device *kbdev, struct kbase_context *kctx,
+				       unsigned int js, struct kbase_jd_atom *katom, u32 action);
 
 /**
  * kbase_job_slot_init - Initialise job slot framework

drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_jm_rb.c

@@ -93,9 +93,8 @@ static void kbase_gpu_enqueue_atom(struct kbase_device *kbdev,
  *
  * Return: Atom removed from ringbuffer
  */
-static struct kbase_jd_atom *kbase_gpu_dequeue_atom(struct kbase_device *kbdev,
-						int js,
-						ktime_t *end_timestamp)
+static struct kbase_jd_atom *kbase_gpu_dequeue_atom(struct kbase_device *kbdev, unsigned int js,
+						    ktime_t *end_timestamp)
 {
 	struct slot_rb *rb = &kbdev->hwaccess.backend.slot_rb[js];
 	struct kbase_jd_atom *katom;
@@ -118,8 +117,7 @@ static struct kbase_jd_atom *kbase_gpu_dequeue_atom(struct kbase_device *kbdev,
 	return katom;
 }
 
-struct kbase_jd_atom *kbase_gpu_inspect(struct kbase_device *kbdev, int js,
-					int idx)
+struct kbase_jd_atom *kbase_gpu_inspect(struct kbase_device *kbdev, unsigned int js, int idx)
 {
 	struct slot_rb *rb = &kbdev->hwaccess.backend.slot_rb[js];
 
@@ -131,8 +129,7 @@ struct kbase_jd_atom *kbase_gpu_inspect(struct kbase_device *kbdev, int js,
 	return rb->entries[(rb->read_idx + idx) & SLOT_RB_MASK].katom;
 }
 
-struct kbase_jd_atom *kbase_backend_inspect_tail(struct kbase_device *kbdev,
-					int js)
+struct kbase_jd_atom *kbase_backend_inspect_tail(struct kbase_device *kbdev, unsigned int js)
 {
 	struct slot_rb *rb = &kbdev->hwaccess.backend.slot_rb[js];
 
@@ -144,12 +141,13 @@ struct kbase_jd_atom *kbase_backend_inspect_tail(struct kbase_device *kbdev,
 
 bool kbase_gpu_atoms_submitted_any(struct kbase_device *kbdev)
 {
-	int js;
-	int i;
+	unsigned int js;
 
 	lockdep_assert_held(&kbdev->hwaccess_lock);
 
 	for (js = 0; js < kbdev->gpu_props.num_job_slots; js++) {
+		int i;
+
 		for (i = 0; i < SLOT_RB_SIZE; i++) {
 			struct kbase_jd_atom *katom = kbase_gpu_inspect(kbdev, js, i);
 
@@ -160,7 +158,7 @@ bool kbase_gpu_atoms_submitted_any(struct kbase_device *kbdev)
 	return false;
 }
 
-int kbase_backend_nr_atoms_submitted(struct kbase_device *kbdev, int js)
+int kbase_backend_nr_atoms_submitted(struct kbase_device *kbdev, unsigned int js)
 {
 	int nr = 0;
 	int i;
@@ -178,7 +176,7 @@ int kbase_backend_nr_atoms_submitted(struct kbase_device *kbdev, int js)
 	return nr;
 }
 
-int kbase_backend_nr_atoms_on_slot(struct kbase_device *kbdev, int js)
+int kbase_backend_nr_atoms_on_slot(struct kbase_device *kbdev, unsigned int js)
 {
 	int nr = 0;
 	int i;
@@ -193,8 +191,8 @@ int kbase_backend_nr_atoms_on_slot(struct kbase_device *kbdev, int js)
 	return nr;
 }
 
-static int kbase_gpu_nr_atoms_on_slot_min(struct kbase_device *kbdev, int js,
-				enum kbase_atom_gpu_rb_state min_rb_state)
+static int kbase_gpu_nr_atoms_on_slot_min(struct kbase_device *kbdev, unsigned int js,
+					  enum kbase_atom_gpu_rb_state min_rb_state)
 {
 	int nr = 0;
 	int i;
@@ -244,9 +242,11 @@ static bool check_secure_atom(struct kbase_jd_atom *katom, bool secure)
 static bool kbase_gpu_check_secure_atoms(struct kbase_device *kbdev,
 		bool secure)
 {
-	int js, i;
+	unsigned int js;
 
 	for (js = 0; js < kbdev->gpu_props.num_job_slots; js++) {
+		int i;
+
 		for (i = 0; i < SLOT_RB_SIZE; i++) {
 			struct kbase_jd_atom *katom = kbase_gpu_inspect(kbdev,
 					js, i);
@@ -261,7 +261,7 @@ static bool kbase_gpu_check_secure_atoms(struct kbase_device *kbdev,
 	return false;
 }
 
-int kbase_backend_slot_free(struct kbase_device *kbdev, int js)
+int kbase_backend_slot_free(struct kbase_device *kbdev, unsigned int js)
 {
 	lockdep_assert_held(&kbdev->hwaccess_lock);
 
@@ -430,9 +430,9 @@ static void kbase_gpu_mark_atom_for_return(struct kbase_device *kbdev,
  *
  * Return: true if any slots other than @js are busy, false otherwise
  */
-static inline bool other_slots_busy(struct kbase_device *kbdev, int js)
+static inline bool other_slots_busy(struct kbase_device *kbdev, unsigned int js)
 {
-	int slot;
+	unsigned int slot;
 
 	for (slot = 0; slot < kbdev->gpu_props.num_job_slots; slot++) {
 		if (slot == js)
@@ -844,7 +844,7 @@ static int kbase_jm_exit_protected_mode(struct kbase_device *kbdev,
 
 void kbase_backend_slot_update(struct kbase_device *kbdev)
 {
-	int js;
+	unsigned int js;
 
 	lockdep_assert_held(&kbdev->hwaccess_lock);
 
@@ -1013,25 +1013,25 @@ void kbase_backend_slot_update(struct kbase_device *kbdev)
 					kbase_pm_request_gpu_cycle_counter_l2_is_on(
 									kbdev);
 
-				if (!kbase_job_hw_submit(kbdev, katom[idx], js))
+				if (!kbase_job_hw_submit(kbdev, katom[idx], js)) {
 					katom[idx]->gpu_rb_state = KBASE_ATOM_GPU_RB_SUBMITTED;
+
+					/* Inform power management at start/finish of
+					 * atom so it can update its GPU utilisation
+					 * metrics.
+					 */
+					kbase_pm_metrics_update(kbdev,
+							&katom[idx]->start_timestamp);
+
+					/* Inform platform at start/finish of atom */
+					kbasep_platform_event_atom_submit(katom[idx]);
+				}
 				else
 					break;
 
 				/* ***TRANSITION TO HIGHER STATE*** */
 				fallthrough;
 			case KBASE_ATOM_GPU_RB_SUBMITTED:
-
-				/* Inform power management at start/finish of
-				 * atom so it can update its GPU utilisation
-				 * metrics.
-				 */
-				kbase_pm_metrics_update(kbdev,
-						&katom[idx]->start_timestamp);
-
-				/* Inform platform at start/finish of atom */
-				kbasep_platform_event_atom_submit(katom[idx]);
-
 				break;
 
 			case KBASE_ATOM_GPU_RB_RETURN_TO_JS:
@@ -1111,8 +1111,7 @@ kbase_rb_atom_might_depend(const struct kbase_jd_atom *katom_a,
  *
  * Return: true if an atom was evicted, false otherwise.
  */
-bool kbase_gpu_irq_evict(struct kbase_device *kbdev, int js,
-				u32 completion_code)
+bool kbase_gpu_irq_evict(struct kbase_device *kbdev, unsigned int js, u32 completion_code)
 {
 	struct kbase_jd_atom *katom;
 	struct kbase_jd_atom *next_katom;
@@ -1120,6 +1119,10 @@ bool kbase_gpu_irq_evict(struct kbase_device *kbdev, int js,
 	lockdep_assert_held(&kbdev->hwaccess_lock);
 
 	katom = kbase_gpu_inspect(kbdev, js, 0);
+	if (!katom) {
+		dev_err(kbdev->dev, "Can't get a katom from js(%u)\n", js);
+		return false;
+	}
 	next_katom = kbase_gpu_inspect(kbdev, js, 1);
 
 	if (next_katom &&
@@ -1184,13 +1187,18 @@ bool kbase_gpu_irq_evict(struct kbase_device *kbdev, int js,
  * on the HW and returned to the JS.
  */
 
-void kbase_gpu_complete_hw(struct kbase_device *kbdev, int js,
-				u32 completion_code,
-				u64 job_tail,
-				ktime_t *end_timestamp)
+void kbase_gpu_complete_hw(struct kbase_device *kbdev, unsigned int js, u32 completion_code,
+			   u64 job_tail, ktime_t *end_timestamp)
 {
 	struct kbase_jd_atom *katom = kbase_gpu_inspect(kbdev, js, 0);
-	struct kbase_context *kctx = katom->kctx;
+	struct kbase_context *kctx = NULL;
+
+	if (unlikely(!katom)) {
+		dev_err(kbdev->dev, "Can't get a katom from js(%d)\n", js);
+		return;
+	}
+
+	kctx = katom->kctx;
 
 	dev_dbg(kbdev->dev,
 		"Atom %pK completed on hw with code 0x%x and job_tail 0x%llx (s:%d)\n",
@@ -1243,7 +1251,7 @@ void kbase_gpu_complete_hw(struct kbase_device *kbdev, int js,
 		}
 	} else if (completion_code != BASE_JD_EVENT_DONE) {
 		struct kbasep_js_device_data *js_devdata = &kbdev->js_data;
-		int i;
+		unsigned int i;
 
 		if (!kbase_ctx_flag(katom->kctx, KCTX_DYING)) {
 			dev_warn(kbdev->dev, "error detected from slot %d, job status 0x%08x (%s)",
@@ -1388,7 +1396,7 @@ void kbase_gpu_complete_hw(struct kbase_device *kbdev, int js,
 
 void kbase_backend_reset(struct kbase_device *kbdev, ktime_t *end_timestamp)
 {
-	int js;
+	unsigned int js;
 
 	lockdep_assert_held(&kbdev->hwaccess_lock);
 
@@ -1416,7 +1424,7 @@ void kbase_backend_reset(struct kbase_device *kbdev, ktime_t *end_timestamp)
 				     kbase_gpu_in_protected_mode(kbdev));
 				WARN(!(kbase_jd_katom_is_protected(katom) && js == 0) &&
 					     kbase_jd_katom_is_protected(katom),
-				     "Protected atom on JS%d not supported", js);
+				     "Protected atom on JS%u not supported", js);
 			}
 			if ((katom->gpu_rb_state < KBASE_ATOM_GPU_RB_SUBMITTED) &&
 			    !kbase_ctx_flag(katom->kctx, KCTX_DYING))
@@ -1512,10 +1520,8 @@ static bool should_stop_next_atom(struct kbase_device *kbdev,
 	return ret;
 }
 
-static inline void kbase_gpu_stop_atom(struct kbase_device *kbdev,
-					int js,
-					struct kbase_jd_atom *katom,
-					u32 action)
+static inline void kbase_gpu_stop_atom(struct kbase_device *kbdev, unsigned int js,
+				       struct kbase_jd_atom *katom, u32 action)
 {
 	struct kbase_context *kctx = katom->kctx;
 	u32 hw_action = action & JS_COMMAND_MASK;
@@ -1559,11 +1565,8 @@ static int should_stop_x_dep_slot(struct kbase_jd_atom *katom)
 	return -1;
 }
 
-bool kbase_backend_soft_hard_stop_slot(struct kbase_device *kbdev,
-					struct kbase_context *kctx,
-					int js,
-					struct kbase_jd_atom *katom,
-					u32 action)
+bool kbase_backend_soft_hard_stop_slot(struct kbase_device *kbdev, struct kbase_context *kctx,
+				       unsigned int js, struct kbase_jd_atom *katom, u32 action)
 {
 	struct kbase_jd_atom *katom_idx0;
 	struct kbase_context *kctx_idx0 = NULL;
@@ -1816,7 +1819,7 @@ void kbase_backend_complete_wq_post_sched(struct kbase_device *kbdev,
 void kbase_gpu_dump_slots(struct kbase_device *kbdev)
 {
 	unsigned long flags;
-	int js;
+	unsigned int js;
 
 	spin_lock_irqsave(&kbdev->hwaccess_lock, flags);
 
@@ -1831,12 +1834,10 @@ void kbase_gpu_dump_slots(struct kbase_device *kbdev)
 									idx);
 
 			if (katom)
-				dev_info(kbdev->dev,
-				"  js%d idx%d : katom=%pK gpu_rb_state=%d\n",
-				js, idx, katom, katom->gpu_rb_state);
+				dev_info(kbdev->dev, "  js%u idx%d : katom=%pK gpu_rb_state=%d\n",
+					 js, idx, katom, katom->gpu_rb_state);
 			else
-				dev_info(kbdev->dev, "  js%d idx%d : empty\n",
-								js, idx);
+				dev_info(kbdev->dev, "  js%u idx%d : empty\n", js, idx);
 		}
 	}
 
@@ -1845,7 +1846,7 @@ void kbase_gpu_dump_slots(struct kbase_device *kbdev)
 
 void kbase_backend_slot_kctx_purge_locked(struct kbase_device *kbdev, struct kbase_context *kctx)
 {
-	int js;
+	unsigned int js;
 	bool tracked = false;
 
 	lockdep_assert_held(&kbdev->hwaccess_lock);

drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_jm_rb.h

@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
 /*
  *
- * (C) COPYRIGHT 2014-2018, 2020-2021 ARM Limited. All rights reserved.
+ * (C) COPYRIGHT 2014-2018, 2020-2022 ARM Limited. All rights reserved.
  *
  * This program is free software and is provided to you under the terms of the
  * GNU General Public License version 2 as published by the Free Software
@@ -40,8 +40,7 @@
  *
  * Return: true if job evicted from NEXT registers, false otherwise
  */
-bool kbase_gpu_irq_evict(struct kbase_device *kbdev, int js,
-				u32 completion_code);
+bool kbase_gpu_irq_evict(struct kbase_device *kbdev, unsigned int js, u32 completion_code);
 
 /**
  * kbase_gpu_complete_hw - Complete an atom on job slot js
@@ -53,10 +52,8 @@ bool kbase_gpu_irq_evict(struct kbase_device *kbdev, int js,
  *                   completed
  * @end_timestamp:   Time of completion
  */
-void kbase_gpu_complete_hw(struct kbase_device *kbdev, int js,
-				u32 completion_code,
-				u64 job_tail,
-				ktime_t *end_timestamp);
+void kbase_gpu_complete_hw(struct kbase_device *kbdev, unsigned int js, u32 completion_code,
+			   u64 job_tail, ktime_t *end_timestamp);
 
 /**
  * kbase_gpu_inspect - Inspect the contents of the HW access ringbuffer
@@ -68,8 +65,7 @@ void kbase_gpu_complete_hw(struct kbase_device *kbdev, int js,
  * Return:  The atom at that position in the ringbuffer
  *          or NULL if no atom present
  */
-struct kbase_jd_atom *kbase_gpu_inspect(struct kbase_device *kbdev, int js,
-					int idx);
+struct kbase_jd_atom *kbase_gpu_inspect(struct kbase_device *kbdev, unsigned int js, int idx);
 
 /**
  * kbase_gpu_dump_slots - Print the contents of the slot ringbuffers

drivers/gpu/arm/bifrost/backend/gpu/mali_kbase_js_backend.c

@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
 /*
  *
- * (C) COPYRIGHT 2014-2021 ARM Limited. All rights reserved.
+ * (C) COPYRIGHT 2014-2022 ARM Limited. All rights reserved.
  *
  * This program is free software and is provided to you under the terms of the
  * GNU General Public License version 2 as published by the Free Software
@@ -91,7 +91,7 @@ static enum hrtimer_restart timer_callback(struct hrtimer *timer)
 	struct kbase_device *kbdev;
 	struct kbasep_js_device_data *js_devdata;
 	struct kbase_backend_data *backend;
-	int s;
+	unsigned int s;
 	bool reset_needed = false;
 
 	KBASE_DEBUG_ASSERT(timer != NULL);
@@ -375,4 +375,3 @@ void kbase_backend_timeouts_changed(struct kbase_device *kbdev)
 
 	backend->timeouts_updated = true;
 }
-