mirror of
https://github.com/armbian/linux-cix.git
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Merge tag 'dma-mapping-5.20-2022-08-06' of git://git.infradead.org/users/hch/dma-mapping
Pull dma-mapping updates from Christoph Hellwig: - convert arm32 to the common dma-direct code (Arnd Bergmann, Robin Murphy, Christoph Hellwig) - restructure the PCIe peer to peer mapping support (Logan Gunthorpe) - allow the IOMMU code to communicate an optional DMA mapping length and use that in scsi and libata (John Garry) - split the global swiotlb lock (Tianyu Lan) - various fixes and cleanup (Chao Gao, Dan Carpenter, Dongli Zhang, Lukas Bulwahn, Robin Murphy) * tag 'dma-mapping-5.20-2022-08-06' of git://git.infradead.org/users/hch/dma-mapping: (45 commits) swiotlb: fix passing local variable to debugfs_create_ulong() dma-mapping: reformat comment to suppress htmldoc warning PCI/P2PDMA: Remove pci_p2pdma_[un]map_sg() RDMA/rw: drop pci_p2pdma_[un]map_sg() RDMA/core: introduce ib_dma_pci_p2p_dma_supported() nvme-pci: convert to using dma_map_sgtable() nvme-pci: check DMA ops when indicating support for PCI P2PDMA iommu/dma: support PCI P2PDMA pages in dma-iommu map_sg iommu: Explicitly skip bus address marked segments in __iommu_map_sg() dma-mapping: add flags to dma_map_ops to indicate PCI P2PDMA support dma-direct: support PCI P2PDMA pages in dma-direct map_sg dma-mapping: allow EREMOTEIO return code for P2PDMA transfers PCI/P2PDMA: Introduce helpers for dma_map_sg implementations PCI/P2PDMA: Attempt to set map_type if it has not been set lib/scatterlist: add flag for indicating P2PDMA segments in an SGL swiotlb: clean up some coding style and minor issues dma-mapping: update comment after dmabounce removal scsi: sd: Add a comment about limiting max_sectors to shost optimal limit ata: libata-scsi: cap ata_device->max_sectors according to shost->max_sectors scsi: scsi_transport_sas: cap shost opt_sectors according to DMA optimal limit ...
This commit is contained in:
@@ -5999,8 +5999,11 @@
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it if 0 is given (See Documentation/admin-guide/cgroup-v1/memory.rst)
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swiotlb= [ARM,IA-64,PPC,MIPS,X86]
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Format: { <int> | force | noforce }
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Format: { <int> [,<int>] | force | noforce }
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<int> -- Number of I/O TLB slabs
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<int> -- Second integer after comma. Number of swiotlb
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areas with their own lock. Will be rounded up
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to a power of 2.
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force -- force using of bounce buffers even if they
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wouldn't be automatically used by the kernel
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noforce -- Never use bounce buffers (for debugging)
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@@ -204,6 +204,20 @@ Returns the maximum size of a mapping for the device. The size parameter
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of the mapping functions like dma_map_single(), dma_map_page() and
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others should not be larger than the returned value.
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::
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size_t
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dma_opt_mapping_size(struct device *dev);
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Returns the maximum optimal size of a mapping for the device.
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Mapping larger buffers may take much longer in certain scenarios. In
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addition, for high-rate short-lived streaming mappings, the upfront time
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spent on the mapping may account for an appreciable part of the total
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request lifetime. As such, if splitting larger requests incurs no
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significant performance penalty, then device drivers are advised to
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limit total DMA streaming mappings length to the returned value.
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::
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bool
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@@ -287,11 +287,13 @@ iommu options only relevant to the AMD GART hardware IOMMU:
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iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
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implementation:
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swiotlb=<pages>[,force]
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<pages>
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Prereserve that many 128K pages for the software IO bounce buffering.
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swiotlb=<slots>[,force,noforce]
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<slots>
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Prereserve that many 2K slots for the software IO bounce buffering.
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force
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Force all IO through the software TLB.
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noforce
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Do not initialize the software TLB.
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Miscellaneous
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@@ -15,13 +15,12 @@ config ARM
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select ARCH_HAS_MEMBARRIER_SYNC_CORE
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select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
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select ARCH_HAS_PTE_SPECIAL if ARM_LPAE
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select ARCH_HAS_PHYS_TO_DMA
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select ARCH_HAS_SETUP_DMA_OPS
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select ARCH_HAS_SET_MEMORY
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select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL
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select ARCH_HAS_STRICT_MODULE_RWX if MMU
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE if SWIOTLB || !MMU
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select ARCH_HAS_SYNC_DMA_FOR_CPU if SWIOTLB || !MMU
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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select ARCH_HAS_SYNC_DMA_FOR_CPU
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select ARCH_HAS_TEARDOWN_DMA_OPS if MMU
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select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
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select ARCH_HAVE_CUSTOM_GPIO_H
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@@ -1,11 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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config SA1111
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bool
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select DMABOUNCE if !ARCH_PXA
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config DMABOUNCE
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bool
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select ZONE_DMA
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select ZONE_DMA if ARCH_SA1100
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config KRAIT_L2_ACCESSORS
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bool
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@@ -6,7 +6,6 @@
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obj-y += firmware.o
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obj-$(CONFIG_SA1111) += sa1111.o
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obj-$(CONFIG_DMABOUNCE) += dmabounce.o
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obj-$(CONFIG_KRAIT_L2_ACCESSORS) += krait-l2-accessors.o
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obj-$(CONFIG_SHARP_LOCOMO) += locomo.o
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obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o
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File diff suppressed because it is too large
Load Diff
@@ -1389,70 +1389,9 @@ void sa1111_driver_unregister(struct sa1111_driver *driver)
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}
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EXPORT_SYMBOL(sa1111_driver_unregister);
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#ifdef CONFIG_DMABOUNCE
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/*
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* According to the "Intel StrongARM SA-1111 Microprocessor Companion
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* Chip Specification Update" (June 2000), erratum #7, there is a
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* significant bug in the SA1111 SDRAM shared memory controller. If
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* an access to a region of memory above 1MB relative to the bank base,
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* it is important that address bit 10 _NOT_ be asserted. Depending
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* on the configuration of the RAM, bit 10 may correspond to one
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* of several different (processor-relative) address bits.
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*
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* This routine only identifies whether or not a given DMA address
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* is susceptible to the bug.
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*
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* This should only get called for sa1111_device types due to the
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* way we configure our device dma_masks.
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*/
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static int sa1111_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
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{
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/*
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* Section 4.6 of the "Intel StrongARM SA-1111 Development Module
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* User's Guide" mentions that jumpers R51 and R52 control the
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* target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
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* SDRAM bank 1 on Neponset). The default configuration selects
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* Assabet, so any address in bank 1 is necessarily invalid.
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*/
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return (machine_is_assabet() || machine_is_pfs168()) &&
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(addr >= 0xc8000000 || (addr + size) >= 0xc8000000);
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}
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static int sa1111_notifier_call(struct notifier_block *n, unsigned long action,
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void *data)
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{
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struct sa1111_dev *dev = to_sa1111_device(data);
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switch (action) {
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case BUS_NOTIFY_ADD_DEVICE:
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if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL) {
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int ret = dmabounce_register_dev(&dev->dev, 1024, 4096,
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sa1111_needs_bounce);
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if (ret)
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dev_err(&dev->dev, "failed to register with dmabounce: %d\n", ret);
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}
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break;
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case BUS_NOTIFY_DEL_DEVICE:
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if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL)
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dmabounce_unregister_dev(&dev->dev);
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break;
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}
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return NOTIFY_OK;
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}
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static struct notifier_block sa1111_bus_notifier = {
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.notifier_call = sa1111_notifier_call,
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};
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#endif
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static int __init sa1111_init(void)
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{
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int ret = bus_register(&sa1111_bus_type);
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#ifdef CONFIG_DMABOUNCE
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if (ret == 0)
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bus_register_notifier(&sa1111_bus_type, &sa1111_bus_notifier);
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#endif
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if (ret == 0)
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platform_driver_register(&sa1111_device_driver);
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return ret;
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@@ -1461,9 +1400,6 @@ static int __init sa1111_init(void)
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static void __exit sa1111_exit(void)
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{
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platform_driver_unregister(&sa1111_device_driver);
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#ifdef CONFIG_DMABOUNCE
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bus_unregister_notifier(&sa1111_bus_type, &sa1111_bus_notifier);
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#endif
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bus_unregister(&sa1111_bus_type);
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}
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@@ -6,9 +6,6 @@
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#define ASMARM_DEVICE_H
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struct dev_archdata {
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#ifdef CONFIG_DMABOUNCE
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struct dmabounce_device_info *dmabounce;
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#endif
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#ifdef CONFIG_ARM_DMA_USE_IOMMU
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struct dma_iommu_mapping *mapping;
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#endif
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@@ -1,48 +1 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef ASM_ARM_DMA_DIRECT_H
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#define ASM_ARM_DMA_DIRECT_H 1
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#include <asm/memory.h>
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/*
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* dma_to_pfn/pfn_to_dma/virt_to_dma are architecture private
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* functions used internally by the DMA-mapping API to provide DMA
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* addresses. They must not be used by drivers.
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*/
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static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
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{
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if (dev && dev->dma_range_map)
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pfn = PFN_DOWN(translate_phys_to_dma(dev, PFN_PHYS(pfn)));
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return (dma_addr_t)__pfn_to_bus(pfn);
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}
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static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
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{
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unsigned long pfn = __bus_to_pfn(addr);
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if (dev && dev->dma_range_map)
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pfn = PFN_DOWN(translate_dma_to_phys(dev, PFN_PHYS(pfn)));
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return pfn;
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}
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static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
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{
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if (dev)
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return pfn_to_dma(dev, virt_to_pfn(addr));
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return (dma_addr_t)__virt_to_bus((unsigned long)(addr));
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}
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static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
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{
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unsigned int offset = paddr & ~PAGE_MASK;
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return pfn_to_dma(dev, __phys_to_pfn(paddr)) + offset;
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}
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static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr)
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{
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unsigned int offset = dev_addr & ~PAGE_MASK;
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return __pfn_to_phys(dma_to_pfn(dev, dev_addr)) + offset;
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}
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#endif /* ASM_ARM_DMA_DIRECT_H */
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#include <mach/dma-direct.h>
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@@ -1,128 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef ASMARM_DMA_MAPPING_H
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#define ASMARM_DMA_MAPPING_H
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#ifdef __KERNEL__
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#include <linux/mm_types.h>
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#include <linux/scatterlist.h>
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#include <xen/xen.h>
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#include <asm/xen/hypervisor.h>
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extern const struct dma_map_ops arm_dma_ops;
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extern const struct dma_map_ops arm_coherent_dma_ops;
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static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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{
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if (IS_ENABLED(CONFIG_MMU) && !IS_ENABLED(CONFIG_ARM_LPAE))
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return &arm_dma_ops;
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return NULL;
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}
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/**
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* arm_dma_alloc - allocate consistent memory for DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @size: required memory size
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* @handle: bus-specific DMA address
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* @attrs: optinal attributes that specific mapping properties
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*
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* Allocate some memory for a device for performing DMA. This function
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* allocates pages, and will return the CPU-viewed address, and sets @handle
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* to be the device-viewed address.
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*/
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extern void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
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gfp_t gfp, unsigned long attrs);
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|
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/**
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* arm_dma_free - free memory allocated by arm_dma_alloc
|
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
||||
* @size: size of memory originally requested in dma_alloc_coherent
|
||||
* @cpu_addr: CPU-view address returned from dma_alloc_coherent
|
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* @handle: device-view address returned from dma_alloc_coherent
|
||||
* @attrs: optinal attributes that specific mapping properties
|
||||
*
|
||||
* Free (and unmap) a DMA buffer previously allocated by
|
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* arm_dma_alloc().
|
||||
*
|
||||
* References to memory and mappings associated with cpu_addr/handle
|
||||
* during and after this call executing are illegal.
|
||||
*/
|
||||
extern void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
|
||||
dma_addr_t handle, unsigned long attrs);
|
||||
|
||||
/**
|
||||
* arm_dma_mmap - map a coherent DMA allocation into user space
|
||||
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
||||
* @vma: vm_area_struct describing requested user mapping
|
||||
* @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
|
||||
* @handle: device-view address returned from dma_alloc_coherent
|
||||
* @size: size of memory originally requested in dma_alloc_coherent
|
||||
* @attrs: optinal attributes that specific mapping properties
|
||||
*
|
||||
* Map a coherent DMA buffer previously allocated by dma_alloc_coherent
|
||||
* into user space. The coherent DMA buffer must not be freed by the
|
||||
* driver until the user space mapping has been released.
|
||||
*/
|
||||
extern int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
|
||||
void *cpu_addr, dma_addr_t dma_addr, size_t size,
|
||||
unsigned long attrs);
|
||||
|
||||
/*
|
||||
* For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
|
||||
* and utilize bounce buffers as needed to work around limited DMA windows.
|
||||
*
|
||||
* On the SA-1111, a bug limits DMA to only certain regions of RAM.
|
||||
* On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
|
||||
* On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
|
||||
*
|
||||
* The following are helper functions used by the dmabounce subystem
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* dmabounce_register_dev
|
||||
*
|
||||
* @dev: valid struct device pointer
|
||||
* @small_buf_size: size of buffers to use with small buffer pool
|
||||
* @large_buf_size: size of buffers to use with large buffer pool (can be 0)
|
||||
* @needs_bounce_fn: called to determine whether buffer needs bouncing
|
||||
*
|
||||
* This function should be called by low-level platform code to register
|
||||
* a device as requireing DMA buffer bouncing. The function will allocate
|
||||
* appropriate DMA pools for the device.
|
||||
*/
|
||||
extern int dmabounce_register_dev(struct device *, unsigned long,
|
||||
unsigned long, int (*)(struct device *, dma_addr_t, size_t));
|
||||
|
||||
/**
|
||||
* dmabounce_unregister_dev
|
||||
*
|
||||
* @dev: valid struct device pointer
|
||||
*
|
||||
* This function should be called by low-level platform code when device
|
||||
* that was previously registered with dmabounce_register_dev is removed
|
||||
* from the system.
|
||||
*
|
||||
*/
|
||||
extern void dmabounce_unregister_dev(struct device *);
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* The scatter list versions of the above methods.
|
||||
*/
|
||||
extern int arm_dma_map_sg(struct device *, struct scatterlist *, int,
|
||||
enum dma_data_direction, unsigned long attrs);
|
||||
extern void arm_dma_unmap_sg(struct device *, struct scatterlist *, int,
|
||||
enum dma_data_direction, unsigned long attrs);
|
||||
extern void arm_dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
|
||||
enum dma_data_direction);
|
||||
extern void arm_dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
|
||||
enum dma_data_direction);
|
||||
extern int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
|
||||
void *cpu_addr, dma_addr_t dma_addr, size_t size,
|
||||
unsigned long attrs);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif
|
||||
@@ -378,8 +378,6 @@ static inline unsigned long __virt_to_idmap(unsigned long x)
|
||||
#ifndef __virt_to_bus
|
||||
#define __virt_to_bus __virt_to_phys
|
||||
#define __bus_to_virt __phys_to_virt
|
||||
#define __pfn_to_bus(x) __pfn_to_phys(x)
|
||||
#define __bus_to_pfn(x) __phys_to_pfn(x)
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
||||
@@ -61,6 +61,7 @@ endmenu
|
||||
|
||||
# Footbridge support
|
||||
config FOOTBRIDGE
|
||||
select ARCH_HAS_PHYS_TO_DMA
|
||||
bool
|
||||
|
||||
# Footbridge in host mode
|
||||
|
||||
@@ -12,6 +12,7 @@
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/dma-direct.h>
|
||||
#include <video/vga.h>
|
||||
|
||||
#include <asm/page.h>
|
||||
@@ -335,17 +336,19 @@ unsigned long __bus_to_virt(unsigned long res)
|
||||
return res;
|
||||
}
|
||||
EXPORT_SYMBOL(__bus_to_virt);
|
||||
|
||||
unsigned long __pfn_to_bus(unsigned long pfn)
|
||||
#else
|
||||
static inline unsigned long fb_bus_sdram_offset(void)
|
||||
{
|
||||
return __pfn_to_phys(pfn) + (fb_bus_sdram_offset() - PHYS_OFFSET);
|
||||
return BUS_OFFSET;
|
||||
}
|
||||
EXPORT_SYMBOL(__pfn_to_bus);
|
||||
#endif /* CONFIG_FOOTBRIDGE_ADDIN */
|
||||
|
||||
unsigned long __bus_to_pfn(unsigned long bus)
|
||||
dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
|
||||
{
|
||||
return __phys_to_pfn(bus - (fb_bus_sdram_offset() - PHYS_OFFSET));
|
||||
return paddr + (fb_bus_sdram_offset() - PHYS_OFFSET);
|
||||
}
|
||||
EXPORT_SYMBOL(__bus_to_pfn);
|
||||
|
||||
#endif
|
||||
phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr)
|
||||
{
|
||||
return dev_addr - (fb_bus_sdram_offset() - PHYS_OFFSET);
|
||||
}
|
||||
|
||||
8
arch/arm/mach-footbridge/include/mach/dma-direct.h
Normal file
8
arch/arm/mach-footbridge/include/mach/dma-direct.h
Normal file
@@ -0,0 +1,8 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef MACH_FOOTBRIDGE_DMA_DIRECT_H
|
||||
#define MACH_FOOTBRIDGE_DMA_DIRECT_H 1
|
||||
|
||||
dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
|
||||
phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr);
|
||||
|
||||
#endif /* MACH_FOOTBRIDGE_DMA_DIRECT_H */
|
||||
@@ -26,8 +26,6 @@
|
||||
#ifndef __ASSEMBLY__
|
||||
extern unsigned long __virt_to_bus(unsigned long);
|
||||
extern unsigned long __bus_to_virt(unsigned long);
|
||||
extern unsigned long __pfn_to_bus(unsigned long);
|
||||
extern unsigned long __bus_to_pfn(unsigned long);
|
||||
#endif
|
||||
#define __virt_to_bus __virt_to_bus
|
||||
#define __bus_to_virt __bus_to_virt
|
||||
@@ -42,8 +40,6 @@ extern unsigned long __bus_to_pfn(unsigned long);
|
||||
#define BUS_OFFSET 0xe0000000
|
||||
#define __virt_to_bus(x) ((x) + (BUS_OFFSET - PAGE_OFFSET))
|
||||
#define __bus_to_virt(x) ((x) - (BUS_OFFSET - PAGE_OFFSET))
|
||||
#define __pfn_to_bus(x) (__pfn_to_phys(x) + (BUS_OFFSET - PHYS_OFFSET))
|
||||
#define __bus_to_pfn(x) __phys_to_pfn((x) - (BUS_OFFSET - PHYS_OFFSET))
|
||||
|
||||
#else
|
||||
|
||||
|
||||
@@ -98,7 +98,7 @@ static int highbank_platform_notifier(struct notifier_block *nb,
|
||||
if (of_property_read_bool(dev->of_node, "dma-coherent")) {
|
||||
val = readl(sregs_base + reg);
|
||||
writel(val | 0xff01, sregs_base + reg);
|
||||
set_dma_ops(dev, &arm_coherent_dma_ops);
|
||||
dev->dma_coherent = true;
|
||||
}
|
||||
|
||||
return NOTIFY_OK;
|
||||
|
||||
@@ -95,7 +95,7 @@ static int mvebu_hwcc_notifier(struct notifier_block *nb,
|
||||
|
||||
if (event != BUS_NOTIFY_ADD_DEVICE)
|
||||
return NOTIFY_DONE;
|
||||
set_dma_ops(dev, &arm_coherent_dma_ops);
|
||||
dev->dma_coherent = true;
|
||||
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1060,6 +1060,7 @@ int ata_scsi_dev_config(struct scsi_device *sdev, struct ata_device *dev)
|
||||
dev->flags |= ATA_DFLAG_NO_UNLOAD;
|
||||
|
||||
/* configure max sectors */
|
||||
dev->max_sectors = min(dev->max_sectors, sdev->host->max_sectors);
|
||||
blk_queue_max_hw_sectors(q, dev->max_sectors);
|
||||
|
||||
if (dev->class == ATA_DEV_ATAPI) {
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user