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Merge branch 'asoc-5.4' into asoc-next
This commit is contained in:
Mark Brown
88
Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
Normal file
88
Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
Normal file
@@ -0,0 +1,88 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/dsp/fsl,dsp.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NXP i.MX8 DSP core
|
||||
|
||||
maintainers:
|
||||
- Daniel Baluta <daniel.baluta@nxp.com>
|
||||
|
||||
description: |
|
||||
Some boards from i.MX8 family contain a DSP core used for
|
||||
advanced pre- and post- audio processing.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- fsl,imx8qxp-dsp
|
||||
|
||||
reg:
|
||||
description: Should contain register location and length
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: ipg clock
|
||||
- description: ocram clock
|
||||
- description: core clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: ipg
|
||||
- const: ocram
|
||||
- const: core
|
||||
|
||||
power-domains:
|
||||
description:
|
||||
List of phandle and PM domain specifier as documented in
|
||||
Documentation/devicetree/bindings/power/power_domain.txt
|
||||
maxItems: 4
|
||||
|
||||
mboxes:
|
||||
description:
|
||||
List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB
|
||||
(see mailbox/fsl,mu.txt)
|
||||
maxItems: 4
|
||||
|
||||
mbox-names:
|
||||
items:
|
||||
- const: txdb0
|
||||
- const: txdb1
|
||||
- const: rxdb0
|
||||
- const: rxdb1
|
||||
|
||||
memory-region:
|
||||
description:
|
||||
phandle to a node describing reserved memory (System RAM memory)
|
||||
used by DSP (see bindings/reserved-memory/reserved-memory.txt)
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- power-domains
|
||||
- mboxes
|
||||
- mbox-names
|
||||
- memory-region
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/firmware/imx/rsrc.h>
|
||||
#include <dt-bindings/clock/imx8-clock.h>
|
||||
dsp@596e8000 {
|
||||
compatible = "fsl,imx8qxp-dsp";
|
||||
reg = <0x596e8000 0x88000>;
|
||||
clocks = <&adma_lpcg IMX_ADMA_LPCG_DSP_IPG_CLK>,
|
||||
<&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>,
|
||||
<&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>;
|
||||
clock-names = "ipg", "ocram", "core";
|
||||
power-domains = <&pd IMX_SC_R_MU_13A>,
|
||||
<&pd IMX_SC_R_MU_13B>,
|
||||
<&pd IMX_SC_R_DSP>,
|
||||
<&pd IMX_SC_R_DSP_RAM>;
|
||||
mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1";
|
||||
mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;
|
||||
};
|
||||
@@ -70,7 +70,9 @@ allOf:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: allwinner,sun8i-h3-spdif
|
||||
enum:
|
||||
- allwinner,sun8i-h3-spdif
|
||||
- allwinner,sun50i-h6-spdif
|
||||
|
||||
then:
|
||||
properties:
|
||||
|
||||
@@ -0,0 +1,39 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/allwinner,sun50i-a64-codec-analog.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Allwinner A64 Analog Codec Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Chen-Yu Tsai <wens@csie.org>
|
||||
- Maxime Ripard <maxime.ripard@bootlin.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: allwinner,sun50i-a64-codec-analog
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
cpvdd-supply:
|
||||
description:
|
||||
Regulator for the headphone amplifier
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- cpvdd-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
codec_analog: codec-analog@1f015c0 {
|
||||
compatible = "allwinner,sun50i-a64-codec-analog";
|
||||
reg = <0x01f015c0 0x4>;
|
||||
cpvdd-supply = <®_eldo1>;
|
||||
};
|
||||
|
||||
...
|
||||
@@ -0,0 +1,57 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/allwinner,sun8i-a33-codec.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Allwinner A33 Codec Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Chen-Yu Tsai <wens@csie.org>
|
||||
- Maxime Ripard <maxime.ripard@bootlin.com>
|
||||
|
||||
properties:
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
compatible:
|
||||
const: allwinner,sun8i-a33-codec
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock
|
||||
- description: Module Clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: mod
|
||||
|
||||
required:
|
||||
- "#sound-dai-cells"
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
audio-codec@1c22e00 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "allwinner,sun8i-a33-codec";
|
||||
reg = <0x01c22e00 0x400>;
|
||||
interrupts = <0 29 4>;
|
||||
clocks = <&ccu 47>, <&ccu 92>;
|
||||
clock-names = "bus", "mod";
|
||||
};
|
||||
|
||||
...
|
||||
@@ -4,13 +4,18 @@ Required properties:
|
||||
- compatible: 'amlogic,axg-toddr' or
|
||||
'amlogic,axg-toddr' or
|
||||
'amlogic,g12a-frddr' or
|
||||
'amlogic,g12a-toddr'
|
||||
'amlogic,g12a-toddr' or
|
||||
'amlogic,sm1-frddr' or
|
||||
'amlogic,sm1-toddr'
|
||||
- reg: physical base address of the controller and length of memory
|
||||
mapped region.
|
||||
- interrupts: interrupt specifier for the fifo.
|
||||
- clocks: phandle to the fifo peripheral clock provided by the audio
|
||||
clock controller.
|
||||
- resets: phandle to memory ARB line provided by the arb reset controller.
|
||||
- resets: list of reset phandle, one for each entry reset-names.
|
||||
- reset-names: should contain the following:
|
||||
* "arb" : memory ARB line (required)
|
||||
* "rst" : dedicated device reset line (optional)
|
||||
- #sound-dai-cells: must be 0.
|
||||
|
||||
Example of FRDDR A on the A113 SoC:
|
||||
|
||||
@@ -2,7 +2,8 @@
|
||||
|
||||
Required properties:
|
||||
- compatible: 'amlogic,axg-pdm' or
|
||||
'amlogic,g12a-pdm'
|
||||
'amlogic,g12a-pdm' or
|
||||
'amlogic,sm1-pdm'
|
||||
- reg: physical base address of the controller and length of memory
|
||||
mapped region.
|
||||
- clocks: list of clock phandle, one for each entry clock-names.
|
||||
@@ -12,6 +13,9 @@ Required properties:
|
||||
* "sysclk" : dsp system clock
|
||||
- #sound-dai-cells: must be 0.
|
||||
|
||||
Optional property:
|
||||
- resets: phandle to the dedicated reset line of the pdm input.
|
||||
|
||||
Example of PDM on the A113 SoC:
|
||||
|
||||
pdm: audio-controller@ff632000 {
|
||||
|
||||
@@ -2,7 +2,8 @@
|
||||
|
||||
Required properties:
|
||||
- compatible: 'amlogic,axg-spdifin' or
|
||||
'amlogic,g12a-spdifin'
|
||||
'amlogic,g12a-spdifin' or
|
||||
'amlogic,sm1-spdifin'
|
||||
- interrupts: interrupt specifier for the spdif input.
|
||||
- clocks: list of clock phandle, one for each entry clock-names.
|
||||
- clock-names: should contain the following:
|
||||
@@ -10,6 +11,9 @@ Required properties:
|
||||
* "refclk" : spdif input reference clock
|
||||
- #sound-dai-cells: must be 0.
|
||||
|
||||
Optional property:
|
||||
- resets: phandle to the dedicated reset line of the spdif input.
|
||||
|
||||
Example on the A113 SoC:
|
||||
|
||||
spdifin: audio-controller@400 {
|
||||
|
||||
@@ -2,13 +2,17 @@
|
||||
|
||||
Required properties:
|
||||
- compatible: 'amlogic,axg-spdifout' or
|
||||
'amlogic,g12a-spdifout'
|
||||
'amlogic,g12a-spdifout' or
|
||||
'amlogic,sm1-spdifout'
|
||||
- clocks: list of clock phandle, one for each entry clock-names.
|
||||
- clock-names: should contain the following:
|
||||
* "pclk" : peripheral clock.
|
||||
* "mclk" : master clock
|
||||
- #sound-dai-cells: must be 0.
|
||||
|
||||
Optional property:
|
||||
- resets: phandle to the dedicated reset line of the spdif output.
|
||||
|
||||
Example on the A113 SoC:
|
||||
|
||||
spdifout: audio-controller@480 {
|
||||
|
||||
@@ -4,7 +4,9 @@ Required properties:
|
||||
- compatible: 'amlogic,axg-tdmin' or
|
||||
'amlogic,axg-tdmout' or
|
||||
'amlogic,g12a-tdmin' or
|
||||
'amlogic,g12a-tdmout'
|
||||
'amlogic,g12a-tdmout' or
|
||||
'amlogic,sm1-tdmin' or
|
||||
'amlogic,sm1-tdmout
|
||||
- reg: physical base address of the controller and length of memory
|
||||
mapped region.
|
||||
- clocks: list of clock phandle, one for each entry clock-names.
|
||||
|
||||
@@ -1,10 +1,12 @@
|
||||
* Amlogic HDMI Tx control glue
|
||||
|
||||
Required properties:
|
||||
- compatible: "amlogic,g12a-tohdmitx"
|
||||
- compatible: "amlogic,g12a-tohdmitx" or
|
||||
"amlogic,sm1-tohdmitx"
|
||||
- reg: physical base address of the controller and length of memory
|
||||
mapped region.
|
||||
- #sound-dai-cells: should be 1.
|
||||
- resets: phandle to the dedicated reset line of the hdmitx glue.
|
||||
|
||||
Example on the S905X2 SoC:
|
||||
|
||||
@@ -12,6 +14,7 @@ tohdmitx: audio-controller@744 {
|
||||
compatible = "amlogic,g12a-tohdmitx";
|
||||
reg = <0x0 0x744 0x0 0x4>;
|
||||
#sound-dai-cells = <1>;
|
||||
resets = <&clkc_audio AUD_RESET_TOHDMITX>;
|
||||
};
|
||||
|
||||
Example of an 'amlogic,axg-sound-card':
|
||||
|
||||
23
Documentation/devicetree/bindings/sound/everest,es8316.txt
Normal file
23
Documentation/devicetree/bindings/sound/everest,es8316.txt
Normal file
@@ -0,0 +1,23 @@
|
||||
Everest ES8316 audio CODEC
|
||||
|
||||
This device supports both I2C and SPI.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : should be "everest,es8316"
|
||||
- reg : the I2C address of the device for I2C
|
||||
|
||||
Optional properties:
|
||||
|
||||
- clocks : a list of phandle, should contain entries for clock-names
|
||||
- clock-names : should include as follows:
|
||||
"mclk" : master clock (MCLK) of the device
|
||||
|
||||
Example:
|
||||
|
||||
es8316: codec@11 {
|
||||
compatible = "everest,es8316";
|
||||
reg = <0x11>;
|
||||
clocks = <&clks 10>;
|
||||
clock-names = "mclk";
|
||||
};
|
||||
@@ -7,8 +7,11 @@ other DSPs. It has up to six transmitters and four receivers.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : Compatible list, must contain "fsl,imx35-esai" or
|
||||
"fsl,vf610-esai"
|
||||
- compatible : Compatible list, should contain one of the following
|
||||
compatibles:
|
||||
"fsl,imx35-esai",
|
||||
"fsl,vf610-esai",
|
||||
"fsl,imx6ull-esai",
|
||||
|
||||
- reg : Offset and length of the register set for the device.
|
||||
|
||||
|
||||
@@ -8,7 +8,9 @@ codec/DSP interfaces.
|
||||
Required properties:
|
||||
|
||||
- compatible : Compatible list, contains "fsl,vf610-sai",
|
||||
"fsl,imx6sx-sai" or "fsl,imx6ul-sai"
|
||||
"fsl,imx6sx-sai", "fsl,imx6ul-sai",
|
||||
"fsl,imx7ulp-sai", "fsl,imx8mq-sai" or
|
||||
"fsl,imx8qm-sai".
|
||||
|
||||
- reg : Offset and length of the register set for the device.
|
||||
|
||||
|
||||
@@ -1,14 +0,0 @@
|
||||
* Allwinner A64 Codec Analog Controls
|
||||
|
||||
Required properties:
|
||||
- compatible: must be one of the following compatibles:
|
||||
- "allwinner,sun50i-a64-codec-analog"
|
||||
- reg: must contain the registers location and length
|
||||
- cpvdd-supply: Regulator supply for the headphone amplifier
|
||||
|
||||
Example:
|
||||
codec_analog: codec-analog@1f015c0 {
|
||||
compatible = "allwinner,sun50i-a64-codec-analog";
|
||||
reg = <0x01f015c0 0x4>;
|
||||
cpvdd-supply = <®_eldo1>;
|
||||
};
|
||||
@@ -1,63 +0,0 @@
|
||||
Allwinner SUN8I audio codec
|
||||
------------------------------------
|
||||
|
||||
On Sun8i-A33 SoCs, the audio is separated in different parts:
|
||||
- A DAI driver. It uses the "sun4i-i2s" driver which is
|
||||
documented here:
|
||||
Documentation/devicetree/bindings/sound/sun4i-i2s.txt
|
||||
- An analog part of the codec which is handled as PRCM registers.
|
||||
See Documentation/devicetree/bindings/sound/sun8i-codec-analog.txt
|
||||
- An digital part of the codec which is documented in this current
|
||||
binding documentation.
|
||||
- And finally, an audio card which links all the above components.
|
||||
The simple-audio card will be used.
|
||||
See Documentation/devicetree/bindings/sound/simple-card.txt
|
||||
|
||||
This bindings documentation exposes Sun8i codec (digital part).
|
||||
|
||||
Required properties:
|
||||
- compatible: must be "allwinner,sun8i-a33-codec"
|
||||
- reg: must contain the registers location and length
|
||||
- interrupts: must contain the codec interrupt
|
||||
- clocks: a list of phandle + clock-specifer pairs, one for each entry
|
||||
in clock-names.
|
||||
- clock-names: should contain followings:
|
||||
- "bus": the parent APB clock for this controller
|
||||
- "mod": the parent module clock
|
||||
|
||||
Here is an example to add a sound card and the codec binding on sun8i SoCs that
|
||||
are similar to A33 using simple-card:
|
||||
|
||||
sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "sun8i-a33-audio";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,frame-master = <&link_codec>;
|
||||
simple-audio-card,bitclock-master = <&link_codec>;
|
||||
simple-audio-card,mclk-fs = <512>;
|
||||
simple-audio-card,aux-devs = <&codec_analog>;
|
||||
simple-audio-card,routing =
|
||||
"Left DAC", "Digital Left DAC",
|
||||
"Right DAC", "Digital Right DAC";
|
||||
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&dai>;
|
||||
};
|
||||
|
||||
link_codec: simple-audio-card,codec {
|
||||
sound-dai = <&codec>;
|
||||
};
|
||||
|
||||
soc@1c00000 {
|
||||
[...]
|
||||
|
||||
audio-codec@1c22e00 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "allwinner,sun8i-a33-codec";
|
||||
reg = <0x01c22e00 0x400>;
|
||||
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
|
||||
clock-names = "bus", "mod";
|
||||
};
|
||||
};
|
||||
|
||||
17
Documentation/devicetree/bindings/sound/uda1334.txt
Normal file
17
Documentation/devicetree/bindings/sound/uda1334.txt
Normal file
@@ -0,0 +1,17 @@
|
||||
UDA1334 audio CODEC
|
||||
|
||||
This device uses simple GPIO pins for controlling codec settings.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "nxp,uda1334"
|
||||
- nxp,mute-gpios: a GPIO spec for the MUTE pin.
|
||||
- nxp,deemph-gpios: a GPIO spec for the De-emphasis pin
|
||||
|
||||
Example:
|
||||
|
||||
uda1334: audio-codec {
|
||||
compatible = "nxp,uda1334";
|
||||
nxp,mute-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
|
||||
nxp,deemph-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
@@ -253,24 +253,6 @@ struct hdac_ext_bus_ops {
|
||||
int (*hdev_detach)(struct hdac_device *hdev);
|
||||
};
|
||||
|
||||
/*
|
||||
* Lowlevel I/O operators
|
||||
*/
|
||||
struct hdac_io_ops {
|
||||
/* mapped register accesses */
|
||||
void (*reg_writel)(u32 value, u32 __iomem *addr);
|
||||
u32 (*reg_readl)(u32 __iomem *addr);
|
||||
void (*reg_writew)(u16 value, u16 __iomem *addr);
|
||||
u16 (*reg_readw)(u16 __iomem *addr);
|
||||
void (*reg_writeb)(u8 value, u8 __iomem *addr);
|
||||
u8 (*reg_readb)(u8 __iomem *addr);
|
||||
/* Allocation ops */
|
||||
int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size,
|
||||
struct snd_dma_buffer *buf);
|
||||
void (*dma_free_pages)(struct hdac_bus *bus,
|
||||
struct snd_dma_buffer *buf);
|
||||
};
|
||||
|
||||
#define HDA_UNSOL_QUEUE_SIZE 64
|
||||
#define HDA_MAX_CODECS 8 /* limit by controller side */
|
||||
|
||||
@@ -304,7 +286,6 @@ struct hdac_rb {
|
||||
struct hdac_bus {
|
||||
struct device *dev;
|
||||
const struct hdac_bus_ops *ops;
|
||||
const struct hdac_io_ops *io_ops;
|
||||
const struct hdac_ext_bus_ops *ext_ops;
|
||||
|
||||
/* h/w resources */
|
||||
@@ -344,6 +325,7 @@ struct hdac_bus {
|
||||
/* CORB/RIRB and position buffers */
|
||||
struct snd_dma_buffer rb;
|
||||
struct snd_dma_buffer posbuf;
|
||||
int dma_type; /* SNDRV_DMA_TYPE_XXX for CORB/RIRB */
|
||||
|
||||
/* hdac_stream linked list */
|
||||
struct list_head stream_list;
|
||||
@@ -384,8 +366,7 @@ struct hdac_bus {
|
||||
};
|
||||
|
||||
int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
|
||||
const struct hdac_bus_ops *ops,
|
||||
const struct hdac_io_ops *io_ops);
|
||||
const struct hdac_bus_ops *ops);
|
||||
void snd_hdac_bus_exit(struct hdac_bus *bus);
|
||||
int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
|
||||
unsigned int cmd, unsigned int *res);
|
||||
@@ -429,21 +410,38 @@ int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
|
||||
int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
|
||||
void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
|
||||
|
||||
#ifdef CONFIG_SND_HDA_ALIGNED_MMIO
|
||||
unsigned int snd_hdac_aligned_read(void __iomem *addr, unsigned int mask);
|
||||
void snd_hdac_aligned_write(unsigned int val, void __iomem *addr,
|
||||
unsigned int mask);
|
||||
#define snd_hdac_reg_writeb(v, addr) snd_hdac_aligned_write(v, addr, 0xff)
|
||||
#define snd_hdac_reg_writew(v, addr) snd_hdac_aligned_write(v, addr, 0xffff)
|
||||
#define snd_hdac_reg_readb(addr) snd_hdac_aligned_read(addr, 0xff)
|
||||
#define snd_hdac_reg_readw(addr) snd_hdac_aligned_read(addr, 0xffff)
|
||||
#else /* CONFIG_SND_HDA_ALIGNED_MMIO */
|
||||
#define snd_hdac_reg_writeb(val, addr) writeb(val, addr)
|
||||
#define snd_hdac_reg_writew(val, addr) writew(val, addr)
|
||||
#define snd_hdac_reg_readb(addr) readb(addr)
|
||||
#define snd_hdac_reg_readw(addr) readw(addr)
|
||||
#endif /* CONFIG_SND_HDA_ALIGNED_MMIO */
|
||||
#define snd_hdac_reg_writel(val, addr) writel(val, addr)
|
||||
#define snd_hdac_reg_readl(addr) readl(addr)
|
||||
|
||||
/*
|
||||
* macros for easy use
|
||||
*/
|
||||
#define _snd_hdac_chip_writeb(chip, reg, value) \
|
||||
((chip)->io_ops->reg_writeb(value, (chip)->remap_addr + (reg)))
|
||||
snd_hdac_reg_writeb(value, (chip)->remap_addr + (reg))
|
||||
#define _snd_hdac_chip_readb(chip, reg) \
|
||||
((chip)->io_ops->reg_readb((chip)->remap_addr + (reg)))
|
||||
snd_hdac_reg_readb((chip)->remap_addr + (reg))
|
||||
#define _snd_hdac_chip_writew(chip, reg, value) \
|
||||
((chip)->io_ops->reg_writew(value, (chip)->remap_addr + (reg)))
|
||||
snd_hdac_reg_writew(value, (chip)->remap_addr + (reg))
|
||||
#define _snd_hdac_chip_readw(chip, reg) \
|
||||
((chip)->io_ops->reg_readw((chip)->remap_addr + (reg)))
|
||||
snd_hdac_reg_readw((chip)->remap_addr + (reg))
|
||||
#define _snd_hdac_chip_writel(chip, reg, value) \
|
||||
((chip)->io_ops->reg_writel(value, (chip)->remap_addr + (reg)))
|
||||
snd_hdac_reg_writel(value, (chip)->remap_addr + (reg))
|
||||
#define _snd_hdac_chip_readl(chip, reg) \
|
||||
((chip)->io_ops->reg_readl((chip)->remap_addr + (reg)))
|
||||
snd_hdac_reg_readl((chip)->remap_addr + (reg))
|
||||
|
||||
/* read/write a register, pass without AZX_REG_ prefix */
|
||||
#define snd_hdac_chip_writel(chip, reg, value) \
|
||||
@@ -548,24 +546,19 @@ int snd_hdac_get_stream_stripe_ctl(struct hdac_bus *bus,
|
||||
/*
|
||||
* macros for easy use
|
||||
*/
|
||||
#define _snd_hdac_stream_write(type, dev, reg, value) \
|
||||
((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg)))
|
||||
#define _snd_hdac_stream_read(type, dev, reg) \
|
||||
((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg)))
|
||||
|
||||
/* read/write a register, pass without AZX_REG_ prefix */
|
||||
#define snd_hdac_stream_writel(dev, reg, value) \
|
||||
_snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value)
|
||||
snd_hdac_reg_writel(value, (dev)->sd_addr + AZX_REG_ ## reg)
|
||||
#define snd_hdac_stream_writew(dev, reg, value) \
|
||||
_snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value)
|
||||
snd_hdac_reg_writew(value, (dev)->sd_addr + AZX_REG_ ## reg)
|
||||
#define snd_hdac_stream_writeb(dev, reg, value) \
|
||||
_snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value)
|
||||
snd_hdac_reg_writeb(value, (dev)->sd_addr + AZX_REG_ ## reg)
|
||||
#define snd_hdac_stream_readl(dev, reg) \
|
||||
_snd_hdac_stream_read(l, dev, AZX_REG_ ## reg)
|
||||
snd_hdac_reg_readl((dev)->sd_addr + AZX_REG_ ## reg)
|
||||
#define snd_hdac_stream_readw(dev, reg) \
|
||||
_snd_hdac_stream_read(w, dev, AZX_REG_ ## reg)
|
||||
snd_hdac_reg_readw((dev)->sd_addr + AZX_REG_ ## reg)
|
||||
#define snd_hdac_stream_readb(dev, reg) \
|
||||
_snd_hdac_stream_read(b, dev, AZX_REG_ ## reg)
|
||||
snd_hdac_reg_readb((dev)->sd_addr + AZX_REG_ ## reg)
|
||||
|
||||
/* update a register, pass without AZX_REG_ prefix */
|
||||
#define snd_hdac_stream_updatel(dev, reg, mask, val) \
|
||||
|
||||
@@ -6,7 +6,6 @@
|
||||
|
||||
int snd_hdac_ext_bus_init(struct hdac_bus *bus, struct device *dev,
|
||||
const struct hdac_bus_ops *ops,
|
||||
const struct hdac_io_ops *io_ops,
|
||||
const struct hdac_ext_bus_ops *ext_ops);
|
||||
|
||||
void snd_hdac_ext_bus_exit(struct hdac_bus *bus);
|
||||
|
||||
@@ -47,6 +47,9 @@ struct hdmi_codec_params {
|
||||
int channels;
|
||||
};
|
||||
|
||||
typedef void (*hdmi_codec_plugged_cb)(struct device *dev,
|
||||
bool plugged);
|
||||
|
||||
struct hdmi_codec_pdata;
|
||||
struct hdmi_codec_ops {
|
||||
/*
|
||||
@@ -88,6 +91,14 @@ struct hdmi_codec_ops {
|
||||
*/
|
||||
int (*get_dai_id)(struct snd_soc_component *comment,
|
||||
struct device_node *endpoint);
|
||||
|
||||
/*
|
||||
* Hook callback function to handle connector plug event.
|
||||
* Optional
|
||||
*/
|
||||
int (*hook_plugged_cb)(struct device *dev, void *data,
|
||||
hdmi_codec_plugged_cb fn,
|
||||
struct device *codec_dev);
|
||||
};
|
||||
|
||||
/* HDMI codec initalization data */
|
||||
@@ -99,6 +110,12 @@ struct hdmi_codec_pdata {
|
||||
void *data;
|
||||
};
|
||||
|
||||
struct snd_soc_component;
|
||||
struct snd_soc_jack;
|
||||
|
||||
int hdmi_codec_set_jack_detect(struct snd_soc_component *component,
|
||||
struct snd_soc_jack *jack);
|
||||
|
||||
#define HDMI_CODEC_DRV_NAME "hdmi-audio-codec"
|
||||
|
||||
#endif /* __HDMI_CODEC_H__ */
|
||||
|
||||
@@ -1,18 +1,17 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* skl-nhlt.h - Intel HDA Platform NHLT header
|
||||
* intel-nhlt.h - Intel HDA Platform NHLT header
|
||||
*
|
||||
* Copyright (C) 2015 Intel Corp
|
||||
* Author: Sanjiv Kumar <sanjiv.kumar@intel.com>
|
||||
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
*
|
||||
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
* Copyright (c) 2015-2019 Intel Corporation
|
||||
*/
|
||||
#ifndef __SKL_NHLT_H__
|
||||
#define __SKL_NHLT_H__
|
||||
|
||||
#ifndef __INTEL_NHLT_H__
|
||||
#define __INTEL_NHLT_H__
|
||||
|
||||
#include <linux/acpi.h>
|
||||
|
||||
#if IS_ENABLED(CONFIG_ACPI) && IS_ENABLED(CONFIG_SND_INTEL_NHLT)
|
||||
|
||||
struct wav_fmt {
|
||||
u16 fmt_tag;
|
||||
u16 channels;
|
||||
@@ -97,16 +96,22 @@ struct nhlt_resource_desc {
|
||||
#define MIC_ARRAY_2CH 2
|
||||
#define MIC_ARRAY_4CH 4
|
||||
|
||||
struct nhlt_tdm_config {
|
||||
struct nhlt_device_specific_config {
|
||||
u8 virtual_slot;
|
||||
u8 config_type;
|
||||
} __packed;
|
||||
|
||||
struct nhlt_dmic_array_config {
|
||||
struct nhlt_tdm_config tdm_config;
|
||||
struct nhlt_device_specific_config device_config;
|
||||
u8 array_type;
|
||||
} __packed;
|
||||
|
||||
struct nhlt_vendor_dmic_array_config {
|
||||
struct nhlt_dmic_array_config dmic_config;
|
||||
u8 nb_mics;
|
||||
/* TODO add vendor mic config */
|
||||
} __packed;
|
||||
|
||||
enum {
|
||||
NHLT_MIC_ARRAY_2CH_SMALL = 0xa,
|
||||
NHLT_MIC_ARRAY_2CH_BIG = 0xb,
|
||||
@@ -116,4 +121,30 @@ enum {
|
||||
NHLT_MIC_ARRAY_VENDOR_DEFINED = 0xf,
|
||||
};
|
||||
|
||||
struct nhlt_acpi_table *intel_nhlt_init(struct device *dev);
|
||||
|
||||
void intel_nhlt_free(struct nhlt_acpi_table *addr);
|
||||
|
||||
int intel_nhlt_get_dmic_geo(struct device *dev, struct nhlt_acpi_table *nhlt);
|
||||
|
||||
#else
|
||||
|
||||
struct nhlt_acpi_table;
|
||||
|
||||
static inline struct nhlt_acpi_table *intel_nhlt_init(struct device *dev)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline void intel_nhlt_free(struct nhlt_acpi_table *addr)
|
||||
{
|
||||
}
|
||||
|
||||
static inline int intel_nhlt_get_dmic_geo(struct device *dev,
|
||||
struct nhlt_acpi_table *nhlt)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user