ASoC: Updates for v6.4

The bulk of the commits here are for the conversion of drivers to use
void remove callbacks but there's a reasonable amount of other stuff
going on, the pace of development with the SOF code continues to be high
and there's a bunch of new drivers too:

 - More core cleanups from Morimto-san.
 - Update drivers to have remove() callbacks returning void, mostly
   mechanical with some substantial changes.
 - Continued feature and simplification work on SOF, including addition
   of a no-DSP mode for bringup, HDA MLink and extensions to the IPC4
   protocol.
 - Hibernation support for CS35L45.
 - More DT binding conversions.
 - Support for Cirrus Logic CS35L56, Freescale QMC, Maxim MAX98363,
   nVidia systems with MAX9809x and RT5631, Realtek RT712, Renesas R-Car
   Gen4, Rockchip RK3588 and TI TAS5733.
This commit is contained in:
Takashi Iwai
2023-04-24 15:15:31 +02:00
866 changed files with 22483 additions and 56770 deletions

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@@ -136,6 +136,9 @@ Erik Kaneda <erik.kaneda@intel.com> <erik.schmauss@intel.com>
Eugen Hristev <eugen.hristev@collabora.com> <eugen.hristev@microchip.com>
Evgeniy Polyakov <johnpol@2ka.mipt.ru>
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> <ezequiel@collabora.com>
Faith Ekstrand <faith.ekstrand@collabora.com> <jason@jlekstrand.net>
Faith Ekstrand <faith.ekstrand@collabora.com> <jason.ekstrand@intel.com>
Faith Ekstrand <faith.ekstrand@collabora.com> <jason.ekstrand@collabora.com>
Felipe W Damasio <felipewd@terra.com.br>
Felix Kuhling <fxkuehl@gmx.de>
Felix Moeller <felix@derklecks.de>
@@ -306,6 +309,8 @@ Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@osg.samsung.com>
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@redhat.com>
Mauro Carvalho Chehab <mchehab@kernel.org> <m.chehab@samsung.com>
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@s-opensource.com>
Maxim Mikityanskiy <maxtram95@gmail.com> <maximmi@mellanox.com>
Maxim Mikityanskiy <maxtram95@gmail.com> <maximmi@nvidia.com>
Maxime Ripard <mripard@kernel.org> <maxime.ripard@bootlin.com>
Maxime Ripard <mripard@kernel.org> <maxime.ripard@free-electrons.com>
Mayuresh Janorkar <mayur@ti.com>
@@ -411,7 +416,10 @@ Shuah Khan <shuah@kernel.org> <shuah.kh@samsung.com>
Simon Arlott <simon@octiron.net> <simon@fire.lp0.eu>
Simon Kelley <simon@thekelleys.org.uk>
Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
Stephen Hemminger <shemminger@osdl.org>
Stephen Hemminger <stephen@networkplumber.org> <shemminger@linux-foundation.org>
Stephen Hemminger <stephen@networkplumber.org> <shemminger@osdl.org>
Stephen Hemminger <stephen@networkplumber.org> <sthemmin@microsoft.com>
Stephen Hemminger <stephen@networkplumber.org> <sthemmin@vyatta.com>
Steve Wise <larrystevenwise@gmail.com> <swise@chelsio.com>
Steve Wise <larrystevenwise@gmail.com> <swise@opengridcomputing.com>
Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>

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@@ -705,6 +705,15 @@ Description:
zoned will report "none".
What: /sys/block/<disk>/hidden
Date: March 2023
Contact: linux-block@vger.kernel.org
Description:
[RO] the block device is hidden. it doesnt produce events, and
cant be opened from userspace or using blkdev_get*.
Used for the underlying components of multipath devices.
What: /sys/block/<disk>/stat
Date: February 2008
Contact: Jerome Marchand <jmarchan@redhat.com>

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@@ -7,8 +7,8 @@ workflows related to reporting bugs, submitting patches, and queueing
patches for stable kernels.
For general information about submitting patches, please refer to
`Documentation/process/`_. This document only describes additional specifics
related to BPF.
Documentation/process/submitting-patches.rst. This document only describes
additional specifics related to BPF.
.. contents::
:local:
@@ -461,15 +461,15 @@ needed::
$ sudo make run_tests
See the kernels selftest `Documentation/dev-tools/kselftest.rst`_
document for further documentation.
See :doc:`kernel selftest documentation </dev-tools/kselftest>`
for details.
To maximize the number of tests passing, the .config of the kernel
under test should match the config file fragment in
tools/testing/selftests/bpf as closely as possible.
Finally to ensure support for latest BPF Type Format features -
discussed in `Documentation/bpf/btf.rst`_ - pahole version 1.16
discussed in Documentation/bpf/btf.rst - pahole version 1.16
is required for kernels built with CONFIG_DEBUG_INFO_BTF=y.
pahole is delivered in the dwarves package or can be built
from source at
@@ -684,12 +684,8 @@ when:
.. Links
.. _Documentation/process/: https://www.kernel.org/doc/html/latest/process/
.. _netdev-FAQ: Documentation/process/maintainer-netdev.rst
.. _selftests:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/testing/selftests/bpf/
.. _Documentation/dev-tools/kselftest.rst:
https://www.kernel.org/doc/html/latest/dev-tools/kselftest.html
.. _Documentation/bpf/btf.rst: btf.rst
Happy BPF hacking!

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@@ -0,0 +1,162 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: PowerQUICC CPM QUICC Multichannel Controller (QMC)
maintainers:
- Herve Codina <herve.codina@bootlin.com>
description:
The QMC (QUICC Multichannel Controller) emulates up to 64 channels within one
serial controller using the same TDM physical interface routed from TSA.
properties:
compatible:
items:
- enum:
- fsl,mpc885-scc-qmc
- fsl,mpc866-scc-qmc
- const: fsl,cpm1-scc-qmc
reg:
items:
- description: SCC (Serial communication controller) register base
- description: SCC parameter ram base
- description: Dual port ram base
reg-names:
items:
- const: scc_regs
- const: scc_pram
- const: dpram
interrupts:
maxItems: 1
description: SCC interrupt line in the CPM interrupt controller
fsl,tsa-serial:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to TSA node
- enum: [1, 2, 3]
description: |
TSA serial interface (dt-bindings/soc/cpm1-fsl,tsa.h defines these
values)
- 1: SCC2
- 2: SCC3
- 3: SCC4
description:
Should be a phandle/number pair. The phandle to TSA node and the TSA
serial interface to use.
'#address-cells':
const: 1
'#size-cells':
const: 0
patternProperties:
'^channel@([0-9]|[1-5][0-9]|6[0-3])$':
description:
A channel managed by this controller
type: object
properties:
reg:
minimum: 0
maximum: 63
description:
The channel number
fsl,operational-mode:
$ref: /schemas/types.yaml#/definitions/string
enum: [transparent, hdlc]
default: transparent
description: |
The channel operational mode
- hdlc: The channel handles HDLC frames
- transparent: The channel handles raw data without any processing
fsl,reverse-data:
$ref: /schemas/types.yaml#/definitions/flag
description:
The bit order as seen on the channels is reversed,
transmitting/receiving the MSB of each octet first.
This flag is used only in 'transparent' mode.
fsl,tx-ts-mask:
$ref: /schemas/types.yaml#/definitions/uint64
description:
Channel assigned Tx time-slots within the Tx time-slots routed by the
TSA to this cell.
fsl,rx-ts-mask:
$ref: /schemas/types.yaml#/definitions/uint64
description:
Channel assigned Rx time-slots within the Rx time-slots routed by the
TSA to this cell.
required:
- reg
- fsl,tx-ts-mask
- fsl,rx-ts-mask
required:
- compatible
- reg
- reg-names
- interrupts
- fsl,tsa-serial
- '#address-cells'
- '#size-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/soc/cpm1-fsl,tsa.h>
qmc@a60 {
compatible = "fsl,mpc885-scc-qmc", "fsl,cpm1-scc-qmc";
reg = <0xa60 0x20>,
<0x3f00 0xc0>,
<0x2000 0x1000>;
reg-names = "scc_regs", "scc_pram", "dpram";
interrupts = <27>;
interrupt-parent = <&CPM_PIC>;
#address-cells = <1>;
#size-cells = <0>;
fsl,tsa-serial = <&tsa FSL_CPM_TSA_SCC4>;
channel@16 {
/* Ch16 : First 4 even TS from all routed from TSA */
reg = <16>;
fsl,mode = "transparent";
fsl,reverse-data;
fsl,tx-ts-mask = <0x00000000 0x000000aa>;
fsl,rx-ts-mask = <0x00000000 0x000000aa>;
};
channel@17 {
/* Ch17 : First 4 odd TS from all routed from TSA */
reg = <17>;
fsl,mode = "transparent";
fsl,reverse-data;
fsl,tx-ts-mask = <0x00000000 0x00000055>;
fsl,rx-ts-mask = <0x00000000 0x00000055>;
};
channel@19 {
/* Ch19 : 8 TS (TS 8..15) from all routed from TSA */
reg = <19>;
fsl,mode = "hdlc";
fsl,tx-ts-mask = <0x00000000 0x0000ff00>;
fsl,rx-ts-mask = <0x00000000 0x0000ff00>;
};
};

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@@ -0,0 +1,205 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: PowerQUICC CPM Time-slot assigner (TSA) controller
maintainers:
- Herve Codina <herve.codina@bootlin.com>
description:
The TSA is the time-slot assigner that can be found on some PowerQUICC SoC.
Its purpose is to route some TDM time-slots to other internal serial
controllers.
properties:
compatible:
items:
- enum:
- fsl,mpc885-tsa
- fsl,mpc866-tsa
- const: fsl,cpm1-tsa
reg:
items:
- description: SI (Serial Interface) register base
- description: SI RAM base
reg-names:
items:
- const: si_regs
- const: si_ram
'#address-cells':
const: 1
'#size-cells':
const: 0
patternProperties:
'^tdm@[0-1]$':
description:
The TDM managed by this controller
type: object
additionalProperties: false
properties:
reg:
minimum: 0
maximum: 1
description:
The TDM number for this TDM, 0 for TDMa and 1 for TDMb
fsl,common-rxtx-pins:
$ref: /schemas/types.yaml#/definitions/flag
description:
The hardware can use four dedicated pins for Tx clock, Tx sync, Rx
clock and Rx sync or use only two pins, Tx/Rx clock and Tx/Rx sync.
Without the 'fsl,common-rxtx-pins' property, the four pins are used.
With the 'fsl,common-rxtx-pins' property, two pins are used.
clocks:
minItems: 2
items:
- description: External clock connected to L1RSYNC pin
- description: External clock connected to L1RCLK pin
- description: External clock connected to L1TSYNC pin
- description: External clock connected to L1TCLK pin
clock-names:
minItems: 2
items:
- const: l1rsync
- const: l1rclk
- const: l1tsync
- const: l1tclk
fsl,rx-frame-sync-delay-bits:
enum: [0, 1, 2, 3]
default: 0
description: |
Receive frame sync delay in number of bits.
Indicates the delay between the Rx sync and the first bit of the Rx
frame. 0 for no bit delay. 1, 2 or 3 for 1, 2 or 3 bits delay.
fsl,tx-frame-sync-delay-bits:
enum: [0, 1, 2, 3]
default: 0
description: |
Transmit frame sync delay in number of bits.
Indicates the delay between the Tx sync and the first bit of the Tx
frame. 0 for no bit delay. 1, 2 or 3 for 1, 2 or 3 bits delay.
fsl,clock-falling-edge:
$ref: /schemas/types.yaml#/definitions/flag
description:
Data is sent on falling edge of the clock (and received on the rising
edge). If 'clock-falling-edge' is not present, data is sent on the
rising edge (and received on the falling edge).
fsl,fsync-rising-edge:
$ref: /schemas/types.yaml#/definitions/flag
description:
Frame sync pulses are sampled with the rising edge of the channel
clock. If 'fsync-rising-edge' is not present, pulses are sampled with
the falling edge.
fsl,double-speed-clock:
$ref: /schemas/types.yaml#/definitions/flag
description:
The channel clock is twice the data rate.
patternProperties:
'^fsl,[rt]x-ts-routes$':
$ref: /schemas/types.yaml#/definitions/uint32-matrix
description: |
A list of tuple that indicates the Tx or Rx time-slots routes.
items:
items:
- description:
The number of time-slots
minimum: 1
maximum: 64
- description: |
The source (Tx) or destination (Rx) serial interface
(dt-bindings/soc/cpm1-fsl,tsa.h defines these values)
- 0: No destination
- 1: SCC2
- 2: SCC3
- 3: SCC4
- 4: SMC1
- 5: SMC2
enum: [0, 1, 2, 3, 4, 5]
minItems: 1
maxItems: 64
allOf:
# If fsl,common-rxtx-pins is present, only 2 clocks are needed.
# Else, the 4 clocks must be present.
- if:
required:
- fsl,common-rxtx-pins
then:
properties:
clocks:
maxItems: 2
clock-names:
maxItems: 2
else:
properties:
clocks:
minItems: 4
clock-names:
minItems: 4
required:
- reg
- clocks
- clock-names
required:
- compatible
- reg
- reg-names
- '#address-cells'
- '#size-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/soc/cpm1-fsl,tsa.h>
tsa@ae0 {
compatible = "fsl,mpc885-tsa", "fsl,cpm1-tsa";
reg = <0xae0 0x10>,
<0xc00 0x200>;
reg-names = "si_regs", "si_ram";
#address-cells = <1>;
#size-cells = <0>;
tdm@0 {
/* TDMa */
reg = <0>;
clocks = <&clk_l1rsynca>, <&clk_l1rclka>;
clock-names = "l1rsync", "l1rclk";
fsl,common-rxtx-pins;
fsl,fsync-rising-edge;
fsl,tx-ts-routes = <2 0>, /* TS 0..1 */
<24 FSL_CPM_TSA_SCC4>, /* TS 2..25 */
<1 0>, /* TS 26 */
<5 FSL_CPM_TSA_SCC3>; /* TS 27..31 */
fsl,rx-ts-routes = <2 0>, /* TS 0..1 */
<24 FSL_CPM_TSA_SCC4>, /* 2..25 */
<1 0>, /* TS 26 */
<5 FSL_CPM_TSA_SCC3>; /* TS 27..31 */
};
};

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@@ -32,7 +32,7 @@ properties:
maxItems: 1
clock-names:
const: "mclk"
const: mclk
powerdown-gpios:
description: GPIO used for hardware power-down.

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@@ -1,32 +0,0 @@
Analog Devices ADAU1361/ADAU1461/ADAU1761/ADAU1961/ADAU1381/ADAU1781
Required properties:
- compatible: Should contain one of the following:
"adi,adau1361"
"adi,adau1461"
"adi,adau1761"
"adi,adau1961"
"adi,adau1381"
"adi,adau1781"
- reg: The i2c address. Value depends on the state of ADDR0
and ADDR1, as wired in hardware.
Optional properties:
- clock-names: If provided must be "mclk".
- clocks: phandle + clock-specifiers for the clock that provides
the audio master clock for the device.
Examples:
#include <dt-bindings/sound/adau17x1.h>
i2c_bus {
adau1361@38 {
compatible = "adi,adau1761";
reg = <0x38>;
clock-names = "mclk";
clocks = <&audio_clock>;
};
};

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@@ -0,0 +1,52 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/adi,adau17x1.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices ADAU1361/ADAU1461/ADAU1761/ADAU1961/ADAU1381/ADAU1781 Codec
maintainers:
- Lars-Peter Clausen <lars@metafoo.de>
properties:
compatible:
enum:
- adi,adau1361
- adi,adau1381
- adi,adau1461
- adi,adau1761
- adi,adau1781
- adi,adau1961
reg:
maxItems: 1
description:
The i2c address. Value depends on the state of ADDR0 and ADDR1,
as wired in hardware.
clock-names:
const: mclk
clocks:
items:
- description: provides the audio master clock for the device.
required:
- compatible
- reg
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
audio-codec@38 {
compatible = "adi,adau1761";
reg = <0x38>;
clock-names = "mclk";
clocks = <&audio_clock>;
};
};

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@@ -0,0 +1,60 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/adi,max98363.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices MAX98363 SoundWire Amplifier
maintainers:
- Ryan Lee <ryans.lee@analog.com>
description:
The MAX98363 is a SoundWire input Class D mono amplifier that
supports MIPI SoundWire v1.2-compatible digital interface for
audio and control data.
SoundWire peripheral device ID of MAX98363 is 0x3*019f836300
where * is the peripheral device unique ID decoded from pin.
It supports up to 10 peripheral devices(0x0 to 0x9).
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: sdw3019f836300
reg:
maxItems: 1
'#sound-dai-cells':
const: 0
required:
- compatible
- reg
- "#sound-dai-cells"
unevaluatedProperties: false
examples:
- |
soundwire-controller@3250000 {
#address-cells = <2>;
#size-cells = <0>;
reg = <0x3250000 0x2000>;
speaker@0,0 {
compatible = "sdw3019f836300";
reg = <0 0>;
#sound-dai-cells = <0>;
sound-name-prefix = "Speaker Left";
};
speaker@0,1 {
compatible = "sdw3019f836300";
reg = <0 1>;
#sound-dai-cells = <0>;
sound-name-prefix = "Speaker Right";
};
};

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@@ -41,21 +41,21 @@ properties:
adi,vmon-slot-no:
description: slot number of the voltage sense monitor
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 15
default: 0
adi,imon-slot-no:
description: slot number of the current sense monitor
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 15
default: 1
adi,spkfb-slot-no:
description: slot number of speaker DSP monitor
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 15
default: 2
@@ -64,7 +64,7 @@ properties:
description:
Selects the PCM data input channel that is routed to the speaker
audio processing bypass path.
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 15
default: 0

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@@ -1,28 +0,0 @@
AK4458 audio DAC
This device supports I2C mode.
Required properties:
- compatible : "asahi-kasei,ak4458" or "asahi-kasei,ak4497"
- reg : The I2C address of the device for I2C
Optional properties:
- reset-gpios: A GPIO specifier for the power down & reset pin
- mute-gpios: A GPIO specifier for the soft mute pin
- AVDD-supply: Analog power supply
- DVDD-supply: Digital power supply
- dsd-path: Select DSD input pins for ak4497
0: select #16, #17, #19 pins
1: select #3, #4, #5 pins
Example:
&i2c {
ak4458: dac@10 {
compatible = "asahi-kasei,ak4458";
reg = <0x10>;
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>
mute-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>
};
};

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@@ -1,24 +0,0 @@
AK5558 8 channel differential 32-bit delta-sigma ADC
This device supports I2C mode only.
Required properties:
- compatible : "asahi-kasei,ak5558" or "asahi-kasei,ak5552".
- reg : The I2C address of the device.
Optional properties:
- reset-gpios: A GPIO specifier for the power down & reset pin.
- AVDD-supply: Analog power supply
- DVDD-supply: Digital power supply
Example:
&i2c {
ak5558: adc@10 {
compatible = "asahi-kasei,ak5558";
reg = <0x10>;
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
};
};

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@@ -1,43 +0,0 @@
ALC5632 audio CODEC
This device supports I2C only.
Required properties:
- compatible : "realtek,alc5632"
- reg : the I2C address of the device.
- gpio-controller : Indicates this device is a GPIO controller.
- #gpio-cells : Should be two. The first cell is the pin number and the
second cell is used to specify optional parameters (currently unused).
Pins on the device (for linking into audio routes):
* SPK_OUTP
* SPK_OUTN
* HP_OUT_L
* HP_OUT_R
* AUX_OUT_P
* AUX_OUT_N
* LINE_IN_L
* LINE_IN_R
* PHONE_P
* PHONE_N
* MIC1_P
* MIC1_N
* MIC2_P
* MIC2_N
* MICBIAS1
* DMICDAT
Example:
alc5632: alc5632@1e {
compatible = "realtek,alc5632";
reg = <0x1a>;
gpio-controller;
#gpio-cells = <2>;
};

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@@ -0,0 +1,73 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/asahi-kasei,ak4458.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: AK4458 audio DAC
maintainers:
- Shengjiu Wang <shengjiu.wang@nxp.com>
properties:
compatible:
enum:
- asahi-kasei,ak4458
- asahi-kasei,ak4497
reg:
maxItems: 1
avdd-supply:
description: Analog power supply
dvdd-supply:
description: Digital power supply
reset-gpios:
maxItems: 1
mute-gpios:
maxItems: 1
description:
GPIO used to mute all the outputs
dsd-path:
description: Select DSD input pins for ak4497
$ref: /schemas/types.yaml#/definitions/uint32
oneOf:
- const: 0
description: "select #16, #17, #19 pins"
- const: 1
description: "select #3, #4, #5 pins"
required:
- compatible
- reg
allOf:
- if:
properties:
compatible:
contains:
const: asahi-kasei,ak4458
then:
properties:
dsd-path: false
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@10 {
compatible = "asahi-kasei,ak4458";
reg = <0x10>;
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
mute-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
};
};

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@@ -0,0 +1,48 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/asahi-kasei,ak5558.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: AK5558 8 channel differential 32-bit delta-sigma ADC
maintainers:
- Junichi Wakasugi <wakasugi.jb@om.asahi-kasei.co.jp>
- Mihai Serban <mihai.serban@nxp.com>
properties:
compatible:
enum:
- asahi-kasei,ak5552
- asahi-kasei,ak5558
reg:
maxItems: 1
avdd-supply:
description: A 1.8V supply that powers up the AVDD pin.
dvdd-supply:
description: A 1.2V supply that powers up the DVDD pin.
reset-gpios:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
ak5558: codec@10 {
compatible = "asahi-kasei,ak5558";
reg = <0x10>;
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
};
};

View File

@@ -16,19 +16,19 @@ definitions:
$ref: /schemas/graph.yaml#/$defs/port-base
properties:
convert-rate:
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-rate"
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-rate
convert-channels:
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-channels"
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-channels
convert-sample-format:
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-format"
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-format
mclk-fs:
$ref: "simple-card.yaml#/definitions/mclk-fs"
$ref: simple-card.yaml#/definitions/mclk-fs
endpoint-base:
$ref: /schemas/graph.yaml#/$defs/endpoint-base
properties:
mclk-fs:
$ref: "simple-card.yaml#/definitions/mclk-fs"
$ref: simple-card.yaml#/definitions/mclk-fs
frame-inversion:
description: dai-link uses frame clock inversion
$ref: /schemas/types.yaml#/definitions/flag
@@ -49,11 +49,11 @@ definitions:
description: Indicates system clock
$ref: /schemas/types.yaml#/definitions/phandle
system-clock-frequency:
$ref: "simple-card.yaml#/definitions/system-clock-frequency"
$ref: simple-card.yaml#/definitions/system-clock-frequency
system-clock-direction-out:
$ref: "simple-card.yaml#/definitions/system-clock-direction-out"
$ref: simple-card.yaml#/definitions/system-clock-direction-out
system-clock-fixed:
$ref: "simple-card.yaml#/definitions/system-clock-fixed"
$ref: simple-card.yaml#/definitions/system-clock-fixed
dai-format:
description: audio format.
@@ -69,11 +69,11 @@ definitions:
- msb
- lsb
convert-rate:
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-rate"
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-rate
convert-channels:
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-channels"
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-channels
convert-sample-format:
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-format"
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-format
dai-tdm-slot-num:
description: Number of slots in use.

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@@ -15,7 +15,7 @@ properties:
label:
maxItems: 1
prefix:
description: "device name prefix"
description: device name prefix
$ref: /schemas/types.yaml#/definitions/string
routing:
description: |
@@ -27,11 +27,11 @@ properties:
description: User specified audio sound widgets.
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
convert-rate:
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-rate"
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-rate
convert-channels:
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-channels"
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-channels
convert-sample-format:
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-format"
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-format
pa-gpios:
maxItems: 1

View File

@@ -85,11 +85,19 @@ properties:
boost-cap-microfarad.
External Boost must have GPIO1 as GPIO output. GPIO1 will be set high to
enable boost voltage.
Shared boost allows two amplifiers to share a single boost circuit by
communicating on the MDSYNC bus. The active amplifier controls the boost
circuit using combined data from both amplifiers. GPIO1 should be
configured for Sync when shared boost is used. Shared boost is not
compatible with External boost. Active amplifier requires
boost-peak-milliamp, boost-ind-nanohenry and boost-cap-microfarad.
0 = Internal Boost
1 = External Boost
2 = Shared Boost Active
3 = Shared Boost Passive
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 1
maximum: 3
cirrus,gpio1-polarity-invert:
description:

View File

@@ -45,11 +45,79 @@ properties:
Audio serial port SDOUT Hi-Z control. Sets the Hi-Z
configuration for SDOUT pin of amplifier. Logical OR of
CS35L45_ASP_TX_HIZ_xxx values.
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 3
default: 2
patternProperties:
"^cirrus,gpio-ctrl[1-3]$":
description:
GPIO pins configuration.
type: object
additionalProperties: false
properties:
gpio-dir:
description:
GPIO pin direction. Valid only when 'gpio-ctrl' is 1
0 = Output
1 = Input
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 1
default: 1
gpio-lvl:
description:
GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0
0 = Low
1 = High
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 1
default: 0
gpio-op-cfg:
description:
GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0
0 = CMOS
1 = Open Drain
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 1
default: 0
gpio-pol:
description:
GPIO output polarity select. Valid only when 'gpio-ctrl' is 1
and 'gpio-dir' is 0
0 = Non-inverted, Active High
1 = Inverted, Active Low
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 1
default: 0
gpio-ctrl:
description:
Defines the function of the GPIO pin.
GPIO1
0 = High impedance input
1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
2 = Pin acts as MDSYNC, direction controlled by MDSYNC
3-7 = Reserved
GPIO2
0 = High impedance input
1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
2 = Pin acts as open drain INT
3 = Reserved
4 = Pin acts as push-pull output INT. Active low.
5 = Pin acts as push-pull output INT. Active high.
6,7 = Reserved
GPIO3
0 = High impedance input
1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
2-7 = Reserved
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 7
default: 0
required:
- compatible
- reg
@@ -74,5 +142,15 @@ examples:
reset-gpios = <&gpio 110 0>;
cirrus,asp-sdout-hiz-ctrl = <(CS35L45_ASP_TX_HIZ_UNUSED |
CS35L45_ASP_TX_HIZ_DISABLED)>;
cirrus,gpio-ctrl1 {
gpio-ctrl = <0x2>;
};
cirrus,gpio-ctrl2 {
gpio-ctrl = <0x2>;
};
cirrus,gpio-ctrl3 {
gpio-ctrl = <0x1>;
gpio-dir = <0x1>;
};
};
};

View File

@@ -68,7 +68,7 @@ properties:
This is "normal tip sense (TS)" in the datasheet.
The CS42L42_TS_INV_* defines are available for this.
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 1
@@ -87,7 +87,7 @@ properties:
7 - 1.5s
The CS42L42_TS_DBNCE_* defines are available for this.
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 7
@@ -106,7 +106,7 @@ properties:
7 - 1.5s
The CS42L42_TS_DBNCE_* defines are available for this.
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 7
@@ -120,7 +120,7 @@ properties:
0ms - 200ms,
Default = 100ms
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 200
@@ -133,7 +133,7 @@ properties:
0ms - 20ms,
Default = 10ms
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 20
@@ -169,7 +169,7 @@ properties:
3 - Slowest
The CS42L42_HSBIAS_RAMP_* defines are available for this.
$ref: "/schemas/types.yaml#/definitions/uint32"
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 3

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