ASoC: More updates for v5.20

More updates that came in since the last pull request I sent, a series
of driver specific changes:

 - Support for AMD RPL, some Intel platforms and Mediatek MT8186.
This commit is contained in:
Takashi Iwai
2022-08-01 15:26:40 +02:00
98 changed files with 7731 additions and 843 deletions

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@@ -32,8 +32,6 @@ properties:
reset-gpios:
maxItems: 1
spi-max-frequency: true
AVDD-supply:
description: Analog power support for the device.
@@ -52,7 +50,10 @@ required:
- compatible
- AVDD-supply
additionalProperties: false
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |

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@@ -0,0 +1,100 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/atmel,sama5d2-classd.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel ClassD Amplifier
maintainers:
- Nicolas Ferre <nicolas.ferre@microchip.com>
- Alexandre Belloni <alexandre.belloni@bootlin.com>
- Claudiu Beznea <claudiu.beznea@microchip.com>
description:
The Audio Class D Amplifier (CLASSD) is a digital input, Pulse Width
Modulated (PWM) output stereo Class D amplifier.
properties:
compatible:
const: atmel,sama5d2-classd
reg:
maxItems: 1
interrupts:
maxItems: 1
dmas:
maxItems: 1
dma-names:
const: tx
clocks:
maxItems: 2
clock-names:
items:
- const: pclk
- const: gclk
atmel,model:
$ref: /schemas/types.yaml#/definitions/string
default: CLASSD
description: The user-visible name of this sound complex.
atmel,pwm-type:
$ref: /schemas/types.yaml#/definitions/string
enum:
- single
- diff
default: single
description: PWM modulation type.
atmel,non-overlap-time:
$ref: /schemas/types.yaml#/definitions/uint32
enum:
- 5
- 10
- 15
- 20
default: 10
description:
Set non-overlapping time, the unit is nanosecond(ns).
Non-overlapping will be disabled if not specified.
required:
- compatible
- reg
- interrupts
- dmas
- dma-names
- clock-names
- clocks
additionalProperties: false
examples:
- |
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
classd: sound@fc048000 {
compatible = "atmel,sama5d2-classd";
reg = <0xfc048000 0x100>;
interrupts = <59 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(47))>;
dma-names = "tx";
clocks = <&classd_clk>, <&classd_gclk>;
clock-names = "pclk", "gclk";
assigned-clocks = <&classd_gclk>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_classd_default>;
atmel,model = "classd @ SAMA5D2-Xplained";
atmel,pwm-type = "diff";
atmel,non-overlap-time = <10>;
};

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@@ -0,0 +1,85 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/atmel,sama5d2-i2s.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel I2S controller
maintainers:
- Nicolas Ferre <nicolas.ferre@microchip.com>
- Alexandre Belloni <alexandre.belloni@bootlin.com>
- Claudiu Beznea <claudiu.beznea@microchip.com>
description:
Atmel I2S (Inter-IC Sound Controller) bus is the standard
interface for connecting audio devices, such as audio codecs.
properties:
compatible:
const: atmel,sama5d2-i2s
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: Peripheral clock
- description: Generated clock (Optional)
- description: I2S mux clock (Optional). Set
with gclk when Master Mode is required.
minItems: 1
clock-names:
items:
- const: pclk
- const: gclk
- const: muxclk
minItems: 1
dmas:
items:
- description: TX DMA Channel
- description: RX DMA Channel
dma-names:
items:
- const: tx
- const: rx
required:
- compatible
- reg
- interrupts
- dmas
- dma-names
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
i2s@f8050000 {
compatible = "atmel,sama5d2-i2s";
reg = <0xf8050000 0x300>;
interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(31))>,
<&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(32))>;
dma-names = "tx", "rx";
clocks = <&i2s0_clk>, <&i2s0_gclk>, <&i2s0muxck>;
clock-names = "pclk", "gclk", "muxclk";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2s0_default>;
};

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@@ -0,0 +1,98 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/atmel,sama5d2-pdmic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel PDMIC decoder
maintainers:
- Claudiu Beznea <claudiu.beznea@microchip.com>
description:
Atmel Pulse Density Modulation Interface Controller
(PDMIC) peripheral is a mono PDM decoder module
that decodes an incoming PDM sample stream.
properties:
compatible:
const: atmel,sama5d2-pdmic
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: peripheral clock
- description: generated clock
clock-names:
items:
- const: pclk
- const: gclk
dmas:
maxItems: 1
dma-names:
const: rx
atmel,mic-min-freq:
$ref: /schemas/types.yaml#/definitions/uint32
description:
The minimal frequency that the microphone supports.
atmel,mic-max-freq:
$ref: /schemas/types.yaml#/definitions/uint32
description:
The maximal frequency that the microphone supports.
atmel,model:
$ref: /schemas/types.yaml#/definitions/string
default: PDMIC
description: The user-visible name of this sound card.
atmel,mic-offset:
$ref: /schemas/types.yaml#/definitions/int32
default: 0
description: The offset that should be added.
required:
- compatible
- reg
- interrupts
- dmas
- dma-names
- clock-names
- clocks
- atmel,mic-min-freq
- atmel,mic-max-freq
additionalProperties: false
examples:
- |
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
pdmic: sound@f8018000 {
compatible = "atmel,sama5d2-pdmic";
reg = <0xf8018000 0x124>;
interrupts = <48 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(50))>;
dma-names = "rx";
clocks = <&pdmic_clk>, <&pdmic_gclk>;
clock-names = "pclk", "gclk";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pdmic_default>;
atmel,model = "PDMIC@sama5d2_xplained";
atmel,mic-min-freq = <1000000>;
atmel,mic-max-freq = <3246000>;
atmel,mic-offset = <0x0>;
};

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@@ -1,55 +0,0 @@
* Atmel ClassD driver under ALSA SoC architecture
Required properties:
- compatible
Should be "atmel,sama5d2-classd".
- reg
Should contain ClassD registers location and length.
- interrupts
Should contain the IRQ line for the ClassD.
- dmas
One DMA specifiers as described in atmel-dma.txt and dma.txt files.
- dma-names
Must be "tx".
- clock-names
Tuple listing input clock names.
Required elements: "pclk" and "gclk".
- clocks
Please refer to clock-bindings.txt.
- assigned-clocks
Should be <&classd_gclk>.
Optional properties:
- pinctrl-names, pinctrl-0
Please refer to pinctrl-bindings.txt.
- atmel,model
The user-visible name of this sound complex.
The default value is "CLASSD".
- atmel,pwm-type
PWM modulation type, "single" or "diff".
The default value is "single".
- atmel,non-overlap-time
Set non-overlapping time, the unit is nanosecond(ns).
There are four values,
<5>, <10>, <15>, <20>, the default value is <10>.
Non-overlapping will be disabled if not specified.
Example:
classd: classd@fc048000 {
compatible = "atmel,sama5d2-classd";
reg = <0xfc048000 0x100>;
interrupts = <59 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(47))>;
dma-names = "tx";
clocks = <&classd_clk>, <&classd_gclk>;
clock-names = "pclk", "gclk";
assigned-clocks = <&classd_gclk>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_classd_default>;
atmel,model = "classd @ SAMA5D2-Xplained";
atmel,pwm-type = "diff";
atmel,non-overlap-time = <10>;
};

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@@ -1,46 +0,0 @@
* Atmel I2S controller
Required properties:
- compatible: Should be "atmel,sama5d2-i2s".
- reg: Should be the physical base address of the controller and the
length of memory mapped region.
- interrupts: Should contain the interrupt for the controller.
- dmas: Should be one per channel name listed in the dma-names property,
as described in atmel-dma.txt and dma.txt files.
- dma-names: Two dmas have to be defined, "tx" and "rx".
This IP also supports one shared channel for both rx and tx;
if this mode is used, one "rx-tx" name must be used.
- clocks: Must contain an entry for each entry in clock-names.
Please refer to clock-bindings.txt.
- clock-names: Should be one of each entry matching the clocks phandles list:
- "pclk" (peripheral clock) Required.
- "gclk" (generated clock) Optional (1).
- "muxclk" (I2S mux clock) Optional (1).
Optional properties:
- pinctrl-0: Should specify pin control groups used for this controller.
- princtrl-names: Should contain only one value - "default".
(1) : Only the peripheral clock is required. The generated clock and the I2S
mux clock are optional and should only be set together, when Master Mode
is required.
Example:
i2s@f8050000 {
compatible = "atmel,sama5d2-i2s";
reg = <0xf8050000 0x300>;
interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(31))>,
<&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(32))>;
dma-names = "tx", "rx";
clocks = <&i2s0_clk>, <&i2s0_gclk>, <&i2s0muxck>;
clock-names = "pclk", "gclk", "muxclk";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2s0_default>;
};

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@@ -1,55 +0,0 @@
* Atmel PDMIC driver under ALSA SoC architecture
Required properties:
- compatible
Should be "atmel,sama5d2-pdmic".
- reg
Should contain PDMIC registers location and length.
- interrupts
Should contain the IRQ line for the PDMIC.
- dmas
One DMA specifiers as described in atmel-dma.txt and dma.txt files.
- dma-names
Must be "rx".
- clock-names
Required elements:
- "pclk" peripheral clock
- "gclk" generated clock
- clocks
Must contain an entry for each required entry in clock-names.
Please refer to clock-bindings.txt.
- atmel,mic-min-freq
The minimal frequency that the micphone supports.
- atmel,mic-max-freq
The maximal frequency that the micphone supports.
Optional properties:
- pinctrl-names, pinctrl-0
Please refer to pinctrl-bindings.txt.
- atmel,model
The user-visible name of this sound card.
The default value is "PDMIC".
- atmel,mic-offset
The offset that should be added.
The range is from -32768 to 32767.
The default value is 0.
Example:
pdmic@f8018000 {
compatible = "atmel,sama5d2-pdmic";
reg = <0xf8018000 0x124>;
interrupts = <48 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(50))>;
dma-names = "rx";
clocks = <&pdmic_clk>, <&pdmic_gclk>;
clock-names = "pclk", "gclk";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pdmic_default>;
atmel,model = "PDMIC @ sama5d2_xplained";
atmel,mic-min-freq = <1000000>;
atmel,mic-max-freq = <3246000>;
atmel,mic-offset = <0x0>;
};

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@@ -7,7 +7,9 @@ Must be a child node of PMIC wrapper.
Required properties:
- compatible : "mediatek,mt6358-sound".
- compatible - "string" - One of:
"mediatek,mt6358-sound"
"mediatek,mt6366-sound"
- Avdd-supply : power source of AVDD
Optional properties:

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@@ -0,0 +1,175 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/mt8186-afe-pcm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek AFE PCM controller for mt8186
maintainers:
- Jiaxin Yu <jiaxin.yu@mediatek.com>
properties:
compatible:
const: mediatek,mt8186-sound
reg:
maxItems: 1
interrupts:
maxItems: 1
resets:
maxItems: 1
reset-names:
const: audiosys
mediatek,apmixedsys:
$ref: "/schemas/types.yaml#/definitions/phandle"
description: The phandle of the mediatek apmixedsys controller
mediatek,infracfg:
$ref: "/schemas/types.yaml#/definitions/phandle"
description: The phandle of the mediatek infracfg controller
mediatek,topckgen:
$ref: "/schemas/types.yaml#/definitions/phandle"
description: The phandle of the mediatek topckgen controller
clocks:
items:
- description: audio infra sys clock
- description: audio infra 26M clock
- description: audio top mux
- description: audio intbus mux
- description: mainpll 136.5M clock
- description: faud1 mux
- description: apll1 clock
- description: faud2 mux
- description: apll2 clock
- description: audio engen1 mux
- description: apll1_d8 22.5792M clock
- description: audio engen2 mux
- description: apll2_d8 24.576M clock
- description: i2s0 mclk mux
- description: i2s1 mclk mux
- description: i2s2 mclk mux
- description: i2s4 mclk mux
- description: tdm mclk mux
- description: i2s0_mck divider
- description: i2s1_mck divider
- description: i2s2_mck divider
- description: i2s4_mck divider
- description: tdm_mck divider
- description: audio hires mux
- description: 26M clock
clock-names:
items:
- const: aud_infra_clk
- const: mtkaif_26m_clk
- const: top_mux_audio
- const: top_mux_audio_int
- const: top_mainpll_d2_d4
- const: top_mux_aud_1
- const: top_apll1_ck
- const: top_mux_aud_2
- const: top_apll2_ck
- const: top_mux_aud_eng1
- const: top_apll1_d8
- const: top_mux_aud_eng2
- const: top_apll2_d8
- const: top_i2s0_m_sel
- const: top_i2s1_m_sel
- const: top_i2s2_m_sel
- const: top_i2s4_m_sel
- const: top_tdm_m_sel
- const: top_apll12_div0
- const: top_apll12_div1
- const: top_apll12_div2
- const: top_apll12_div4
- const: top_apll12_div_tdm
- const: top_mux_audio_h
- const: top_clk26m_clk
required:
- compatible
- interrupts
- resets
- reset-names
- mediatek,apmixedsys
- mediatek,infracfg
- mediatek,topckgen
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
afe: mt8186-afe-pcm@11210000 {
compatible = "mediatek,mt8186-sound";
reg = <0x11210000 0x2000>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
resets = <&watchdog 17>; //MT8186_TOPRGU_AUDIO_SW_RST
reset-names = "audiosys";
mediatek,apmixedsys = <&apmixedsys>;
mediatek,infracfg = <&infracfg>;
mediatek,topckgen = <&topckgen>;
clocks = <&infracfg_ao 44>, //CLK_INFRA_AO_AUDIO
<&infracfg_ao 54>, //CLK_INFRA_AO_AUDIO_26M_BCLK
<&topckgen 15>, //CLK_TOP_AUDIO
<&topckgen 16>, //CLK_TOP_AUD_INTBUS
<&topckgen 70>, //CLK_TOP_MAINPLL_D2_D4
<&topckgen 17>, //CLK_TOP_AUD_1
<&apmixedsys 12>, //CLK_APMIXED_APLL1
<&topckgen 18>, //CLK_TOP_AUD_2
<&apmixedsys 13>, //CLK_APMIXED_APLL2
<&topckgen 19>, //CLK_TOP_AUD_ENGEN1
<&topckgen 101>, //CLK_TOP_APLL1_D8
<&topckgen 20>, //CLK_TOP_AUD_ENGEN2
<&topckgen 104>, //CLK_TOP_APLL2_D8
<&topckgen 63>, //CLK_TOP_APLL_I2S0_MCK_SEL
<&topckgen 64>, //CLK_TOP_APLL_I2S1_MCK_SEL
<&topckgen 65>, //CLK_TOP_APLL_I2S2_MCK_SEL
<&topckgen 66>, //CLK_TOP_APLL_I2S4_MCK_SEL
<&topckgen 67>, //CLK_TOP_APLL_TDMOUT_MCK_SEL
<&topckgen 131>, //CLK_TOP_APLL12_CK_DIV0
<&topckgen 132>, //CLK_TOP_APLL12_CK_DIV1
<&topckgen 133>, //CLK_TOP_APLL12_CK_DIV2
<&topckgen 134>, //CLK_TOP_APLL12_CK_DIV4
<&topckgen 135>, //CLK_TOP_APLL12_CK_DIV_TDMOUT_M
<&topckgen 44>, //CLK_TOP_AUDIO_H
<&clk26m>;
clock-names = "aud_infra_clk",
"mtkaif_26m_clk",
"top_mux_audio",
"top_mux_audio_int",
"top_mainpll_d2_d4",
"top_mux_aud_1",
"top_apll1_ck",
"top_mux_aud_2",
"top_apll2_ck",
"top_mux_aud_eng1",
"top_apll1_d8",
"top_mux_aud_eng2",
"top_apll2_d8",
"top_i2s0_m_sel",
"top_i2s1_m_sel",
"top_i2s2_m_sel",
"top_i2s4_m_sel",
"top_tdm_m_sel",
"top_apll12_div0",
"top_apll12_div1",
"top_apll12_div2",
"top_apll12_div4",
"top_apll12_div_tdm",
"top_mux_audio_h",
"top_clk26m_clk";
};
...

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@@ -0,0 +1,75 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/mt8186-mt6366-da7219-max98357.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT8186 with MT6366, DA7219 and MAX98357 ASoC sound card driver
maintainers:
- Jiaxin Yu <jiaxin.yu@mediatek.com>
description:
This binding describes the MT8186 sound card.
properties:
compatible:
enum:
- mediatek,mt8186-mt6366-da7219-max98357-sound
mediatek,platform:
$ref: "/schemas/types.yaml#/definitions/phandle"
description: The phandle of MT8186 ASoC platform.
headset-codec:
type: object
additionalProperties: false
properties:
sound-dai:
maxItems: 1
required:
- sound-dai
playback-codecs:
type: object
additionalProperties: false
properties:
sound-dai:
items:
- description: phandle of dp codec
- description: phandle of l channel speaker codec
- description: phandle of r channel speaker codec
minItems: 2
required:
- sound-dai
additionalProperties: false
required:
- compatible
- mediatek,platform
- headset-codec
- playback-codecs
examples:
- |
sound: mt8186-sound {
compatible = "mediatek,mt8186-mt6366-da7219-max98357-sound";
mediatek,platform = <&afe>;
pinctrl-names = "aud_clk_mosi_off",
"aud_clk_mosi_on";
pinctrl-0 = <&aud_clk_mosi_off>;
pinctrl-1 = <&aud_clk_mosi_on>;
headset-codec {
sound-dai = <&da7219>;
};
playback-codecs {
sound-dai = <&anx_bridge_dp>,
<&max98357a>;
};
};
...

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@@ -0,0 +1,75 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/mt8186-mt6366-rt1019-rt5682s.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT8186 with MT6366, RT1019 and RT5682S ASoC sound card driver
maintainers:
- Jiaxin Yu <jiaxin.yu@mediatek.com>
description:
This binding describes the MT8186 sound card.
properties:
compatible:
enum:
- mediatek,mt8186-mt6366-rt1019-rt5682s-sound
mediatek,platform:
$ref: "/schemas/types.yaml#/definitions/phandle"
description: The phandle of MT8186 ASoC platform.
headset-codec:
type: object
additionalProperties: false
properties:
sound-dai:
maxItems: 1
required:
- sound-dai
playback-codecs:
type: object
additionalProperties: false
properties:
sound-dai:
items:
- description: phandle of dp codec
- description: phandle of l channel speaker codec
- description: phandle of r channel speaker codec
minItems: 2
required:
- sound-dai
additionalProperties: false
required:
- compatible
- mediatek,platform
- headset-codec
- playback-codecs
examples:
- |
sound: mt8186-sound {
compatible = "mediatek,mt8186-mt6366-rt1019-rt5682s-sound";
mediatek,platform = <&afe>;
pinctrl-names = "aud_clk_mosi_off",
"aud_clk_mosi_on";
pinctrl-0 = <&aud_clk_mosi_off>;
pinctrl-1 = <&aud_clk_mosi_on>;
headset-codec {
sound-dai = <&rt5682s>;
};
playback-codecs {
sound-dai = <&it6505dptx>,
<&rt1019p>;
};
};
...

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@@ -127,7 +127,7 @@ properties:
gpio@42:
type: object
$ref: ../gpio/qcom,wcd934x-gpio.yaml#
$ref: /schemas/gpio/qcom,wcd934x-gpio.yaml#
patternProperties:
"^.*@[0-9a-f]+$":

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@@ -47,6 +47,7 @@ properties:
description: The bias voltage to be used in mVolts. The voltage can take
values from 1.25V to 3V by 250mV steps. If this node is not mentioned
or the value is unknown, then the value is set to 1.25V.
$ref: "/schemas/types.yaml#/definitions/uint32"
enum: [ 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000 ]
lrclk-strength:

View File

@@ -1,72 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2020-2022 Texas Instruments Incorporated
%YAML 1.2
---
$id: "http://devicetree.org/schemas/sound/tas2780.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Texas Instruments TAS2780 Smart PA
maintainers:
- Raphael Xu <raphael-xu@ti.com>
description: |
The TAS2780 is a mono, digital input Class-D audio amplifier optimized for
efficiently driving high peak power into small loudspeakers.
Integrated speaker voltage and current sense provides for
real time monitoring of loudspeaker behavior.
properties:
compatible:
enum:
- ti,tas2780
reg:
maxItems: 1
description: |
I2C address of the device can be between 0x38 to 0x45.
reset-gpios:
maxItems: 1
description: GPIO used to reset the device.
interrupts:
maxItems: 1
ti,imon-slot-no:
$ref: /schemas/types.yaml#/definitions/uint32
description: TDM TX current sense time slot.
ti,vmon-slot-no:
$ref: /schemas/types.yaml#/definitions/uint32
description: TDM TX voltage sense time slot.
'#sound-dai-cells':
const: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
i2c0 {
#address-cells = <1>;
#size-cells = <0>;
codec: codec@38 {
compatible = "ti,tas2780";
reg = <0x38>;
#sound-dai-cells = <1>;
interrupt-parent = <&gpio1>;
interrupts = <14>;
reset-gpios = <&gpio1 15 0>;
shutdown-gpios = <&gpio1 15 0>;
ti,imon-slot-no = <0>;
ti,vmon-slot-no = <2>;
};
};
...

View File

@@ -52,10 +52,6 @@ properties:
DCVDD-supply:
description: Digital core supply regulator for the DCVDD pin.
spi-max-frequency: true
additionalProperties: false
required:
- reg
- compatible
@@ -64,6 +60,11 @@ required:
- DBVDD-supply
- DCVDD-supply
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
spi {

View File

@@ -291,6 +291,44 @@ int acpi_get_local_address(acpi_handle handle, u32 *addr)
}
EXPORT_SYMBOL(acpi_get_local_address);
#define ACPI_MAX_SUB_BUF_SIZE 9
const char *acpi_get_subsystem_id(acpi_handle handle)
{
struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
union acpi_object *obj;
acpi_status status;
const char *sub;
size_t len;
status = acpi_evaluate_object(handle, METHOD_NAME__SUB, NULL, &buffer);
if (ACPI_FAILURE(status)) {
acpi_handle_debug(handle, "Reading ACPI _SUB failed: %#x\n", status);
return ERR_PTR(-ENODATA);
}
obj = buffer.pointer;
if (obj->type == ACPI_TYPE_STRING) {
len = strlen(obj->string.pointer);
if (len < ACPI_MAX_SUB_BUF_SIZE && len > 0) {
sub = kstrdup(obj->string.pointer, GFP_KERNEL);
if (!sub)
sub = ERR_PTR(-ENOMEM);
} else {
acpi_handle_err(handle, "ACPI _SUB Length %zu is Invalid\n", len);
sub = ERR_PTR(-ENODATA);
}
} else {
acpi_handle_warn(handle, "Warning ACPI _SUB did not return a string\n");
sub = ERR_PTR(-ENODATA);
}
acpi_os_free(buffer.pointer);
return sub;
}
EXPORT_SYMBOL_GPL(acpi_get_subsystem_id);
acpi_status
acpi_evaluate_reference(acpi_handle handle,
acpi_string pathname,

View File

@@ -2725,6 +2725,9 @@ void cs_dsp_stop(struct cs_dsp *dsp)
mutex_lock(&dsp->pwr_lock);
if (dsp->client_ops->pre_stop)
dsp->client_ops->pre_stop(dsp);
dsp->running = false;
if (dsp->ops->stop_core)
@@ -3177,6 +3180,110 @@ static const struct cs_dsp_ops cs_dsp_halo_ops = {
.stop_core = cs_dsp_halo_stop_core,
};
/**
* cs_dsp_chunk_write() - Format data to a DSP memory chunk
* @ch: Pointer to the chunk structure
* @nbits: Number of bits to write
* @val: Value to write
*
* This function sequentially writes values into the format required for DSP
* memory, it handles both inserting of the padding bytes and converting to
* big endian. Note that data is only committed to the chunk when a whole DSP
* words worth of data is available.
*
* Return: Zero for success, a negative number on error.
*/
int cs_dsp_chunk_write(struct cs_dsp_chunk *ch, int nbits, u32 val)
{
int nwrite, i;
nwrite = min(CS_DSP_DATA_WORD_BITS - ch->cachebits, nbits);
ch->cache <<= nwrite;
ch->cache |= val >> (nbits - nwrite);
ch->cachebits += nwrite;
nbits -= nwrite;
if (ch->cachebits == CS_DSP_DATA_WORD_BITS) {
if (cs_dsp_chunk_end(ch))
return -ENOSPC;
ch->cache &= 0xFFFFFF;
for (i = 0; i < sizeof(ch->cache); i++, ch->cache <<= BITS_PER_BYTE)
*ch->data++ = (ch->cache & 0xFF000000) >> CS_DSP_DATA_WORD_BITS;
ch->bytes += sizeof(ch->cache);
ch->cachebits = 0;
}
if (nbits)
return cs_dsp_chunk_write(ch, nbits, val);
return 0;
}
EXPORT_SYMBOL_GPL(cs_dsp_chunk_write);
/**
* cs_dsp_chunk_flush() - Pad remaining data with zero and commit to chunk
* @ch: Pointer to the chunk structure
*
* As cs_dsp_chunk_write only writes data when a whole DSP word is ready to
* be written out it is possible that some data will remain in the cache, this
* function will pad that data with zeros upto a whole DSP word and write out.
*
* Return: Zero for success, a negative number on error.
*/
int cs_dsp_chunk_flush(struct cs_dsp_chunk *ch)
{
if (!ch->cachebits)
return 0;
return cs_dsp_chunk_write(ch, CS_DSP_DATA_WORD_BITS - ch->cachebits, 0);
}
EXPORT_SYMBOL_GPL(cs_dsp_chunk_flush);
/**
* cs_dsp_chunk_read() - Parse data from a DSP memory chunk
* @ch: Pointer to the chunk structure
* @nbits: Number of bits to read
*
* This function sequentially reads values from a DSP memory formatted buffer,
* it handles both removing of the padding bytes and converting from big endian.
*
* Return: A negative number is returned on error, otherwise the read value.
*/
int cs_dsp_chunk_read(struct cs_dsp_chunk *ch, int nbits)
{
int nread, i;
u32 result;
if (!ch->cachebits) {
if (cs_dsp_chunk_end(ch))
return -ENOSPC;
ch->cache = 0;
ch->cachebits = CS_DSP_DATA_WORD_BITS;
for (i = 0; i < sizeof(ch->cache); i++, ch->cache <<= BITS_PER_BYTE)
ch->cache |= *ch->data++;
ch->bytes += sizeof(ch->cache);
}
nread = min(ch->cachebits, nbits);
nbits -= nread;
result = ch->cache >> ((sizeof(ch->cache) * BITS_PER_BYTE) - nread);
ch->cache <<= nread;
ch->cachebits -= nread;
if (nbits)
result = (result << nbits) | cs_dsp_chunk_read(ch, nbits);
return result;
}
EXPORT_SYMBOL_GPL(cs_dsp_chunk_read);
MODULE_DESCRIPTION("Cirrus Logic DSP Support");
MODULE_AUTHOR("Simon Trimmer <simont@opensource.cirrus.com>");
MODULE_LICENSE("GPL v2");

View File

@@ -762,6 +762,7 @@ static inline u64 acpi_arch_get_root_pointer(void)
#endif
int acpi_get_local_address(acpi_handle handle, u32 *addr);
const char *acpi_get_subsystem_id(acpi_handle handle);
#else /* !CONFIG_ACPI */
@@ -1023,6 +1024,11 @@ static inline int acpi_get_local_address(acpi_handle handle, u32 *addr)
return -ENODEV;
}
static inline const char *acpi_get_subsystem_id(acpi_handle handle)
{
return ERR_PTR(-ENODEV);
}
static inline int acpi_register_wakeup_handler(int wake_irq,
bool (*wakeup)(void *context), void *context)
{

View File

@@ -11,6 +11,7 @@
#ifndef __CS_DSP_H
#define __CS_DSP_H
#include <linux/bits.h>
#include <linux/device.h>
#include <linux/firmware.h>
#include <linux/list.h>
@@ -34,6 +35,7 @@
#define CS_ADSP2_REGION_ALL (CS_ADSP2_REGION_0 | CS_ADSP2_REGION_1_9)
#define CS_DSP_DATA_WORD_SIZE 3
#define CS_DSP_DATA_WORD_BITS (3 * BITS_PER_BYTE)
#define CS_DSP_ACKED_CTL_TIMEOUT_MS 100
#define CS_DSP_ACKED_CTL_N_QUICKPOLLS 10
@@ -189,7 +191,8 @@ struct cs_dsp {
* @control_remove: Called under the pwr_lock when a control is destroyed
* @pre_run: Called under the pwr_lock by cs_dsp_run() before the core is started
* @post_run: Called under the pwr_lock by cs_dsp_run() after the core is started
* @post_stop: Called under the pwr_lock by cs_dsp_stop()
* @pre_stop: Called under the pwr_lock by cs_dsp_stop() before the core is stopped
* @post_stop: Called under the pwr_lock by cs_dsp_stop() after the core is stopped
* @watchdog_expired: Called when a watchdog expiry is detected
*
* These callbacks give the cs_dsp client an opportunity to respond to events
@@ -200,6 +203,7 @@ struct cs_dsp_client_ops {
void (*control_remove)(struct cs_dsp_coeff_ctl *ctl);
int (*pre_run)(struct cs_dsp *dsp);
int (*post_run)(struct cs_dsp *dsp);
void (*pre_stop)(struct cs_dsp *dsp);
void (*post_stop)(struct cs_dsp *dsp);
void (*watchdog_expired)(struct cs_dsp *dsp);
};
@@ -250,4 +254,75 @@ struct cs_dsp_alg_region *cs_dsp_find_alg_region(struct cs_dsp *dsp,
const char *cs_dsp_mem_region_name(unsigned int type);
/**
* struct cs_dsp_chunk - Describes a buffer holding data formatted for the DSP
* @data: Pointer to underlying buffer memory
* @max: Pointer to end of the buffer memory
* @bytes: Number of bytes read/written into the memory chunk
* @cache: Temporary holding data as it is formatted
* @cachebits: Number of bits of data currently in cache
*/
struct cs_dsp_chunk {
u8 *data;
u8 *max;
int bytes;
u32 cache;
int cachebits;
};
/**
* cs_dsp_chunk() - Create a DSP memory chunk
* @data: Pointer to the buffer that will be used to store data
* @size: Size of the buffer in bytes
*
* Return: A cs_dsp_chunk structure
*/
static inline struct cs_dsp_chunk cs_dsp_chunk(void *data, int size)
{
struct cs_dsp_chunk ch = {
.data = data,
.max = data + size,
};
return ch;
}
/**
* cs_dsp_chunk_end() - Check if a DSP memory chunk is full
* @ch: Pointer to the chunk structure
*
* Return: True if the whole buffer has been read/written
*/
static inline bool cs_dsp_chunk_end(struct cs_dsp_chunk *ch)
{
return ch->data == ch->max;
}
/**
* cs_dsp_chunk_bytes() - Number of bytes written/read from a DSP memory chunk
* @ch: Pointer to the chunk structure
*
* Return: Number of bytes read/written to the buffer
*/
static inline int cs_dsp_chunk_bytes(struct cs_dsp_chunk *ch)
{
return ch->bytes;
}
/**
* cs_dsp_chunk_valid_addr() - Check if an address is in a DSP memory chunk
* @ch: Pointer to the chunk structure
*
* Return: True if the given address is within the buffer
*/
static inline bool cs_dsp_chunk_valid_addr(struct cs_dsp_chunk *ch, void *addr)
{
return (u8 *)addr >= ch->data && (u8 *)addr < ch->max;
}
int cs_dsp_chunk_write(struct cs_dsp_chunk *ch, int nbits, u32 val);
int cs_dsp_chunk_flush(struct cs_dsp_chunk *ch);
int cs_dsp_chunk_read(struct cs_dsp_chunk *ch, int nbits);
#endif

View File

@@ -52,6 +52,8 @@
#define SOF_DAI_INTEL_SSP_CLKCTRL_MCLK_ES BIT(6)
/* bclk early start */
#define SOF_DAI_INTEL_SSP_CLKCTRL_BCLK_ES BIT(7)
/* mclk always on */
#define SOF_DAI_INTEL_SSP_CLKCTRL_MCLK_AON BIT(8)
/* DMIC max. four controllers for eight microphone channels */
#define SOF_DAI_INTEL_DMIC_NUM_CTRL 4

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