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Merge tag 'net-next-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next

Browse Source 
Pull networking updates from Jakub Kicinski:
 "Core:

   - Enable memcg accounting for various networking objects.

  BPF:

   - Introduce bpf timers.

   - Add perf link and opaque bpf_cookie which the program can read out
     again, to be used in libbpf-based USDT library.

   - Add bpf_task_pt_regs() helper to access user space pt_regs in
     kprobes, to help user space stack unwinding.

   - Add support for UNIX sockets for BPF sockmap.

   - Extend BPF iterator support for UNIX domain sockets.

   - Allow BPF TCP congestion control progs and bpf iterators to call
     bpf_setsockopt(), e.g. to switch to another congestion control
     algorithm.

  Protocols:

   - Support IOAM Pre-allocated Trace with IPv6.

   - Support Management Component Transport Protocol.

   - bridge: multicast: add vlan support.

   - netfilter: add hooks for the SRv6 lightweight tunnel driver.

   - tcp:
       - enable mid-stream window clamping (by user space or BPF)
       - allow data-less, empty-cookie SYN with TFO_SERVER_COOKIE_NOT_REQD
       - more accurate DSACK processing for RACK-TLP

   - mptcp:
       - add full mesh path manager option
       - add partial support for MP_FAIL
       - improve use of backup subflows
       - optimize option processing

   - af_unix: add OOB notification support.

   - ipv6: add IFLA_INET6_RA_MTU to expose MTU value advertised by the
     router.

   - mac80211: Target Wake Time support in AP mode.

   - can: j1939: extend UAPI to notify about RX status.

  Driver APIs:

   - Add page frag support in page pool API.

   - Many improvements to the DSA (distributed switch) APIs.

   - ethtool: extend IRQ coalesce uAPI with timer reset modes.

   - devlink: control which auxiliary devices are created.

   - Support CAN PHYs via the generic PHY subsystem.

   - Proper cross-chip support for tag_8021q.

   - Allow TX forwarding for the software bridge data path to be
     offloaded to capable devices.

  Drivers:

   - veth: more flexible channels number configuration.

   - openvswitch: introduce per-cpu upcall dispatch.

   - Add internet mix (IMIX) mode to pktgen.

   - Transparently handle XDP operations in the bonding driver.

   - Add LiteETH network driver.

   - Renesas (ravb):
       - support Gigabit Ethernet IP

   - NXP Ethernet switch (sja1105):
       - fast aging support
       - support for "H" switch topologies
       - traffic termination for ports under VLAN-aware bridge

   - Intel 1G Ethernet
       - support getcrosststamp() with PCIe PTM (Precision Time
         Measurement) for better time sync
       - support Credit-Based Shaper (CBS) offload, enabling HW traffic
         prioritization and bandwidth reservation

   - Broadcom Ethernet (bnxt)
       - support pulse-per-second output
       - support larger Rx rings

   - Mellanox Ethernet (mlx5)
       - support ethtool RSS contexts and MQPRIO channel mode
       - support LAG offload with bridging
       - support devlink rate limit API
       - support packet sampling on tunnels

   - Huawei Ethernet (hns3):
       - basic devlink support
       - add extended IRQ coalescing support
       - report extended link state

   - Netronome Ethernet (nfp):
       - add conntrack offload support

   - Broadcom WiFi (brcmfmac):
       - add WPA3 Personal with FT to supported cipher suites
       - support 43752 SDIO device

   - Intel WiFi (iwlwifi):
       - support scanning hidden 6GHz networks
       - support for a new hardware family (Bz)

   - Xen pv driver:
       - harden netfront against malicious backends

   - Qualcomm mobile
       - ipa: refactor power management and enable automatic suspend
       - mhi: move MBIM to WWAN subsystem interfaces

  Refactor:

   - Ambient BPF run context and cgroup storage cleanup.

   - Compat rework for ndo_ioctl.

  Old code removal:

   - prism54 remove the obsoleted driver, deprecated by the p54 driver.

   - wan: remove sbni/granch driver"

* tag 'net-next-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1715 commits)
  net: Add depends on OF_NET for LiteX's LiteETH
  ipv6: seg6: remove duplicated include
  net: hns3: remove unnecessary spaces
  net: hns3: add some required spaces
  net: hns3: clean up a type mismatch warning
  net: hns3: refine function hns3_set_default_feature()
  ipv6: remove duplicated 'net/lwtunnel.h' include
  net: w5100: check return value after calling platform_get_resource()
  net/mlxbf_gige: Make use of devm_platform_ioremap_resourcexxx()
  net: mdio: mscc-miim: Make use of the helper function devm_platform_ioremap_resource()
  net: mdio-ipq4019: Make use of devm_platform_ioremap_resource()
  fou: remove sparse errors
  ipv4: fix endianness issue in inet_rtm_getroute_build_skb()
  octeontx2-af: Set proper errorcode for IPv4 checksum errors
  octeontx2-af: Fix static code analyzer reported issues
  octeontx2-af: Fix mailbox errors in nix_rss_flowkey_cfg
  octeontx2-af: Fix loop in free and unmap counter
  af_unix: fix potential NULL deref in unix_dgram_connect()
  dpaa2-eth: Replace strlcpy with strscpy
  octeontx2-af: Use NDC TX for transmit packet data
  ...
This commit is contained in:
Linus Torvalds
2021-08-31 16:43:06 -07:00
parent 86ac54e79f 29ce8f9701
commit 9e9fb7655e
1812 changed files with 80398 additions and 41170 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
.mailmap
View File

@@ -229,6 +229,7 @@ Matthew Wilcox <willy@infradead.org> <mawilcox@microsoft.com>
Matthew Wilcox <willy@infradead.org> <willy@debian.org>
Matthew Wilcox <willy@infradead.org> <willy@linux.intel.com>
Matthew Wilcox <willy@infradead.org> <willy@parisc-linux.org>
Matthias Fuchs <socketcan@esd.eu> <matthias.fuchs@esd.eu>
Matthieu CASTET <castet.matthieu@free.fr>
Matt Ranostay <matt.ranostay@konsulko.com> <matt@ranostay.consulting>
Matt Ranostay <mranostay@gmail.com> Matthew Ranostay <mranostay@embeddedalley.com>
@@ -341,6 +342,7 @@ Sumit Semwal <sumit.semwal@ti.com>
Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Tejun Heo <htejun@gmail.com>
Thomas Graf <tgraf@suug.ch>
Thomas Körper <socketcan@esd.eu> <thomas.koerper@esd.eu>
Thomas Pedersen <twp@codeaurora.org>
Tiezhu Yang <yangtiezhu@loongson.cn> <kernelpatch@126.com>
Todor Tomov <todor.too@gmail.com> <todor.tomov@linaro.org>

2
Documentation/admin-guide/kernel-parameters.txt
View File

@@ -4962,8 +4962,6 @@
sa1100ir [NET]
See drivers/net/irda/sa1100_ir.c.
sbni= [NET] Granch SBNI12 leased line adapter
sched_verbose [KNL] Enables verbose scheduler debug messages.
schedstats= [KNL,X86] Enable or disable scheduled statistics.

10
Documentation/bpf/index.rst
View File

@@ -15,15 +15,7 @@ that goes into great technical depth about the BPF Architecture.
libbpf
======
Libbpf is a userspace library for loading and interacting with bpf programs.
.. toctree::
:maxdepth: 1
libbpf/libbpf
libbpf/libbpf_api
libbpf/libbpf_build
libbpf/libbpf_naming_convention
Documentation/bpf/libbpf/libbpf.rst is a userspace library for loading and interacting with bpf programs.
BPF Type Format (BTF)
=====================

8
Documentation/bpf/libbpf/libbpf.rst → Documentation/bpf/libbpf/index.rst
View File

@@ -3,6 +3,14 @@
libbpf
======
For API documentation see the `versioned API documentation site <https://libbpf.readthedocs.io/en/latest/api.html>`_.
.. toctree::
:maxdepth: 1
libbpf_naming_convention
libbpf_build
This is documentation for libbpf, a userspace library for loading and
interacting with bpf programs.

27
Documentation/bpf/libbpf/libbpf_api.rst
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@@ -1,27 +0,0 @@
.. SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)
API
===
This documentation is autogenerated from header files in libbpf, tools/lib/bpf
.. kernel-doc:: tools/lib/bpf/libbpf.h
:internal:
.. kernel-doc:: tools/lib/bpf/bpf.h
:internal:
.. kernel-doc:: tools/lib/bpf/btf.h
:internal:
.. kernel-doc:: tools/lib/bpf/xsk.h
:internal:
.. kernel-doc:: tools/lib/bpf/bpf_tracing.h
:internal:
.. kernel-doc:: tools/lib/bpf/bpf_core_read.h
:internal:
.. kernel-doc:: tools/lib/bpf/bpf_endian.h
:internal:

2
Documentation/bpf/libbpf/libbpf_naming_convention.rst
View File

@@ -69,7 +69,7 @@ functions. These can be mixed and matched. Note that these functions
are not reentrant for performance reasons.
ABI
==========
---
libbpf can be both linked statically or used as DSO. To avoid possible
conflicts with other libraries an application is linked with, all

43
Documentation/devicetree/bindings/net/brcm,unimac-mdio.txt
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@@ -1,43 +0,0 @@
* Broadcom UniMAC MDIO bus controller
Required properties:
- compatible: should one from "brcm,genet-mdio-v1", "brcm,genet-mdio-v2",
"brcm,genet-mdio-v3", "brcm,genet-mdio-v4", "brcm,genet-mdio-v5" or
"brcm,unimac-mdio"
- reg: address and length of the register set for the device, first one is the
base register, and the second one is optional and for indirect accesses to
larger than 16-bits MDIO transactions
- reg-names: name(s) of the register must be "mdio" and optional "mdio_indir_rw"
- #size-cells: must be 1
- #address-cells: must be 0
Optional properties:
- interrupts: must be one if the interrupt is shared with the Ethernet MAC or
Ethernet switch this MDIO block is integrated from, or must be two, if there
are two separate interrupts, first one must be "mdio done" and second must be
for "mdio error"
- interrupt-names: must be "mdio_done_error" when there is a share interrupt fed
to this hardware block, or must be "mdio_done" for the first interrupt and
"mdio_error" for the second when there are separate interrupts
- clocks: A reference to the clock supplying the MDIO bus controller
- clock-frequency: the MDIO bus clock that must be output by the MDIO bus
hardware, if absent, the default hardware values are used
Child nodes of this MDIO bus controller node are standard Ethernet PHY device
nodes as described in Documentation/devicetree/bindings/net/phy.txt
Example:
mdio@403c0 {
compatible = "brcm,unimac-mdio";
reg = <0x403c0 0x8 0x40300 0x18>;
reg-names = "mdio", "mdio_indir_rw";
#size-cells = <1>;
#address-cells = <0>;
...
phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};

84
Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml Normal file
View File

@@ -0,0 +1,84 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/brcm,unimac-mdio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom UniMAC MDIO bus controller
maintainers:
- Rafał Miłecki <rafal@milecki.pl>
allOf:
- $ref: mdio.yaml#
properties:
compatible:
enum:
- brcm,genet-mdio-v1
- brcm,genet-mdio-v2
- brcm,genet-mdio-v3
- brcm,genet-mdio-v4
- brcm,genet-mdio-v5
- brcm,unimac-mdio
reg:
minItems: 1
items:
- description: base register
- description: indirect accesses to larger than 16-bits MDIO transactions
reg-names:
minItems: 1
items:
- const: mdio
- const: mdio_indir_rw
interrupts:
oneOf:
- description: >
Interrupt shared with the Ethernet MAC or Ethernet switch this MDIO
block is integrated from
- items:
- description: |
"mdio done" interrupt
- description: |
"mdio error" interrupt
interrupt-names:
oneOf:
- const: mdio_done_error
- items:
- const: mdio_done
- const: mdio_error
clocks:
description: A reference to the clock supplying the MDIO bus controller
clock-frequency:
description: >
The MDIO bus clock that must be output by the MDIO bus hardware, if
absent, the default hardware values are used
unevaluatedProperties: false
required:
- reg
- reg-names
- '#address-cells'
- '#size-cells'
examples:
- |
mdio@403c0 {
compatible = "brcm,unimac-mdio";
reg = <0x403c0 0x8>, <0x40300 0x18>;
reg-names = "mdio", "mdio_indir_rw";
#address-cells = <1>;
#size-cells = <0>;
ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};

119
Documentation/devicetree/bindings/net/can/bosch,c_can.yaml Normal file
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@@ -0,0 +1,119 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/bosch,c_can.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Bosch C_CAN/D_CAN controller Device Tree Bindings
description: Bosch C_CAN/D_CAN controller for CAN bus
maintainers:
- Dario Binacchi <dariobin@libero.it>
allOf:
- $ref: can-controller.yaml#
properties:
compatible:
oneOf:
- enum:
- bosch,c_can
- bosch,d_can
- ti,dra7-d_can
- ti,am3352-d_can
- items:
- enum:
- ti,am4372-d_can
- const: ti,am3352-d_can
reg:
maxItems: 1
interrupts:
minItems: 1
maxItems: 4
power-domains:
description: |
Should contain a phandle to a PM domain provider node and an args
specifier containing the DCAN device id value. It's mandatory for
Keystone 2 66AK2G SoCs only.
maxItems: 1
clocks:
description: |
CAN functional clock phandle.
maxItems: 1
clock-names:
maxItems: 1
syscon-raminit:
description: |
Handle to system control region that contains the RAMINIT register,
register offset to the RAMINIT register and the CAN instance number (0
offset).
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
items:
- description: The phandle to the system control region.
- description: The register offset.
- description: The CAN instance number.
resets:
maxItems: 1
required:
- compatible
- reg
- interrupts
- clocks
if:
properties:
compatible:
contains:
enum:
- bosch,d_can
then:
properties:
interrupts:
minItems: 4
maxItems: 4
items:
- description: Error and status IRQ
- description: Message object IRQ
- description: RAM ECC correctable error IRQ
- description: RAM ECC non-correctable error IRQ
else:
properties:
interrupts:
maxItems: 1
items:
- description: Error and status IRQ
additionalProperties: false
examples:
- |
#include <dt-bindings/reset/altr,rst-mgr.h>
can@ffc00000 {
compatible = "bosch,d_can";
reg = <0xffc00000 0x1000>;
interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>;
clocks = <&can0_clk>;
resets = <&rst CAN0_RESET>;
};
- |
can@0 {
compatible = "ti,am3352-d_can";
reg = <0x0 0x2000>;
clocks = <&dcan1_fck>;
clock-names = "fck";
syscon-raminit = <&scm_conf 0x644 1>;
interrupts = <55>;
};

9
Documentation/devicetree/bindings/net/can/bosch,m_can.yaml
View File

@@ -104,9 +104,18 @@ properties:
maximum: 32
maxItems: 1
power-domains:
description:
Power domain provider node and an args specifier containing
the can device id value.
maxItems: 1
can-transceiver:
$ref: can-transceiver.yaml#
phys:
maxItems: 1
required:
- compatible
- reg

65
Documentation/devicetree/bindings/net/can/c_can.txt
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@@ -1,65 +0,0 @@
Bosch C_CAN/D_CAN controller Device Tree Bindings
-------------------------------------------------
Required properties:
- compatible : Should be "bosch,c_can" for C_CAN controllers and
"bosch,d_can" for D_CAN controllers.
Can be "ti,dra7-d_can", "ti,am3352-d_can" or
"ti,am4372-d_can".
- reg : physical base address and size of the C_CAN/D_CAN
registers map
- interrupts : property with a value describing the interrupt
number
The following are mandatory properties for DRA7x, AM33xx and AM43xx SoCs only:
- ti,hwmods : Must be "d_can<n>" or "c_can<n>", n being the
instance number
The following are mandatory properties for Keystone 2 66AK2G SoCs only:
- power-domains : Should contain a phandle to a PM domain provider node
and an args specifier containing the DCAN device id
value. This property is as per the binding,
Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
- clocks : CAN functional clock phandle. This property is as per the
binding,
Documentation/devicetree/bindings/clock/ti,sci-clk.yaml
Optional properties:
- syscon-raminit : Handle to system control region that contains the
RAMINIT register, register offset to the RAMINIT
register and the CAN instance number (0 offset).
Note: "ti,hwmods" field is used to fetch the base address and irq
resources from TI, omap hwmod data base during device registration.
Future plan is to migrate hwmod data base contents into device tree
blob so that, all the required data will be used from device tree dts
file.
Example:
Step1: SoC common .dtsi file
dcan1: d_can@481d0000 {
compatible = "bosch,d_can";
reg = <0x481d0000 0x2000>;
interrupts = <55>;
interrupt-parent = <&intc>;
status = "disabled";
};
(or)
dcan1: d_can@481d0000 {
compatible = "bosch,d_can";
ti,hwmods = "d_can1";
reg = <0x481d0000 0x2000>;
interrupts = <55>;
interrupt-parent = <&intc>;
status = "disabled";
};
Step 2: board specific .dts file
&dcan1 {
status = "okay";
};

9
Documentation/devicetree/bindings/net/can/can-controller.yaml
View File

@@ -13,6 +13,15 @@ properties:
$nodename:
pattern: "^can(@.*)?$"
termination-gpios:
description: GPIO pin to enable CAN bus termination.
maxItems: 1
termination-ohms:
description: The resistance value of the CAN bus termination resistor.
minimum: 1
maximum: 65535
additionalProperties: true
...

17
Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
View File

@@ -119,6 +119,9 @@ properties:
minimum: 0
maximum: 2
termination-gpios: true
termination-ohms: true
required:
- compatible
- reg
@@ -148,3 +151,17 @@ examples:
fsl,stop-mode = <&gpr 0x34 28>;
fsl,scu-index = /bits/ 8 <1>;
};
- |
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
can@2090000 {
compatible = "fsl,imx6q-flexcan";
reg = <0x02090000 0x4000>;
interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 1>, <&clks 2>;
clock-names = "ipg", "per";
fsl,stop-mode = <&gpr 0x34 28>;
termination-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
termination-ohms = <120>;
};

69
Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
View File

@@ -30,13 +30,15 @@ properties:
- renesas,r8a77995-canfd # R-Car D3
- const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2
- items:
- enum:
- renesas,r9a07g044-canfd # RZ/G2{L,LC}
- const: renesas,rzg2l-canfd # RZ/G2L family
reg:
maxItems: 1
interrupts:
items:
- description: Channel interrupt
- description: Global interrupt
interrupts: true
clocks:
maxItems: 3
@@ -50,8 +52,7 @@ properties:
power-domains:
maxItems: 1
resets:
maxItems: 1
resets: true
renesas,no-can-fd:
$ref: /schemas/types.yaml#/definitions/flag
@@ -91,6 +92,62 @@ required:
- channel0
- channel1
if:
properties:
compatible:
contains:
enum:
- renesas,rzg2l-canfd
then:
properties:
interrupts:
items:
- description: CAN global error interrupt
- description: CAN receive FIFO interrupt
- description: CAN0 error interrupt
- description: CAN0 transmit interrupt
- description: CAN0 transmit/receive FIFO receive completion interrupt
- description: CAN1 error interrupt
- description: CAN1 transmit interrupt
- description: CAN1 transmit/receive FIFO receive completion interrupt
interrupt-names:
items:
- const: g_err
- const: g_recc
- const: ch0_err
- const: ch0_rec
- const: ch0_trx
- const: ch1_err
- const: ch1_rec
- const: ch1_trx
resets:
maxItems: 2
reset-names:
items:
- const: rstp_n
- const: rstc_n
required:
- interrupt-names
- reset-names
else:
properties:
interrupts:
items:
- description: Channel interrupt
- description: Global interrupt
interrupt-names:
items:
- const: ch_int
- const: g_int
resets:
maxItems: 1
unevaluatedProperties: false
examples:

244
Documentation/devicetree/bindings/net/fsl,fec.yaml Normal file
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@@ -0,0 +1,244 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/fsl,fec.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale Fast Ethernet Controller (FEC)
maintainers:
- Joakim Zhang <qiangqing.zhang@nxp.com>
allOf:
- $ref: ethernet-controller.yaml#
properties:
compatible:
oneOf:
- enum:
- fsl,imx25-fec
- fsl,imx27-fec
- fsl,imx28-fec
- fsl,imx6q-fec
- fsl,mvf600-fec
- items:
- enum:
- fsl,imx53-fec
- fsl,imx6sl-fec
- const: fsl,imx25-fec
- items:
- enum:
- fsl,imx35-fec
- fsl,imx51-fec
- const: fsl,imx27-fec
- items:
- enum:
- fsl,imx6ul-fec
- fsl,imx6sx-fec
- const: fsl,imx6q-fec
- items:
- enum:
- fsl,imx7d-fec
- const: fsl,imx6sx-fec
- items:
- const: fsl,imx8mq-fec
- const: fsl,imx6sx-fec
- items:
- enum:
- fsl,imx8mm-fec
- fsl,imx8mn-fec
- fsl,imx8mp-fec
- const: fsl,imx8mq-fec
- const: fsl,imx6sx-fec
- items:
- const: fsl,imx8qm-fec
- const: fsl,imx6sx-fec
- items:
- enum:
- fsl,imx8qxp-fec
- const: fsl,imx8qm-fec
- const: fsl,imx6sx-fec
reg:
maxItems: 1
interrupts:
minItems: 1
maxItems: 4
interrupt-names:
oneOf:
- items:
- const: int0
- items:
- const: int0
- const: pps
- items:
- const: int0
- const: int1
- const: int2
- items:
- const: int0
- const: int1
- const: int2
- const: pps
clocks:
minItems: 2
maxItems: 5
description:
The "ipg", for MAC ipg_clk_s, ipg_clk_mac_s that are for register accessing.
The "ahb", for MAC ipg_clk, ipg_clk_mac that are bus clock.
The "ptp"(option), for IEEE1588 timer clock that requires the clock.
The "enet_clk_ref"(option), for MAC transmit/receiver reference clock like
RGMII TXC clock or RMII reference clock. It depends on board design,
the clock is required if RGMII TXC and RMII reference clock source from
SOC internal PLL.
The "enet_out"(option), output clock for external device, like supply clock
for PHY. The clock is required if PHY clock source from SOC.
The "enet_2x_txclk"(option), for RGMII sampling clock which fixed at 250Mhz.
The clock is required if SoC RGMII enable clock delay.
clock-names:
minItems: 2
maxItems: 5
items:
enum:
- ipg
- ahb
- ptp
- enet_clk_ref
- enet_out
- enet_2x_txclk
phy-mode: true
phy-handle: true
fixed-link: true
local-mac-address: true
mac-address: true
tx-internal-delay-ps:
enum: [0, 2000]
rx-internal-delay-ps:
enum: [0, 2000]
phy-supply:
description:
Regulator that powers the Ethernet PHY.
fsl,num-tx-queues:
$ref: /schemas/types.yaml#/definitions/uint32
description:
The property is valid for enet-avb IP, which supports hw multi queues.
Should specify the tx queue number, otherwise set tx queue number to 1.
enum: [1, 2, 3]
fsl,num-rx-queues:
$ref: /schemas/types.yaml#/definitions/uint32
description:
The property is valid for enet-avb IP, which supports hw multi queues.
Should specify the rx queue number, otherwise set rx queue number to 1.
enum: [1, 2, 3]
fsl,magic-packet:
$ref: /schemas/types.yaml#/definitions/flag
description:
If present, indicates that the hardware supports waking up via magic packet.
fsl,err006687-workaround-present:
$ref: /schemas/types.yaml#/definitions/flag
description:
If present indicates that the system has the hardware workaround for
ERR006687 applied and does not need a software workaround.
fsl,stop-mode:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
Register bits of stop mode control, the format is <&gpr req_gpr req_bit>.
gpr is the phandle to general purpose register node.
req_gpr is the gpr register offset for ENET stop request.
req_bit is the gpr bit offset for ENET stop request.
mdio:
type: object
description:
Specifies the mdio bus in the FEC, used as a container for phy nodes.
# Deprecated optional properties:
# To avoid these, create a phy node according to ethernet-phy.yaml in the same
# directory, and point the FEC's "phy-handle" property to it. Then use
# the phy's reset binding, again described by ethernet-phy.yaml.
phy-reset-gpios:
deprecated: true
description:
Should specify the gpio for phy reset.
phy-reset-duration:
deprecated: true
description:
Reset duration in milliseconds. Should present only if property
"phy-reset-gpios" is available. Missing the property will have the
duration be 1 millisecond. Numbers greater than 1000 are invalid
and 1 millisecond will be used instead.
phy-reset-active-high:
deprecated: true
description:
If present then the reset sequence using the GPIO specified in the
"phy-reset-gpios" property is reversed (H=reset state, L=operation state).
phy-reset-post-delay:
deprecated: true
description:
Post reset delay in milliseconds. If present then a delay of phy-reset-post-delay
milliseconds will be observed after the phy-reset-gpios has been toggled.
Can be omitted thus no delay is observed. Delay is in range of 1ms to 1000ms.
Other delays are invalid.
required:
- compatible
- reg
- interrupts
# FIXME: We had better set additionalProperties to false to avoid invalid or at
# least undocumented properties. However, PHY may have a deprecated option to
# place PHY OF properties in the MAC node, such as Micrel PHY, and we can find
# these boards which is based on i.MX6QDL.
additionalProperties: false
examples:
- |
ethernet@83fec000 {
compatible = "fsl,imx51-fec", "fsl,imx27-fec";
reg = <0x83fec000 0x4000>;
interrupts = <87>;
phy-mode = "mii";
phy-reset-gpios = <&gpio2 14 0>;
phy-supply = <&reg_fec_supply>;
};
ethernet@83fed000 {
compatible = "fsl,imx51-fec", "fsl,imx27-fec";
reg = <0x83fed000 0x4000>;
interrupts = <87>;
phy-mode = "mii";
phy-reset-gpios = <&gpio2 14 0>;
phy-supply = <&reg_fec_supply>;
phy-handle = <&ethphy0>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};
};

95
Documentation/devicetree/bindings/net/fsl-fec.txt
View File

@@ -1,95 +0,0 @@
* Freescale Fast Ethernet Controller (FEC)
Required properties:
- compatible : Should be "fsl,<soc>-fec"
- reg : Address and length of the register set for the device
- interrupts : Should contain fec interrupt
- phy-mode : See ethernet.txt file in the same directory
Optional properties:
- phy-supply : regulator that powers the Ethernet PHY.
- phy-handle : phandle to the PHY device connected to this device.
- fixed-link : Assume a fixed link. See fixed-link.txt in the same directory.
Use instead of phy-handle.
- fsl,num-tx-queues : The property is valid for enet-avb IP, which supports
hw multi queues. Should specify the tx queue number, otherwise set tx queue
number to 1.
- fsl,num-rx-queues : The property is valid for enet-avb IP, which supports
hw multi queues. Should specify the rx queue number, otherwise set rx queue
number to 1.
- fsl,magic-packet : If present, indicates that the hardware supports waking
up via magic packet.
- fsl,err006687-workaround-present: If present indicates that the system has
the hardware workaround for ERR006687 applied and does not need a software
workaround.
- fsl,stop-mode: register bits of stop mode control, the format is
<&gpr req_gpr req_bit>.
gpr is the phandle to general purpose register node.
req_gpr is the gpr register offset for ENET stop request.
req_bit is the gpr bit offset for ENET stop request.
-interrupt-names: names of the interrupts listed in interrupts property in
the same order. The defaults if not specified are
__Number of interrupts__ __Default__
1 "int0"
2 "int0", "pps"
3 "int0", "int1", "int2"
4 "int0", "int1", "int2", "pps"
The order may be changed as long as they correspond to the interrupts
property. Currently, only i.mx7 uses "int1" and "int2". They correspond to
tx/rx queues 1 and 2. "int0" will be used for queue 0 and ENET_MII interrupts.
For imx6sx, "int0" handles all 3 queues and ENET_MII. "pps" is for the pulse
per second interrupt associated with 1588 precision time protocol(PTP).
Optional subnodes:
- mdio : specifies the mdio bus in the FEC, used as a container for phy nodes
according to phy.txt in the same directory
Deprecated optional properties:
To avoid these, create a phy node according to phy.txt in the same
directory, and point the fec's "phy-handle" property to it. Then use
the phy's reset binding, again described by phy.txt.
- phy-reset-gpios : Should specify the gpio for phy reset
- phy-reset-duration : Reset duration in milliseconds. Should present
only if property "phy-reset-gpios" is available. Missing the property
will have the duration be 1 millisecond. Numbers greater than 1000 are
invalid and 1 millisecond will be used instead.
- phy-reset-active-high : If present then the reset sequence using the GPIO
specified in the "phy-reset-gpios" property is reversed (H=reset state,
L=operation state).
- phy-reset-post-delay : Post reset delay in milliseconds. If present then
a delay of phy-reset-post-delay milliseconds will be observed after the
phy-reset-gpios has been toggled. Can be omitted thus no delay is
observed. Delay is in range of 1ms to 1000ms. Other delays are invalid.
Example:
ethernet@83fec000 {
compatible = "fsl,imx51-fec", "fsl,imx27-fec";
reg = <0x83fec000 0x4000>;
interrupts = <87>;
phy-mode = "mii";
phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; /* GPIO2_14 */
local-mac-address = [00 04 9F 01 1B B9];
phy-supply = <&reg_fec_supply>;
};
Example with phy specified:
ethernet@83fec000 {
compatible = "fsl,imx51-fec", "fsl,imx27-fec";
reg = <0x83fec000 0x4000>;
interrupts = <87>;
phy-mode = "mii";
phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; /* GPIO2_14 */
local-mac-address = [00 04 9F 01 1B B9];
phy-supply = <&reg_fec_supply>;
phy-handle = <&ethphy>;
mdio {
clock-frequency = <5000000>;
ethphy: ethernet-phy@6 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <6>;
max-speed = <100>;
};
};
};

54
Documentation/devicetree/bindings/net/intel,ixp46x-ptp-timer.yaml Normal file
View File

@@ -0,0 +1,54 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2018 Linaro Ltd.
%YAML 1.2
---
$id: "http://devicetree.org/schemas/net/intel,ixp46x-ptp-timer.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Intel IXP46x PTP Timer (TSYNC)
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
description: |
The Intel IXP46x PTP timer is known in the manual as IEEE1588 Hardware
Assist and Time Synchronization Hardware Assist TSYNC provides a PTP
timer. It exists in the Intel IXP45x and IXP46x XScale SoCs.
properties:
compatible:
const: intel,ixp46x-ptp-timer
reg:
maxItems: 1
interrupts:
items:
- description: Interrupt to trigger master mode snapshot from the
PRP timer, usually a GPIO interrupt.
- description: Interrupt to trigger slave mode snapshot from the
PRP timer, usually a GPIO interrupt.
interrupt-names:
items:
- const: master
- const: slave
required:
- compatible
- reg
- interrupts
- interrupt-names
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
ptp-timer@c8010000 {
compatible = "intel,ixp46x-ptp-timer";
reg = <0xc8010000 0x1000>;
interrupt-parent = <&gpio0>;
interrupts = <8 IRQ_TYPE_EDGE_FALLING>, <7 IRQ_TYPE_EDGE_FALLING>;
interrupt-names = "master", "slave";
};

98
Documentation/devicetree/bindings/net/litex,liteeth.yaml Normal file
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@@ -0,0 +1,98 @@
# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/litex,liteeth.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: LiteX LiteETH ethernet device
maintainers:
- Joel Stanley <joel@jms.id.au>
description: |
LiteETH is a small footprint and configurable Ethernet core for FPGA based
system on chips.
The hardware source is Open Source and can be found on at
https://github.com/enjoy-digital/liteeth/.
allOf:
- $ref: ethernet-controller.yaml#
properties:
compatible:
const: litex,liteeth
reg:
items:
- description: MAC registers
- description: MDIO registers
- description: Packet buffer
reg-names:
items:
- const: mac
- const: mdio
- const: buffer
interrupts:
maxItems: 1
litex,rx-slots:
description: Number of slots in the receive buffer
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 1
default: 2
litex,tx-slots:
description: Number of slots in the transmit buffer
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 1
default: 2
litex,slot-size:
description: Size in bytes of a slot in the tx/rx buffer
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0x800
default: 0x800
mac-address: true
local-mac-address: true
phy-handle: true
mdio:
$ref: mdio.yaml#
required:
- compatible
- reg
- interrupts
additionalProperties: false
examples:
- |
mac: ethernet@8020000 {
compatible = "litex,liteeth";
reg = <0x8021000 0x100>,
<0x8020800 0x100>,
<0x8030000 0x2000>;
reg-names = "mac", "mdio", "buffer";
litex,rx-slots = <2>;
litex,tx-slots = <2>;
litex,slot-size = <0x800>;
interrupts = <0x11 0x1>;
phy-handle = <&eth_phy>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
eth_phy: ethernet-phy@0 {
reg = <0>;
};
};
};
...
# vim: set ts=2 sw=2 sts=2 tw=80 et cc=80 ft=yaml :

1
Documentation/devicetree/bindings/net/macb.txt
View File

@@ -8,6 +8,7 @@ Required properties:
Use "cdns,np4-macb" for NP4 SoC devices.
Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb".
Use "atmel,sama5d2-gem" for the GEM IP (10/100) available on Atmel sama5d2 SoCs.
Use "atmel,sama5d29-gem" for GEM XL IP (10/100) available on Atmel sama5d29 SoCs.
Use "atmel,sama5d3-macb" for the 10/100Mbit IP available on Atmel sama5d3 SoCs.
Use "atmel,sama5d3-gem" for the Gigabit IP available on Atmel sama5d3 SoCs.
Use "atmel,sama5d4-gem" for the GEM IP (10/100) available on Atmel sama5d4 SoCs.

24
Documentation/devicetree/bindings/net/qcom,ipa.yaml
View File

@@ -87,16 +87,24 @@ properties:
- const: ipa-setup-ready
interconnects:
items:
- description: Interconnect path between IPA and main memory
- description: Interconnect path between IPA and internal memory
- description: Interconnect path between IPA and the AP subsystem
oneOf:
- items:
- description: Path leading to system memory
- description: Path between the AP and IPA config space
- items:
- description: Path leading to system memory
- description: Path leading to internal memory
- description: Path between the AP and IPA config space
interconnect-names:
items:
- const: memory
- const: imem
- const: config
oneOf:
- items:
- const: memory
- const: config
- items:
- const: memory
- const: imem
- const: config
qcom,smem-states:
$ref: /schemas/types.yaml#/definitions/phandle-array

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