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Merge tag 'char-misc-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Browse Source 
Pull char/misc and other driver subsystem updates from Greg KH:
 "Here is the large set of driver changes for char/misc drivers and
  other smaller driver subsystems that flow through this git tree.

  Included in here are:

   - New IIO drivers and features and improvments in that subsystem

   - New hwtracing drivers and additions to that subsystem

   - lots of interconnect changes and new drivers as that subsystem
     seems under very active development recently. This required also
     merging in the icc subsystem changes through this tree.

   - FPGA driver updates

   - counter subsystem and driver updates

   - MHI driver updates

   - nvmem driver updates

   - documentation updates

   - Other smaller driver updates and fixes, full details in the
     shortlog

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'char-misc-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (223 commits)
  scripts/tags.sh: fix incompatibility with PCRE2
  firmware: coreboot: Remove GOOGLE_COREBOOT_TABLE_ACPI/OF Kconfig entries
  mei: lower the log level for non-fatal failed messages
  mei: bus: disallow driver match while dismantling device
  misc: vmw_balloon: fix memory leak with using debugfs_lookup()
  nvmem: stm32: fix OPTEE dependency
  dt-bindings: nvmem: qfprom: add IPQ8074 compatible
  nvmem: qcom-spmi-sdam: register at device init time
  nvmem: rave-sp-eeprm: fix kernel-doc bad line warning
  nvmem: stm32: detect bsec pta presence for STM32MP15x
  nvmem: stm32: add OP-TEE support for STM32MP13x
  nvmem: core: use nvmem_add_one_cell() in nvmem_add_cells_from_of()
  nvmem: core: add nvmem_add_one_cell()
  nvmem: core: drop the removal of the cells in nvmem_add_cells()
  nvmem: core: move struct nvmem_cell_info to nvmem-provider.h
  nvmem: core: add an index parameter to the cell
  of: property: add #nvmem-cell-cells property
  of: property: make #.*-cells optional for simple props
  of: base: add of_parse_phandle_with_optional_args()
  net: add helper eth_addr_add()
  ...
This commit is contained in:
Linus Torvalds
2023-02-24 12:47:33 -08:00
parent 0601f25d1c 6ec363fc61
commit 693fed981e
290 changed files with 12517 additions and 1945 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x
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@@ -236,7 +236,7 @@ What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/traceid
Date: November 2014
KernelVersion: 3.19
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Holds the trace ID that will appear in the trace stream
Description: (RO) Holds the trace ID that will appear in the trace stream
coming from this trace entity.
What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/trigger_event

13
Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm Normal file
View File

@@ -0,0 +1,13 @@
What: /sys/bus/coresight/devices/<tpdm-name>/integration_test
Date: January 2023
KernelVersion 6.2
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
Description:
(Write) Run integration test for tpdm. Integration test
will generate test data for tpdm. It can help to make
sure that the trace path is enabled and the link configurations
are fine.
Accepts only one of the 2 values - 1 or 2.
1 : Generate 64 bits data
2 : Generate 32 bits data

31
Documentation/ABI/testing/sysfs-bus-coresight-devices-ultra_smb Normal file
View File

@@ -0,0 +1,31 @@
What: /sys/bus/coresight/devices/ultra_smb<N>/enable_sink
Date: January 2023
KernelVersion: 6.3
Contact: Junhao He <hejunhao3@huawei.com>
Description: (RW) Add/remove a SMB device from a trace path. There can be
multiple sources for a single SMB device.
What: /sys/bus/coresight/devices/ultra_smb<N>/mgmt/buf_size
Date: January 2023
KernelVersion: 6.3
Contact: Junhao He <hejunhao3@huawei.com>
Description: (RO) Shows the buffer size of each UltraSoc SMB device.
What: /sys/bus/coresight/devices/ultra_smb<N>/mgmt/buf_status
Date: January 2023
KernelVersion: 6.3
Contact: Junhao He <hejunhao3@huawei.com>
Description: (RO) Shows the value of UltraSoc SMB status register.
BIT(0) is zero means buffer is empty.
What: /sys/bus/coresight/devices/ultra_smb<N>/mgmt/read_pos
Date: January 2023
KernelVersion: 6.3
Contact: Junhao He <hejunhao3@huawei.com>
Description: (RO) Shows the value of UltraSoc SMB Read Pointer register.
What: /sys/bus/coresight/devices/ultra_smb<N>/mgmt/write_pos
Date: January 2023
KernelVersion: 6.3
Contact: Junhao He <hejunhao3@huawei.com>
Description: (RO) Shows the value of UltraSoc SMB Write Pointer register.

18
Documentation/ABI/testing/sysfs-driver-uacce
View File

@@ -19,6 +19,24 @@ Contact: linux-accelerators@lists.ozlabs.org
Description: Available instances left of the device
Return -ENODEV if uacce_ops get_available_instances is not provided
What: /sys/class/uacce/<dev_name>/isolate_strategy
Date: Nov 2022
KernelVersion: 6.1
Contact: linux-accelerators@lists.ozlabs.org
Description: (RW) A sysfs node that configure the error threshold for the hardware
isolation strategy. This size is a configured integer value, which is the
number of threshold for hardware errors occurred in one hour. The default is 0.
0 means never isolate the device. The maximum value is 65535. You can write
a number of threshold based on your hardware.
What: /sys/class/uacce/<dev_name>/isolate
Date: Nov 2022
KernelVersion: 6.1
Contact: linux-accelerators@lists.ozlabs.org
Description: (R) A sysfs node that read the device isolated state. The value 1
means the device is unavailable. The 0 means the device is
available.
What: /sys/class/uacce/<dev_name>/algorithms
Date: Feb 2020
KernelVersion: 5.7

16
Documentation/ABI/testing/sysfs-driver-xilinx-tmr-manager Normal file
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@@ -0,0 +1,16 @@
What: /sys/devices/platform/amba_pl/<dev>/errcnt
Date: Nov 2022
Contact: appana.durga.kedareswara.rao@amd.com
Description: This control file provides the fault detection count.
This file cannot be written.
Example:
# cat /sys/devices/platform/amba_pl/44a10000.tmr_manager/errcnt
1
What: /sys/devices/platform/amba_pl/<dev>/dis_block_break
Date: Nov 2022
Contact: appana.durga.kedareswara.rao@amd.com
Description: Write any value to it, This control file enables the break signal.
This file is write only.
Example:
# echo <any value> > /sys/devices/platform/amba_pl/44a10000.tmr_manager/dis_block_break

129
Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml Normal file
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@@ -0,0 +1,129 @@
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/qcom,coresight-tpda.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Trace, Profiling and Diagnostics Aggregator - TPDA
description: |
TPDAs are responsible for packetization and timestamping of data sets
utilizing the MIPI STPv2 packet protocol. Pulling data sets from one or
more attached TPDM and pushing the resultant (packetized) data out a
master ATB interface. Performing an arbitrated ATB interleaving (funneling)
task for free-flowing data from TPDM (i.e. CMB and DSB data set flows).
There is no strict binding between TPDM and TPDA. TPDA can have multiple
TPDMs connect to it. But There must be only one TPDA in the path from the
TPDM source to TMC sink. TPDM can directly connect to TPDA's inport or
connect to funnel which will connect to TPDA's inport.
We can use the commands are similar to the below to validate TPDMs.
Enable coresight sink first.
echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink
echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source
echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test
echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test
The test data will be collected in the coresight sink which is enabled.
If rwp register of the sink is keeping updating when do integration_test
(by cat tmc_etf0/mgmt/rwp), it means there is data generated from TPDM
to sink.
maintainers:
- Mao Jinlong <quic_jinlmao@quicinc.com>
- Tao Zhang <quic_taozha@quicinc.com>
# Need a custom select here or 'arm,primecell' will match on lots of nodes
select:
properties:
compatible:
contains:
enum:
- qcom,coresight-tpda
required:
- compatible
properties:
$nodename:
pattern: "^tpda(@[0-9a-f]+)$"
compatible:
items:
- const: qcom,coresight-tpda
- const: arm,primecell
reg:
minItems: 1
maxItems: 2
clocks:
maxItems: 1
clock-names:
items:
- const: apb_pclk
in-ports:
type: object
description: |
Input connections from TPDM to TPDA
$ref: /schemas/graph.yaml#/properties/ports
out-ports:
type: object
description: |
Output connections from the TPDA to legacy CoreSight trace bus.
$ref: /schemas/graph.yaml#/properties/ports
properties:
port:
description:
Output connection from the TPDA to legacy CoreSight Trace bus.
$ref: /schemas/graph.yaml#/properties/port
required:
- compatible
- reg
- clocks
- clock-names
- in-ports
- out-ports
additionalProperties: false
examples:
# minimum tpda definition.
- |
tpda@6004000 {
compatible = "qcom,coresight-tpda", "arm,primecell";
reg = <0x6004000 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
tpda_qdss_0_in_tpdm_dcc: endpoint {
remote-endpoint =
<&tpdm_dcc_out_tpda_qdss_0>;
};
};
};
out-ports {
port {
tpda_qdss_out_funnel_in0: endpoint {
remote-endpoint =
<&funnel_in0_in_tpda_qdss>;
};
};
};
};
...

93
Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml Normal file
View File

@@ -0,0 +1,93 @@
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/qcom,coresight-tpdm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Trace, Profiling and Diagnostics Monitor - TPDM
description: |
The TPDM or Monitor serves as data collection component for various dataset
types specified in the QPMDA spec. It covers Implementation defined ((ImplDef),
Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete
Single Bit (DSB). It performs data collection in the data producing clock
domain and transfers it to the data collection time domain, generally ATB
clock domain.
The primary use case of the TPDM is to collect data from different data
sources and send it to a TPDA for packetization, timestamping, and funneling.
maintainers:
- Mao Jinlong <quic_jinlmao@quicinc.com>
- Tao Zhang <quic_taozha@quicinc.com>
# Need a custom select here or 'arm,primecell' will match on lots of nodes
select:
properties:
compatible:
contains:
enum:
- qcom,coresight-tpdm
required:
- compatible
properties:
$nodename:
pattern: "^tpdm(@[0-9a-f]+)$"
compatible:
items:
- const: qcom,coresight-tpdm
- const: arm,primecell
reg:
minItems: 1
maxItems: 2
clocks:
maxItems: 1
clock-names:
items:
- const: apb_pclk
out-ports:
description: |
Output connections from the TPDM to coresight funnel/TPDA.
$ref: /schemas/graph.yaml#/properties/ports
properties:
port:
description: Output connection from the TPDM to coresight
funnel/TPDA.
$ref: /schemas/graph.yaml#/properties/port
required:
- compatible
- reg
- clocks
- clock-names
additionalProperties: false
examples:
# minimum TPDM definition. TPDM connect to coresight TPDA.
- |
tpdm@684c000 {
compatible = "qcom,coresight-tpdm", "arm,primecell";
reg = <0x0684c000 0x1000>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
out-ports {
port {
tpdm_prng_out_tpda_qdss: endpoint {
remote-endpoint =
<&tpda_qdss_in_tpdm_prng>;
};
};
};
};
...

2
Documentation/devicetree/bindings/iio/accel/adi,adis16201.yaml
View File

@@ -41,7 +41,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;

2
Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml
View File

@@ -39,7 +39,7 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;

2
Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml
View File

@@ -59,7 +59,7 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c0 {
i2c {
#address-cells = <1>;
#size-cells = <0>;

4
Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml
View File

@@ -49,7 +49,7 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c0 {
i2c {
#address-cells = <1>;
#size-cells = <0>;
@@ -64,7 +64,7 @@ examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;

52
Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml
View File

@@ -58,34 +58,34 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
/* Example for a I2C device node */
accelerometer@1d {
compatible = "adi,adxl355";
reg = <0x1d>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "DRDY";
};
/* Example for a I2C device node */
accelerometer@1d {
compatible = "adi,adxl355";
reg = <0x1d>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "DRDY";
};
};
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
accelerometer@0 {
compatible = "adi,adxl355";
reg = <0>;
spi-max-frequency = <1000000>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "DRDY";
};
accelerometer@0 {
compatible = "adi,adxl355";
reg = <0>;
spi-max-frequency = <1000000>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "DRDY";
};
};

48
Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml
View File

@@ -37,32 +37,32 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c0 {
#address-cells = <1>;
#size-cells = <0>;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
/* Example for a I2C device node */
accelerometer@53 {
compatible = "adi,adxl372";
reg = <0x53>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
};
/* Example for a I2C device node */
accelerometer@53 {
compatible = "adi,adxl372";
reg = <0x53>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
};
};
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
#address-cells = <1>;
#size-cells = <0>;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
accelerometer@0 {
compatible = "adi,adxl372";
reg = <0>;
spi-max-frequency = <1000000>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
};
accelerometer@0 {
compatible = "adi,adxl372";
reg = <0>;
spi-max-frequency = <1000000>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
};
};

2
Documentation/devicetree/bindings/iio/accel/bosch,bma220.yaml
View File

@@ -36,7 +36,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;

2
Documentation/devicetree/bindings/iio/accel/kionix,kxcjk1013.yaml
View File

@@ -44,7 +44,7 @@ examples:
accel@f {
compatible = "kionix,kxtf9";
reg = <0x0F>;
reg = <0xf>;
mount-matrix = "0", "1", "0",
"1", "0", "0",
"0", "0", "1";

5
Documentation/devicetree/bindings/iio/accel/memsensing,msa311.yaml
View File

@@ -1,9 +1,8 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: "http://devicetree.org/schemas/iio/accel/memsensing,msa311.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/iio/accel/memsensing,msa311.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MEMSensing digital 3-Axis accelerometer

4
Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml
View File

@@ -50,7 +50,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c0 {
i2c {
#address-cells = <1>;
#size-cells = <0>;
@@ -65,7 +65,7 @@ examples:
};
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi0 {
spi {
#address-cells = <1>;
#size-cells = <0>;

8
Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml
View File

@@ -44,11 +44,11 @@ examples:
#size-cells = <0>;
adc@2f {
compatible = "adi,ad7091r5";
reg = <0x2f>;
compatible = "adi,ad7091r5";
reg = <0x2f>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpio>;
};
};
...

2
Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml
View File

@@ -61,7 +61,7 @@ required:
patternProperties:
"^channel@([0-9]|1[0-5])$":
$ref: "adc.yaml"
$ref: adc.yaml
type: object
description: |
Represents the external channels which are connected to the ADC.

38
Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml
View File

@@ -99,26 +99,26 @@ unevaluatedProperties: false
examples:
- |
spi0 {
#address-cells = <1>;
#size-cells = <0>;
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad7192";
reg = <0>;
spi-max-frequency = <1000000>;
spi-cpol;
spi-cpha;
clocks = <&ad7192_mclk>;
clock-names = "mclk";
interrupts = <25 0x2>;
interrupt-parent = <&gpio>;
dvdd-supply = <&dvdd>;
avdd-supply = <&avdd>;
adc@0 {
compatible = "adi,ad7192";
reg = <0>;
spi-max-frequency = <1000000>;
spi-cpol;
spi-cpha;
clocks = <&ad7192_mclk>;
clock-names = "mclk";
interrupts = <25 0x2>;
interrupt-parent = <&gpio>;
dvdd-supply = <&dvdd>;
avdd-supply = <&avdd>;
adi,refin2-pins-enable;
adi,rejection-60-Hz-enable;
adi,buffer-enable;
adi,burnout-currents-enable;
adi,refin2-pins-enable;
adi,rejection-60-Hz-enable;
adi,buffer-enable;
adi,burnout-currents-enable;
};
};

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