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Merge tag 'sh-for-5.9' of git://git.libc.org/linux-sh

Browse Source 
Pull arch/sh updates from Rich Felker:
 "Cleanup, SECCOMP_FILTER support, message printing fixes, and other
  changes to arch/sh"

* tag 'sh-for-5.9' of git://git.libc.org/linux-sh: (34 commits)
  sh: landisk: Add missing initialization of sh_io_port_base
  sh: bring syscall_set_return_value in line with other architectures
  sh: Add SECCOMP_FILTER
  sh: Rearrange blocks in entry-common.S
  sh: switch to copy_thread_tls()
  sh: use the generic dma coherent remap allocator
  sh: don't allow non-coherent DMA for NOMMU
  dma-mapping: consolidate the NO_DMA definition in kernel/dma/Kconfig
  sh: unexport register_trapped_io and match_trapped_io_handler
  sh: don't include <asm/io_trapped.h> in <asm/io.h>
  sh: move the ioremap implementation out of line
  sh: move ioremap_fixed details out of <asm/io.h>
  sh: remove __KERNEL__ ifdefs from non-UAPI headers
  sh: sort the selects for SUPERH alphabetically
  sh: remove -Werror from Makefiles
  sh: Replace HTTP links with HTTPS ones
  arch/sh/configs: remove obsolete CONFIG_SOC_CAMERA*
  sh: stacktrace: Remove stacktrace_ops.stack()
  sh: machvec: Modernize printing of kernel messages
  sh: pci: Modernize printing of kernel messages
  ...
This commit is contained in:
Linus Torvalds
2020-08-15 18:50:32 -07:00
parent 713eee8472 0c64a0dce5
commit 5bbec3cfe3
69 changed files with 375 additions and 1003 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/m68k/Kconfig
View File

@@ -16,6 +16,7 @@ config M68K
select HAVE_DEBUG_BUGVERBOSE
select GENERIC_IRQ_SHOW
select GENERIC_ATOMIC64
select NO_DMA if !MMU && !COLDFIRE
select HAVE_UID16
select VIRT_TO_BUS
select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS
@@ -59,9 +60,6 @@ config TIME_LOW_RES
config NO_IOPORT_MAP
def_bool y
config NO_DMA
def_bool (MMU && SUN3) || (!MMU && !COLDFIRE)
config ZONE_DMA
bool
default y

1
arch/m68k/Kconfig.machine
View File

@@ -126,6 +126,7 @@ config SUN3
depends on MMU
depends on !MMU_MOTOROLA
select MMU_SUN3 if MMU
select NO_DMA
select M68020
help
This option enables support for the Sun 3 series of workstations

119
arch/sh/Kconfig
View File

@@ -1,75 +1,77 @@
# SPDX-License-Identifier: GPL-2.0
config SUPERH
def_bool y
select ARCH_HAS_BINFMT_FLAT if !MMU
select ARCH_HAS_PTE_SPECIAL
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
select ARCH_MIGHT_HAVE_PC_PARPORT
select HAVE_PATA_PLATFORM
select CLKDEV_LOOKUP
select DMA_DECLARE_COHERENT
select HAVE_IDE if HAS_IOPORT_MAP
select HAVE_OPROFILE
select HAVE_ARCH_TRACEHOOK
select HAVE_PERF_EVENTS
select HAVE_DEBUG_BUGVERBOSE
select HAVE_FAST_GUP if MMU
select ARCH_32BIT_OFF_T
select ARCH_HAVE_CUSTOM_GPIO_H
select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
select ARCH_HAS_BINFMT_FLAT if !MMU
select ARCH_HAS_GIGANTIC_PAGE
select ARCH_HAS_GCOV_PROFILE_ALL
select PERF_USE_VMALLOC
select HAVE_DEBUG_KMEMLEAK
select HAVE_KERNEL_GZIP
select CPU_NO_EFFICIENT_FFS
select HAVE_KERNEL_BZIP2
select HAVE_KERNEL_LZMA
select HAVE_KERNEL_XZ
select HAVE_KERNEL_LZO
select HAVE_UID16
select ARCH_HAS_PTE_SPECIAL
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
select ARCH_HIBERNATION_POSSIBLE if MMU
select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_WANT_IPC_PARSE_VERSION
select HAVE_SYSCALL_TRACEPOINTS
select HAVE_REGS_AND_STACK_ACCESS_API
select MAY_HAVE_SPARSE_IRQ
select IRQ_FORCED_THREADING
select RTC_LIB
select CLKDEV_LOOKUP
select CPU_NO_EFFICIENT_FFS
select DMA_DECLARE_COHERENT
select GENERIC_ATOMIC64
select GENERIC_IRQ_SHOW
select GENERIC_SMP_IDLE_THREAD
select GENERIC_IDLE_POLL_SETUP
select GENERIC_CLOCKEVENTS
select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
select GENERIC_IDLE_POLL_SETUP
select GENERIC_IRQ_SHOW
select GENERIC_PCI_IOMAP if PCI
select GENERIC_SCHED_CLOCK
select GENERIC_STRNCPY_FROM_USER
select GENERIC_STRNLEN_USER
select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
select MODULES_USE_ELF_RELA
select NO_GENERIC_PCI_IOPORT_MAP if PCI
select OLD_SIGSUSPEND
select OLD_SIGACTION
select PCI_DOMAINS if PCI
select HAVE_ARCH_AUDITSYSCALL
select HAVE_FUTEX_CMPXCHG if FUTEX
select HAVE_NMI
select NEED_SG_DMA_LENGTH
select ARCH_HAS_GIGANTIC_PAGE
select ARCH_32BIT_OFF_T
select GENERIC_SMP_IDLE_THREAD
select GUP_GET_PTE_LOW_HIGH if X2TLB
select HAVE_ARCH_AUDITSYSCALL
select HAVE_ARCH_KGDB
select HAVE_ARCH_SECCOMP_FILTER
select HAVE_ARCH_TRACEHOOK
select HAVE_COPY_THREAD_TLS
select HAVE_DEBUG_BUGVERBOSE
select HAVE_DEBUG_KMEMLEAK
select HAVE_DYNAMIC_FTRACE
select HAVE_FAST_GUP if MMU
select HAVE_FUNCTION_GRAPH_TRACER
select HAVE_FUNCTION_TRACER
select HAVE_FUTEX_CMPXCHG if FUTEX
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_HW_BREAKPOINT
select HAVE_IDE if HAS_IOPORT_MAP
select HAVE_IOREMAP_PROT if MMU && !X2TLB
select HAVE_KERNEL_BZIP2
select HAVE_KERNEL_GZIP
select HAVE_KERNEL_LZMA
select HAVE_KERNEL_LZO
select HAVE_KERNEL_XZ
select HAVE_KPROBES
select HAVE_KRETPROBES
select HAVE_IOREMAP_PROT if MMU && !X2TLB
select HAVE_FUNCTION_TRACER
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_DYNAMIC_FTRACE
select ARCH_WANT_IPC_PARSE_VERSION
select HAVE_FUNCTION_GRAPH_TRACER
select HAVE_ARCH_KGDB
select HAVE_HW_BREAKPOINT
select HAVE_MIXED_BREAKPOINTS_REGS
select PERF_EVENTS
select ARCH_HIBERNATION_POSSIBLE if MMU
select SPARSE_IRQ
select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
select HAVE_NMI
select HAVE_OPROFILE
select HAVE_PATA_PLATFORM
select HAVE_PERF_EVENTS
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_UID16
select HAVE_STACKPROTECTOR
select HAVE_SYSCALL_TRACEPOINTS
select IRQ_FORCED_THREADING
select MAY_HAVE_SPARSE_IRQ
select MODULES_USE_ELF_RELA
select NEED_SG_DMA_LENGTH
select NO_DMA if !MMU && !DMA_COHERENT
select NO_GENERIC_PCI_IOPORT_MAP if PCI
select OLD_SIGACTION
select OLD_SIGSUSPEND
select PCI_DOMAINS if PCI
select PERF_EVENTS
select PERF_USE_VMALLOC
select RTC_LIB
select SPARSE_IRQ
help
The SuperH is a RISC processor targeted for use in embedded systems
and consumer electronics; it was also used in the Sega Dreamcast
@@ -123,8 +125,8 @@ config ARCH_HAS_ILOG2_U64
config NO_IOPORT_MAP
def_bool !PCI
depends on !SH_CAYMAN && !SH_SH4202_MICRODEV && !SH_SHMIN && \
!SH_HP6XX && !SH_SOLUTION_ENGINE
depends on !SH_SH4202_MICRODEV && !SH_SHMIN && !SH_HP6XX && \
!SH_SOLUTION_ENGINE
config IO_TRAPPED
bool
@@ -136,8 +138,10 @@ config DMA_COHERENT
bool
config DMA_NONCOHERENT
def_bool !DMA_COHERENT
def_bool !NO_DMA && !DMA_COHERENT
select ARCH_HAS_DMA_PREP_COHERENT
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select DMA_DIRECT_REMAP
config PGTABLE_LEVELS
default 3 if X2TLB
@@ -630,7 +634,7 @@ config SMP
Y to "Enhanced Real Time Clock Support", below.
See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO
available at <http://www.tldp.org/docs.html#howto>.
available at <https://www.tldp.org/docs.html#howto>.
If you don't know what to do here, say N.
@@ -726,7 +730,6 @@ config ZERO_PAGE_OFFSET
config BOOT_LINK_OFFSET
hex
default "0x00210000" if SH_SHMIN
default "0x00400000" if SH_CAYMAN
default "0x00810000" if SH_7780_SOLUTION_ENGINE
default "0x009e0000" if SH_TITAN
default "0x01800000" if SH_SDK7780

5
arch/sh/Makefile
View File

@@ -15,11 +15,7 @@ ifneq ($(SUBARCH),$(ARCH))
endif
endif
ifeq ($(ARCH),sh)
KBUILD_DEFCONFIG := shx3_defconfig
else
KBUILD_DEFCONFIG := cayman_defconfig
endif
isa-y := any
isa-$(CONFIG_SH_DSP) := sh
@@ -143,7 +139,6 @@ machdir-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp
machdir-$(CONFIG_SH_SH4202_MICRODEV) += mach-microdev
machdir-$(CONFIG_SH_LANDISK) += mach-landisk
machdir-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2
machdir-$(CONFIG_SH_CAYMAN) += mach-cayman
machdir-$(CONFIG_SH_RSK) += mach-rsk
ifneq ($(machdir-y),)

6
arch/sh/boards/Kconfig
View File

@@ -340,12 +340,6 @@ config SH_MAGIC_PANEL_R2
help
Select Magic Panel R2 if configuring for Magic Panel R2.
config SH_CAYMAN
bool "Hitachi Cayman"
depends on CPU_SUBTYPE_SH5_101 || CPU_SUBTYPE_SH5_103
select HAVE_PCI
select ARCH_MIGHT_HAVE_PC_SERIO
config SH_POLARIS
bool "SMSC Polaris"
select CPU_HAS_IPR_IRQ

4
arch/sh/boards/board-sh2007.c
View File

@@ -126,14 +126,14 @@ static void __init sh2007_init_irq(void)
*/
static void __init sh2007_setup(char **cmdline_p)
{
printk(KERN_INFO "SH-2007 Setup...");
pr_info("SH-2007 Setup...");
/* setup wait control registers for area 5 */
__raw_writel(CS5BCR_D, CS5BCR);
__raw_writel(CS5WCR_D, CS5WCR);
__raw_writel(CS5PCR_D, CS5PCR);
printk(KERN_INFO " done.\n");
pr_cont(" done.\n");
}
/*

5
arch/sh/boards/mach-cayman/Makefile
View File

@@ -1,5 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
#
# Makefile for the Hitachi Cayman specific parts of the kernel
#
obj-y := setup.o irq.o panic.o

148
arch/sh/boards/mach-cayman/irq.c
View File

@@ -1,148 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* arch/sh/mach-cayman/irq.c - SH-5 Cayman Interrupt Support
*
* This file handles the board specific parts of the Cayman interrupt system
*
* Copyright (C) 2002 Stuart Menefy
*/
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/signal.h>
#include <cpu/irq.h>
#include <asm/page.h>
/* Setup for the SMSC FDC37C935 / LAN91C100FD */
#define SMSC_IRQ IRQ_IRL1
/* Setup for PCI Bus 2, which transmits interrupts via the EPLD */
#define PCI2_IRQ IRQ_IRL3
unsigned long epld_virt;
#define EPLD_BASE 0x04002000
#define EPLD_STATUS_BASE (epld_virt + 0x10)
#define EPLD_MASK_BASE (epld_virt + 0x20)
/* Note the SMSC SuperIO chip and SMSC LAN chip interrupts are all muxed onto
the same SH-5 interrupt */
static irqreturn_t cayman_interrupt_smsc(int irq, void *dev_id)
{
printk(KERN_INFO "CAYMAN: spurious SMSC interrupt\n");
return IRQ_NONE;
}
static irqreturn_t cayman_interrupt_pci2(int irq, void *dev_id)
{
printk(KERN_INFO "CAYMAN: spurious PCI interrupt, IRQ %d\n", irq);
return IRQ_NONE;
}
static void enable_cayman_irq(struct irq_data *data)
{
unsigned int irq = data->irq;
unsigned long flags;
unsigned long mask;
unsigned int reg;
unsigned char bit;
irq -= START_EXT_IRQS;
reg = EPLD_MASK_BASE + ((irq / 8) << 2);
bit = 1<<(irq % 8);
local_irq_save(flags);
mask = __raw_readl(reg);
mask |= bit;
__raw_writel(mask, reg);
local_irq_restore(flags);
}
static void disable_cayman_irq(struct irq_data *data)
{
unsigned int irq = data->irq;
unsigned long flags;
unsigned long mask;
unsigned int reg;
unsigned char bit;
irq -= START_EXT_IRQS;
reg = EPLD_MASK_BASE + ((irq / 8) << 2);
bit = 1<<(irq % 8);
local_irq_save(flags);
mask = __raw_readl(reg);
mask &= ~bit;
__raw_writel(mask, reg);
local_irq_restore(flags);
}
struct irq_chip cayman_irq_type = {
.name = "Cayman-IRQ",
.irq_unmask = enable_cayman_irq,
.irq_mask = disable_cayman_irq,
};
int cayman_irq_demux(int evt)
{
int irq = intc_evt_to_irq[evt];
if (irq == SMSC_IRQ) {
unsigned long status;
int i;
status = __raw_readl(EPLD_STATUS_BASE) &
__raw_readl(EPLD_MASK_BASE) & 0xff;
if (status == 0) {
irq = -1;
} else {
for (i=0; i<8; i++) {
if (status & (1<<i))
break;
}
irq = START_EXT_IRQS + i;
}
}
if (irq == PCI2_IRQ) {
unsigned long status;
int i;
status = __raw_readl(EPLD_STATUS_BASE + 3 * sizeof(u32)) &
__raw_readl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff;
if (status == 0) {
irq = -1;
} else {
for (i=0; i<8; i++) {
if (status & (1<<i))
break;
}
irq = START_EXT_IRQS + (3 * 8) + i;
}
}
return irq;
}
void init_cayman_irq(void)
{
int i;
epld_virt = (unsigned long)ioremap(EPLD_BASE, 1024);
if (!epld_virt) {
printk(KERN_ERR "Cayman IRQ: Unable to remap EPLD\n");
return;
}
for (i = 0; i < NR_EXT_IRQS; i++) {
irq_set_chip_and_handler(START_EXT_IRQS + i,
&cayman_irq_type, handle_level_irq);
}
/* Setup the SMSC interrupt */
if (request_irq(SMSC_IRQ, cayman_interrupt_smsc, 0, "Cayman SMSC Mux",
NULL))
pr_err("Failed to register Cayman SMSC Mux interrupt\n");
if (request_irq(PCI2_IRQ, cayman_interrupt_pci2, 0, "Cayman PCI2 Mux",
NULL))
pr_err("Failed to register Cayman PCI2 Mux interrupt\n");
}

46
arch/sh/boards/mach-cayman/panic.c
View File

@@ -1,46 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2003 Richard Curnow, SuperH UK Limited
*/
#include <linux/kernel.h>
#include <linux/io.h>
#include <cpu/registers.h>
/* THIS IS A PHYSICAL ADDRESS */
#define HDSP2534_ADDR (0x04002100)
static void poor_mans_delay(void)
{
int i;
for (i = 0; i < 2500000; i++)
cpu_relax();
}
static void show_value(unsigned long x)
{
int i;
unsigned nibble;
for (i = 0; i < 8; i++) {
nibble = ((x >> (i * 4)) & 0xf);
__raw_writeb(nibble + ((nibble > 9) ? 55 : 48),
HDSP2534_ADDR + 0xe0 + ((7 - i) << 2));
}
}
void
panic_handler(unsigned long panicPC, unsigned long panicSSR,
unsigned long panicEXPEVT)
{
while (1) {
/* This piece of code displays the PC on the LED display */
show_value(panicPC);
poor_mans_delay();
show_value(panicSSR);
poor_mans_delay();
show_value(panicEXPEVT);
poor_mans_delay();
}
}

181
arch/sh/boards/mach-cayman/setup.c
View File

@@ -1,181 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* arch/sh/mach-cayman/setup.c
*
* SH5 Cayman support
*
* Copyright (C) 2002 David J. Mckay & Benedict Gaster
* Copyright (C) 2003 - 2007 Paul Mundt
*/
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <cpu/irq.h>
/*
* Platform Dependent Interrupt Priorities.
*/
/* Using defaults defined in irq.h */
#define RES NO_PRIORITY /* Disabled */
#define IR0 IRL0_PRIORITY /* IRLs */
#define IR1 IRL1_PRIORITY
#define IR2 IRL2_PRIORITY
#define IR3 IRL3_PRIORITY
#define PCA INTA_PRIORITY /* PCI Ints */
#define PCB INTB_PRIORITY
#define PCC INTC_PRIORITY
#define PCD INTD_PRIORITY
#define SER TOP_PRIORITY
#define ERR TOP_PRIORITY
#define PW0 TOP_PRIORITY
#define PW1 TOP_PRIORITY
#define PW2 TOP_PRIORITY
#define PW3 TOP_PRIORITY
#define DM0 NO_PRIORITY /* DMA Ints */
#define DM1 NO_PRIORITY
#define DM2 NO_PRIORITY
#define DM3 NO_PRIORITY
#define DAE NO_PRIORITY
#define TU0 TIMER_PRIORITY /* TMU Ints */
#define TU1 NO_PRIORITY
#define TU2 NO_PRIORITY
#define TI2 NO_PRIORITY
#define ATI NO_PRIORITY /* RTC Ints */
#define PRI NO_PRIORITY
#define CUI RTC_PRIORITY
#define ERI SCIF_PRIORITY /* SCIF Ints */
#define RXI SCIF_PRIORITY
#define BRI SCIF_PRIORITY
#define TXI SCIF_PRIORITY
#define ITI TOP_PRIORITY /* WDT Ints */
/* Setup for the SMSC FDC37C935 */
#define SMSC_SUPERIO_BASE 0x04000000
#define SMSC_CONFIG_PORT_ADDR 0x3f0
#define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR
#define SMSC_DATA_PORT_ADDR 0x3f1
#define SMSC_ENTER_CONFIG_KEY 0x55
#define SMSC_EXIT_CONFIG_KEY 0xaa
#define SMCS_LOGICAL_DEV_INDEX 0x07
#define SMSC_DEVICE_ID_INDEX 0x20
#define SMSC_DEVICE_REV_INDEX 0x21
#define SMSC_ACTIVATE_INDEX 0x30
#define SMSC_PRIMARY_BASE_INDEX 0x60
#define SMSC_SECONDARY_BASE_INDEX 0x62
#define SMSC_PRIMARY_INT_INDEX 0x70
#define SMSC_SECONDARY_INT_INDEX 0x72
#define SMSC_IDE1_DEVICE 1
#define SMSC_KEYBOARD_DEVICE 7
#define SMSC_CONFIG_REGISTERS 8
#define SMSC_SUPERIO_READ_INDEXED(index) ({ \
outb((index), SMSC_INDEX_PORT_ADDR); \
inb(SMSC_DATA_PORT_ADDR); })
#define SMSC_SUPERIO_WRITE_INDEXED(val, index) ({ \
outb((index), SMSC_INDEX_PORT_ADDR); \
outb((val), SMSC_DATA_PORT_ADDR); })
#define IDE1_PRIMARY_BASE 0x01f0
#define IDE1_SECONDARY_BASE 0x03f6
unsigned long smsc_superio_virt;
int platform_int_priority[NR_INTC_IRQS] = {
IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */
RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */
PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */
TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */
RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */
RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */
RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */
};
static int __init smsc_superio_setup(void)
{
unsigned char devid, devrev;
smsc_superio_virt = (unsigned long)ioremap(SMSC_SUPERIO_BASE, 1024);
if (!smsc_superio_virt) {
panic("Unable to remap SMSC SuperIO\n");
}
/* Initially the chip is in run state */
/* Put it into configuration state */
outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
/* Read device ID info */
devid = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_ID_INDEX);
devrev = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_REV_INDEX);
printk("SMSC SuperIO devid %02x rev %02x\n", devid, devrev);
/* Select the keyboard device */
SMSC_SUPERIO_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX);
/* enable it */
SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
/* Select the interrupts */
/* On a PC keyboard is IRQ1, mouse is IRQ12 */
SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_PRIMARY_INT_INDEX);
SMSC_SUPERIO_WRITE_INDEXED(12, SMSC_SECONDARY_INT_INDEX);
/*
* Only IDE1 exists on the Cayman
*/
/* Power it on */
SMSC_SUPERIO_WRITE_INDEXED(1 << SMSC_IDE1_DEVICE, 0x22);
SMSC_SUPERIO_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE >> 8,
SMSC_PRIMARY_BASE_INDEX + 0);
SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE & 0xff,
SMSC_PRIMARY_BASE_INDEX + 1);
SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE >> 8,
SMSC_SECONDARY_BASE_INDEX + 0);
SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE & 0xff,
SMSC_SECONDARY_BASE_INDEX + 1);
SMSC_SUPERIO_WRITE_INDEXED(14, SMSC_PRIMARY_INT_INDEX);
SMSC_SUPERIO_WRITE_INDEXED(SMSC_CONFIG_REGISTERS,
SMCS_LOGICAL_DEV_INDEX);
SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */
SMSC_SUPERIO_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */
SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */
SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */
/* Exit the configuration state */
outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
return 0;
}
device_initcall(smsc_superio_setup);
static void __iomem *cayman_ioport_map(unsigned long port, unsigned int len)
{
if (port < 0x400) {
extern unsigned long smsc_superio_virt;
return (void __iomem *)((port << 2) | smsc_superio_virt);
}
return (void __iomem *)port;
}
extern void init_cayman_irq(void);
static struct sh_machine_vector mv_cayman __initmv = {
.mv_name = "Hitachi Cayman",
.mv_ioport_map = cayman_ioport_map,
.mv_init_irq = init_cayman_irq,
};

3
arch/sh/boards/mach-landisk/setup.c
View File

@@ -82,6 +82,9 @@ device_initcall(landisk_devices_setup);
static void __init landisk_setup(char **cmdline_p)
{
/* I/O port identity mapping */
__set_io_port_base(0);
/* LED ON */
__raw_writeb(__raw_readb(PA_LED) | 0x03, PA_LED);

66
arch/sh/configs/cayman_defconfig
View File

@@ -1,66 +0,0 @@
CONFIG_POSIX_MQUEUE=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_FORCE_MAX_ZONEORDER=11
CONFIG_MEMORY_START=0x80000000
CONFIG_MEMORY_SIZE=0x00400000
CONFIG_FLATMEM_MANUAL=y
CONFIG_CACHE_OFF=y
CONFIG_SH_PCLK_FREQ=50000000
CONFIG_HEARTBEAT=y
CONFIG_PREEMPT=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
# CONFIG_IPV6 is not set
# CONFIG_FW_LOADER is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_SCSI_SPI_ATTRS=y
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
CONFIG_HW_RANDOM=y
CONFIG_I2C=m
CONFIG_WATCHDOG=y
CONFIG_FB=y
CONFIG_FIRMWARE_EDID=y
CONFIG_FB_MODE_HELPERS=y
CONFIG_FB_SH_MOBILE_LCDC=m
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FONTS=y
CONFIG_FONT_8x16=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
# CONFIG_LOGO_LINUX_CLUT224 is not set
# CONFIG_LOGO_SUPERH_MONO is not set
# CONFIG_LOGO_SUPERH_VGA16 is not set
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
CONFIG_MINIX_FS=y
CONFIG_ROMFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_SCHEDSTATS=y
CONFIG_FRAME_POINTER=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set

1
arch/sh/drivers/pci/Makefile
View File

@@ -25,4 +25,3 @@ obj-$(CONFIG_SH_7780_SOLUTION_ENGINE) += fixups-sdk7780.o
obj-$(CONFIG_SH_TITAN) += fixups-titan.o
obj-$(CONFIG_SH_LANDISK) += fixups-landisk.o
obj-$(CONFIG_SH_LBOX_RE2) += fixups-rts7751r2d.o
obj-$(CONFIG_SH_CAYMAN) += fixups-cayman.o

6
arch/sh/drivers/pci/common.c
View File

@@ -54,7 +54,7 @@ int __init pci_is_66mhz_capable(struct pci_channel *hose,
int cap66 = -1;
u16 stat;
printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
pr_info("PCI: Checking 66MHz capabilities...\n");
for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
if (PCI_FUNC(pci_devfn))
@@ -134,7 +134,7 @@ unsigned int pcibios_handle_status_errors(unsigned long addr,
pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
PCI_STATUS_SIG_TARGET_ABORT |
PCI_STATUS_REC_MASTER_ABORT, 1);
printk("\n");
pr_cont("\n");
cmd |= PCI_STATUS_REC_TARGET_ABORT;
}
@@ -143,7 +143,7 @@ unsigned int pcibios_handle_status_errors(unsigned long addr,
printk(KERN_DEBUG "PCI: parity error detected: ");
pcibios_report_status(PCI_STATUS_PARITY |
PCI_STATUS_DETECTED_PARITY, 1);
printk("\n");
pr_cont("\n");
cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;

78
arch/sh/drivers/pci/fixups-cayman.c
View File

@@ -1,78 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/types.h>
#include <cpu/irq.h>
#include "pci-sh5.h"
int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
int result = -1;
/* The complication here is that the PCI IRQ lines from the Cayman's 2
5V slots get into the CPU via a different path from the IRQ lines
from the 3 3.3V slots. Thus, we have to detect whether the card's
interrupts go via the 5V or 3.3V path, i.e. the 'bridge swizzling'
at the point where we cross from 5V to 3.3V is not the normal case.
The added complication is that we don't know that the 5V slots are
always bus 2, because a card containing a PCI-PCI bridge may be
plugged into a 3.3V slot, and this changes the bus numbering.
Also, the Cayman has an intermediate PCI bus that goes a custom
expansion board header (and to the secondary bridge). This bus has
never been used in practice.
The 1ary onboard PCI-PCI bridge is device 3 on bus 0
The 2ary onboard PCI-PCI bridge is device 0 on the 2ary bus of
the 1ary bridge.
*/
struct slot_pin {
int slot;
int pin;
} path[4];
int i=0;
while (dev->bus->number > 0) {
slot = path[i].slot = PCI_SLOT(dev->devfn);
pin = path[i].pin = pci_swizzle_interrupt_pin(dev, pin);
dev = dev->bus->self;
i++;
if (i > 3) panic("PCI path to root bus too long!\n");
}
slot = PCI_SLOT(dev->devfn);
/* This is the slot on bus 0 through which the device is eventually
reachable. */
/* Now work back up. */
if ((slot < 3) || (i == 0)) {
/* Bus 0 (incl. PCI-PCI bridge itself) : perform the final
swizzle now. */
result = IRQ_INTA + pci_swizzle_interrupt_pin(dev, pin) - 1;
} else {
i--;
slot = path[i].slot;
pin = path[i].pin;
if (slot > 0) {
panic("PCI expansion bus device found - not handled!\n");
} else {
if (i > 0) {
/* 5V slots */
i--;
slot = path[i].slot;
pin = path[i].pin;
/* 'pin' was swizzled earlier wrt slot, don't do it again. */
result = IRQ_P2INTA + (pin - 1);
} else {
/* IRQ for 2ary PCI-PCI bridge : unused */
result = -1;
}
}
}
return result;
}

23
arch/sh/drivers/pci/pci-sh7780.c
View File

@@ -148,7 +148,7 @@ static irqreturn_t sh7780_pci_serr_irq(int irq, void *dev_id)
printk(KERN_DEBUG "PCI: system error received: ");
pcibios_report_status(PCI_STATUS_SIG_SYSTEM_ERROR, 1);
printk("\n");
pr_cont("\n");
/* Deassert SERR */
__raw_writel(SH4_PCIINTM_SDIM, hose->reg_base + SH4_PCIINTM);
@@ -179,7 +179,7 @@ static int __init sh7780_pci_setup_irqs(struct pci_channel *hose)
ret = request_irq(hose->serr_irq, sh7780_pci_serr_irq, 0,
"PCI SERR interrupt", hose);
if (unlikely(ret)) {
printk(KERN_ERR "PCI: Failed hooking SERR IRQ\n");
pr_err("PCI: Failed hooking SERR IRQ\n");
return ret;
}
@@ -250,7 +250,7 @@ static int __init sh7780_pci_init(void)
const char *type;
int ret, i;
printk(KERN_NOTICE "PCI: Starting initialization.\n");
pr_notice("PCI: Starting initialization.\n");
chan->reg_base = 0xfe040000;
@@ -270,7 +270,7 @@ static int __init sh7780_pci_init(void)
id = __raw_readw(chan->reg_base + PCI_VENDOR_ID);
if (id != PCI_VENDOR_ID_RENESAS) {
printk(KERN_ERR "PCI: Unknown vendor ID 0x%04x.\n", id);
pr_err("PCI: Unknown vendor ID 0x%04x.\n", id);
return -ENODEV;
}
@@ -281,14 +281,13 @@ static int __init sh7780_pci_init(void)
(id == PCI_DEVICE_ID_RENESAS_SH7785) ? "SH7785" :
NULL;
if (unlikely(!type)) {
printk(KERN_ERR "PCI: Found an unsupported Renesas host "
"controller, device id 0x%04x.\n", id);
pr_err("PCI: Found an unsupported Renesas host controller, device id 0x%04x.\n",
id);
return -EINVAL;
}
printk(KERN_NOTICE "PCI: Found a Renesas %s host "
"controller, revision %d.\n", type,
__raw_readb(chan->reg_base + PCI_REVISION_ID));
pr_notice("PCI: Found a Renesas %s host controller, revision %d.\n",
type, __raw_readb(chan->reg_base + PCI_REVISION_ID));
/*
* Now throw it in to register initialization mode and
@@ -395,9 +394,9 @@ static int __init sh7780_pci_init(void)
sh7780_pci66_init(chan);
printk(KERN_NOTICE "PCI: Running at %dMHz.\n",
(__raw_readw(chan->reg_base + PCI_STATUS) & PCI_STATUS_66MHZ) ?
66 : 33);
pr_notice("PCI: Running at %dMHz.\n",
(__raw_readw(chan->reg_base + PCI_STATUS) & PCI_STATUS_66MHZ)
? 66 : 33);
return 0;

11
arch/sh/drivers/pci/pci.c
View File

@@ -120,8 +120,7 @@ int register_pci_controller(struct pci_channel *hose)
* Do not panic here but later - this might happen before console init.
*/
if (!hose->io_map_base) {
printk(KERN_WARNING
"registering PCI controller with io_map_base unset\n");
pr_warn("registering PCI controller with io_map_base unset\n");
}
/*
@@ -145,7 +144,7 @@ out:
for (--i; i >= 0; i--)
release_resource(&hose->resources[i]);
printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
pr_warn("Skipping PCI bus scan due to resource conflict\n");
return -1;
}
@@ -213,8 +212,8 @@ pcibios_bus_report_status_early(struct pci_channel *hose,
pci_devfn, PCI_STATUS,
status & status_mask);
if (warn)
printk("(%02x:%02x: %04X) ", current_bus,
pci_devfn, status);
pr_cont("(%02x:%02x: %04X) ", current_bus, pci_devfn,
status);
}
}
@@ -249,7 +248,7 @@ pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
pci_write_config_word(dev, PCI_STATUS, status & status_mask);
if (warn)
printk("(%s: %04X) ", pci_name(dev), status);
pr_cont("(%s: %04X) ", pci_name(dev), status);
}
list_for_each_entry(dev, &bus->devices, bus_list)

2
arch/sh/include/asm/adc.h
View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_ADC_H
#define __ASM_ADC_H
#ifdef __KERNEL__
/*
* Copyright (C) 2004 Andriy Skulysh
*/
@@ -10,5 +9,4 @@
int adc_single(unsigned int channel);
#endif /* __KERNEL__ */
#endif /* __ASM_ADC_H */

3
arch/sh/include/asm/addrspace.h
View File

@@ -7,8 +7,6 @@
#ifndef __ASM_SH_ADDRSPACE_H
#define __ASM_SH_ADDRSPACE_H
#ifdef __KERNEL__
#include <cpu/addrspace.h>
/* If this CPU supports segmentation, hook up the helpers */
@@ -62,5 +60,4 @@
#define P3_ADDR_MAX P4SEG
#endif
#endif /* __KERNEL__ */
#endif /* __ASM_SH_ADDRSPACE_H */

4
arch/sh/include/asm/bitops.h
View File

@@ -2,8 +2,6 @@
#ifndef __ASM_SH_BITOPS_H
#define __ASM_SH_BITOPS_H
#ifdef __KERNEL__
#ifndef _LINUX_BITOPS_H
#error only <linux/bitops.h> can be included directly
#endif
@@ -71,6 +69,4 @@ static inline unsigned long __ffs(unsigned long word)
#include <asm-generic/bitops/__fls.h>
#include <asm-generic/bitops/fls64.h>
#endif /* __KERNEL__ */
#endif /* __ASM_SH_BITOPS_H */

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