mirror of
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BananaPi BPI-F3: Update u-boot and linux patching
Signed-off-by: Patrick Yavitz <pyavitz@gmail.com>
This commit is contained in:
committed by
c0rnelius
parent
7b6fcab372
commit
df9ddaf44e
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,331 +0,0 @@
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From 41a15ab971400502e93bbbf0d7336fa81daf25c9 Mon Sep 17 00:00:00 2001
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From: James Deng <james.deng@spacemit.com>
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Date: Tue, 30 Apr 2024 17:48:07 +0800
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Subject: Update for v1.0rc1
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---
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include/sbi_utils/cache/cacheflush.h | 34 +++++++++-----
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lib/sbi/sbi_hsm.c | 2 +-
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lib/utils/psci/psci_private.h | 2 +-
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.../spacemit/plat/k1x/underly_implement.c | 37 ---------------
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lib/utils/psci/spacemit/plat/plat_pm.c | 4 +-
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.../generic/include/spacemit/k1x/k1x_evb.h | 44 ++++++++++++++++-
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.../generic/include/spacemit/k1x/k1x_fpga.h | 47 +++++++++++++++++--
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platform/generic/spacemit/spacemit_k1.c | 13 +++++
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8 files changed, 126 insertions(+), 57 deletions(-)
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diff --git a/include/sbi_utils/cache/cacheflush.h b/include/sbi_utils/cache/cacheflush.h
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index c3e353229f75..126931b25888 100644
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--- a/include/sbi_utils/cache/cacheflush.h
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+++ b/include/sbi_utils/cache/cacheflush.h
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@@ -167,26 +167,34 @@ static inline void __mdelay(void)
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cpu_relax();
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}
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-static inline void csi_flush_l2_cache(void)
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+static inline void csi_flush_l2_cache(bool hw)
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{
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unsigned int hartid = current_hartid();
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uintptr_t *cr =(MPIDR_AFFLVL1_VAL(hartid) == 0) ? (uintptr_t *)CLUSTER0_L2_CACHE_FLUSH_REG_BASE :
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(uintptr_t *)CLUSTER1_L2_CACHE_FLUSH_REG_BASE;
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- /* flush l2 cache */
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- writel(readl(cr) | (1 << L2_CACHE_FLUSH_REQUEST_BIT_OFFSET), cr);
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- /* k1pro */
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- if (L2_CACHE_FLUSH_REQUEST_BIT_OFFSET == L2_CACHE_FLUSH_DONE_BIT_OFFSET)
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- while (readl(cr) & (1 << L2_CACHE_FLUSH_DONE_BIT_OFFSET));
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- else /* k1x */ {
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- /* clear the request */
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- while (1) {
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- if ((readl(cr) & (1 << L2_CACHE_FLUSH_DONE_BIT_OFFSET)) == 0)
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- break;
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- __mdelay();
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+ if (!hw) {
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+ writel(0x0, cr);
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+ /* flush l2 cache */
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+ writel(readl(cr) | (1 << L2_CACHE_FLUSH_REQUEST_BIT_OFFSET), cr);
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+ /* k1pro */
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+ if (L2_CACHE_FLUSH_REQUEST_BIT_OFFSET == L2_CACHE_FLUSH_DONE_BIT_OFFSET)
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+ while (readl(cr) & (1 << L2_CACHE_FLUSH_DONE_BIT_OFFSET));
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+ else /* k1x */ {
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+ /* clear the request */
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+ while (1) {
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+ if ((readl(cr) & (1 << L2_CACHE_FLUSH_DONE_BIT_OFFSET)) == 0)
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+ break;
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+ __mdelay();
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+ }
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+ writel(readl(cr) & ~(1 << L2_CACHE_FLUSH_REQUEST_BIT_OFFSET), cr);
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}
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- writel(readl(cr) & ~(1 << L2_CACHE_FLUSH_REQUEST_BIT_OFFSET), cr);
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+ } else {
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+ /* k1pro */
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+ if (L2_CACHE_FLUSH_REQUEST_BIT_OFFSET == L2_CACHE_FLUSH_DONE_BIT_OFFSET)
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+ return /* do nothing */;
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+ writel((1 << L2_CACHE_FLUSH_HW_TYPE_BIT_OFFSET) | (1 << L2_CACHE_FLUSH_HW_EN_BIT_OFFSET), cr);
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}
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}
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#endif
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diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
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index acd3c9e04c87..51c982ad7b78 100644
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--- a/lib/sbi/sbi_hsm.c
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+++ b/lib/sbi/sbi_hsm.c
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@@ -183,7 +183,7 @@ void __noreturn sbi_hsm_hart_start_finish(struct sbi_scratch *scratch,
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* */
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if (cool_boot) {
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csi_flush_dcache_all();
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- csi_flush_l2_cache();
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+ csi_flush_l2_cache(0);
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}
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sbi_hart_switch_mode(hartid, next_arg1, next_addr, next_mode, false);
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diff --git a/lib/utils/psci/psci_private.h b/lib/utils/psci/psci_private.h
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index c768d3f379ab..0a3f260f5c39 100644
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--- a/lib/utils/psci/psci_private.h
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+++ b/lib/utils/psci/psci_private.h
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@@ -182,7 +182,7 @@ static inline void psci_do_pwrdown_cache_maintenance(int hartid, uintptr_t scrat
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/* disable the tcm */
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csr_write(CSR_TCMCFG, 0);
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#endif
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- csi_flush_l2_cache();
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+ csi_flush_l2_cache(0);
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}
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/* disable dcache */
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diff --git a/lib/utils/psci/spacemit/plat/k1x/underly_implement.c b/lib/utils/psci/spacemit/plat/k1x/underly_implement.c
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index 279e6d5dc741..73feec440d27 100644
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--- a/lib/utils/psci/spacemit/plat/k1x/underly_implement.c
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+++ b/lib/utils/psci/spacemit/plat/k1x/underly_implement.c
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@@ -5,43 +5,6 @@
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#include <sbi/sbi_console.h>
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#include <spacemit/spacemit_config.h>
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-#define C1_CPU_RESET_BASE_ADDR (0xD4282B24)
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-
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-#define PMU_CAP_CORE0_IDLE_CFG (0xd4282924)
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-#define PMU_CAP_CORE1_IDLE_CFG (0xd4282928)
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-#define PMU_CAP_CORE2_IDLE_CFG (0xd4282960)
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-#define PMU_CAP_CORE3_IDLE_CFG (0xd4282964)
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-#define PMU_CAP_CORE4_IDLE_CFG (0xd4282b04)
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-#define PMU_CAP_CORE5_IDLE_CFG (0xd4282b08)
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-#define PMU_CAP_CORE6_IDLE_CFG (0xd4282b0c)
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-#define PMU_CAP_CORE7_IDLE_CFG (0xd4282b10)
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-
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-#define PMU_C0_CAPMP_IDLE_CFG0 (0xd4282920)
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-#define PMU_C0_CAPMP_IDLE_CFG1 (0xd42828e4)
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-#define PMU_C0_CAPMP_IDLE_CFG2 (0xd4282950)
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-#define PMU_C0_CAPMP_IDLE_CFG3 (0xd4282954)
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-#define PMU_C1_CAPMP_IDLE_CFG0 (0xd4282b14)
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-#define PMU_C1_CAPMP_IDLE_CFG1 (0xd4282b18)
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-#define PMU_C1_CAPMP_IDLE_CFG2 (0xd4282b1c)
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-#define PMU_C1_CAPMP_IDLE_CFG3 (0xd4282b20)
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-
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-#define PMU_ACPR_CLUSTER0_REG (0xd4051090)
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-#define PMU_ACPR_CLUSTER1_REG (0xd4051094)
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-#define PMU_ACPR_UNKONW_REG (0xd4050038)
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-
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-
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-#define CPU_PWR_DOWN_VALUE (0x3)
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-#define CLUSTER_PWR_DOWN_VALUE (0x3)
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-#define CLUSTER_AXISDO_OFFSET (31)
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-#define CLUSTER_DDRSD_OFFSET (27)
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-#define CLUSTER_APBSD_OFFSET (26)
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-#define CLUSTER_VCXOSD_OFFSET (19)
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-#define CLUSTER_BIT29_OFFSET (29)
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-#define CLUSTER_BIT14_OFFSET (14)
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-#define CLUSTER_BIT30_OFFSET (30)
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-#define CLUSTER_BIT25_OFFSET (25)
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-#define CLUSTER_BIT13_OFFSET (13)
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-
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struct pmu_cap_wakeup {
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unsigned int pmu_cap_core0_wakeup;
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unsigned int pmu_cap_core1_wakeup;
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diff --git a/lib/utils/psci/spacemit/plat/plat_pm.c b/lib/utils/psci/spacemit/plat/plat_pm.c
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index da6f958157fa..a5b91270834f 100644
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--- a/lib/utils/psci/spacemit/plat/plat_pm.c
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+++ b/lib/utils/psci/spacemit/plat/plat_pm.c
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@@ -7,6 +7,7 @@
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#include <sbi/sbi_console.h>
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#include <sbi_utils/psci/plat/arm/common/arm_def.h>
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#include <sbi_utils/irqchip/fdt_irqchip_plic.h>
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+#include <sbi_utils/cache/cacheflush.h>
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#include "underly_implement.h"
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#define CORE_PWR_STATE(state) \
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@@ -81,6 +82,7 @@ static void spacemit_pwr_domain_off(const psci_power_state_t *target_state)
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#endif
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cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(hartid));
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spacemit_cluster_off(hartid);
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+ csi_flush_l2_cache(1);
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}
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if (SYSTEM_PWR_STATE(target_state) == ARM_LOCAL_STATE_OFF) {
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@@ -180,8 +182,8 @@ static void spacemit_pwr_domain_suspend(const psci_power_state_t *target_state)
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csr_write(CSR_TCMCFG, 0);
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#endif
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cci_disable_snoop_dvm_reqs(clusterid);
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-
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spacemit_cluster_off(hartid);
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+ csi_flush_l2_cache(1);
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}
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if (SYSTEM_PWR_STATE(target_state) == ARM_LOCAL_STATE_OFF) {
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diff --git a/platform/generic/include/spacemit/k1x/k1x_evb.h b/platform/generic/include/spacemit/k1x/k1x_evb.h
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index b951105e0c04..5f5b672a61a6 100644
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--- a/platform/generic/include/spacemit/k1x/k1x_evb.h
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+++ b/platform/generic/include/spacemit/k1x/k1x_evb.h
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@@ -24,6 +24,45 @@
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#define C1_RVBADDR_LO_ADDR (0xD4282C00 + 0x2B0)
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#define C1_RVBADDR_HI_ADDR (0xD4282C00 + 0X2B4)
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+#define C1_CPU_RESET_BASE_ADDR (0xD4282B24)
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+
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+#define PMU_CAP_CORE0_IDLE_CFG (0xd4282924)
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+#define PMU_CAP_CORE1_IDLE_CFG (0xd4282928)
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+#define PMU_CAP_CORE2_IDLE_CFG (0xd4282960)
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+#define PMU_CAP_CORE3_IDLE_CFG (0xd4282964)
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+#define PMU_CAP_CORE4_IDLE_CFG (0xd4282b04)
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+#define PMU_CAP_CORE5_IDLE_CFG (0xd4282b08)
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+#define PMU_CAP_CORE6_IDLE_CFG (0xd4282b0c)
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+#define PMU_CAP_CORE7_IDLE_CFG (0xd4282b10)
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+
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+#define PMU_C0_CAPMP_IDLE_CFG0 (0xd4282920)
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+#define PMU_C0_CAPMP_IDLE_CFG1 (0xd42828e4)
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+#define PMU_C0_CAPMP_IDLE_CFG2 (0xd4282950)
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+#define PMU_C0_CAPMP_IDLE_CFG3 (0xd4282954)
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+#define PMU_C1_CAPMP_IDLE_CFG0 (0xd4282b14)
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+#define PMU_C1_CAPMP_IDLE_CFG1 (0xd4282b18)
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+#define PMU_C1_CAPMP_IDLE_CFG2 (0xd4282b1c)
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+#define PMU_C1_CAPMP_IDLE_CFG3 (0xd4282b20)
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+
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+#define PMU_ACPR_CLUSTER0_REG (0xd4051090)
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+#define PMU_ACPR_CLUSTER1_REG (0xd4051094)
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+#define PMU_ACPR_UNKONW_REG (0xd4050038)
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+
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+
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+#define CPU_PWR_DOWN_VALUE (0x3)
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+#define CLUSTER_PWR_DOWN_VALUE (0x3)
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+#define CLUSTER_AXISDO_OFFSET (31)
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+#define CLUSTER_DDRSD_OFFSET (27)
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+#define CLUSTER_APBSD_OFFSET (26)
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+#define CLUSTER_VCXOSD_OFFSET (19)
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+#define CLUSTER_BIT29_OFFSET (29)
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+#define CLUSTER_BIT14_OFFSET (14)
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+#define CLUSTER_BIT30_OFFSET (30)
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+#define CLUSTER_BIT25_OFFSET (25)
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+#define CLUSTER_BIT13_OFFSET (13)
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+
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+#define L2_HARDWARE_CACHE_FLUSH_EN (13)
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+
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/***************************mailbox***************************/
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#define SCMI_MAILBOX_SHARE_MEM (0x2f902080)
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#define PLAT_MAILBOX_REG_BASE (0x2f824000)
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@@ -66,7 +105,10 @@
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#define CLUSTER0_L2_CACHE_FLUSH_REG_BASE (0xD84401B0)
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#define CLUSTER1_L2_CACHE_FLUSH_REG_BASE (0xD84401B4)
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-#define L2_CACHE_FLUSH_REQUEST_BIT_OFFSET (0x1)
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+#define L2_CACHE_FLUSH_REQUEST_BIT_OFFSET (0x1) /* sw flush l2 cache */
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#define L2_CACHE_FLUSH_DONE_BIT_OFFSET (0x3)
|
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|
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+#define L2_CACHE_FLUSH_HW_TYPE_BIT_OFFSET (0)
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+#define L2_CACHE_FLUSH_HW_EN_BIT_OFFSET (0x2)
|
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+
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#endif /* __K1X_EVB_CONFIG_H__ */
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diff --git a/platform/generic/include/spacemit/k1x/k1x_fpga.h b/platform/generic/include/spacemit/k1x/k1x_fpga.h
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index 4748c86b69c2..3d8964c861c4 100644
|
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--- a/platform/generic/include/spacemit/k1x/k1x_fpga.h
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+++ b/platform/generic/include/spacemit/k1x/k1x_fpga.h
|
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@@ -24,13 +24,51 @@
|
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#define C1_RVBADDR_LO_ADDR (0xD4282C00 + 0x2B0)
|
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#define C1_RVBADDR_HI_ADDR (0xD4282C00 + 0X2B4)
|
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|
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+#define C1_CPU_RESET_BASE_ADDR (0xD4282B24)
|
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+
|
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+#define PMU_CAP_CORE0_IDLE_CFG (0xd4282924)
|
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+#define PMU_CAP_CORE1_IDLE_CFG (0xd4282928)
|
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+#define PMU_CAP_CORE2_IDLE_CFG (0xd4282960)
|
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+#define PMU_CAP_CORE3_IDLE_CFG (0xd4282964)
|
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+#define PMU_CAP_CORE4_IDLE_CFG (0xd4282b04)
|
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+#define PMU_CAP_CORE5_IDLE_CFG (0xd4282b08)
|
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+#define PMU_CAP_CORE6_IDLE_CFG (0xd4282b0c)
|
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+#define PMU_CAP_CORE7_IDLE_CFG (0xd4282b10)
|
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+
|
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+#define PMU_C0_CAPMP_IDLE_CFG0 (0xd4282920)
|
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+#define PMU_C0_CAPMP_IDLE_CFG1 (0xd42828e4)
|
||||
+#define PMU_C0_CAPMP_IDLE_CFG2 (0xd4282950)
|
||||
+#define PMU_C0_CAPMP_IDLE_CFG3 (0xd4282954)
|
||||
+#define PMU_C1_CAPMP_IDLE_CFG0 (0xd4282b14)
|
||||
+#define PMU_C1_CAPMP_IDLE_CFG1 (0xd4282b18)
|
||||
+#define PMU_C1_CAPMP_IDLE_CFG2 (0xd4282b1c)
|
||||
+#define PMU_C1_CAPMP_IDLE_CFG3 (0xd4282b20)
|
||||
+
|
||||
+#define PMU_ACPR_CLUSTER0_REG (0xd4051090)
|
||||
+#define PMU_ACPR_CLUSTER1_REG (0xd4051094)
|
||||
+#define PMU_ACPR_UNKONW_REG (0xd4050038)
|
||||
+
|
||||
+
|
||||
+#define CPU_PWR_DOWN_VALUE (0x3)
|
||||
+#define CLUSTER_PWR_DOWN_VALUE (0x3)
|
||||
+#define CLUSTER_AXISDO_OFFSET (31)
|
||||
+#define CLUSTER_DDRSD_OFFSET (27)
|
||||
+#define CLUSTER_APBSD_OFFSET (26)
|
||||
+#define CLUSTER_VCXOSD_OFFSET (19)
|
||||
+#define CLUSTER_BIT29_OFFSET (29)
|
||||
+#define CLUSTER_BIT14_OFFSET (14)
|
||||
+#define CLUSTER_BIT30_OFFSET (30)
|
||||
+#define CLUSTER_BIT25_OFFSET (25)
|
||||
+#define CLUSTER_BIT13_OFFSET (13)
|
||||
+
|
||||
+#define L2_HARDWARE_CACHE_FLUSH_EN (13)
|
||||
+
|
||||
/***************************mailbox***************************/
|
||||
#define SCMI_MAILBOX_SHARE_MEM (0x2f902080)
|
||||
#define PLAT_MAILBOX_REG_BASE (0x2f824000)
|
||||
|
||||
/****************************scmi*****************************/
|
||||
-#define PLAT_SCMI_SINGLE_CLUSTER_DOMAIN_MAP {0, 1, 2, 3}
|
||||
-#define PLAT_SCMI_DOUBLE_CLUSTER_DOMAIN_MAP {0, 1, 4, 5}
|
||||
+#define PLAT_SCMI_DOMAIN_MAP {0, 1, 2, 3}
|
||||
|
||||
/*************************cpu topology************************/
|
||||
#define ARM_SYSTEM_COUNT (1U)
|
||||
@@ -67,7 +105,10 @@
|
||||
#define CLUSTER0_L2_CACHE_FLUSH_REG_BASE (0xD84401B0)
|
||||
#define CLUSTER1_L2_CACHE_FLUSH_REG_BASE (0xD84401B4)
|
||||
|
||||
-#define L2_CACHE_FLUSH_REQUEST_BIT_OFFSET (0x1)
|
||||
+#define L2_CACHE_FLUSH_REQUEST_BIT_OFFSET (0x1) /* sw flush l2 cache */
|
||||
#define L2_CACHE_FLUSH_DONE_BIT_OFFSET (0x3)
|
||||
|
||||
+#define L2_CACHE_FLUSH_HW_TYPE_BIT_OFFSET (0)
|
||||
+#define L2_CACHE_FLUSH_HW_EN_BIT_OFFSET (0x2)
|
||||
+
|
||||
#endif /* __K1X_FPGA_CONFIG_H__ */
|
||||
diff --git a/platform/generic/spacemit/spacemit_k1.c b/platform/generic/spacemit/spacemit_k1.c
|
||||
index 38794c2dfbb5..95218846715f 100644
|
||||
--- a/platform/generic/spacemit/spacemit_k1.c
|
||||
+++ b/platform/generic/spacemit/spacemit_k1.c
|
||||
@@ -65,6 +65,19 @@ static void wakeup_other_core(void)
|
||||
unsigned char *cpu_topology = plat_get_power_domain_tree_desc();
|
||||
#endif
|
||||
|
||||
+#if defined(CONFIG_PLATFORM_SPACEMIT_K1X)
|
||||
+ /* enable the hw l2 cache flush method for each core */
|
||||
+ writel(readl((u32 *)PMU_C0_CAPMP_IDLE_CFG0) | (1 << L2_HARDWARE_CACHE_FLUSH_EN), (u32 *)PMU_C0_CAPMP_IDLE_CFG0);
|
||||
+ writel(readl((u32 *)PMU_C0_CAPMP_IDLE_CFG1) | (1 << L2_HARDWARE_CACHE_FLUSH_EN), (u32 *)PMU_C0_CAPMP_IDLE_CFG1);
|
||||
+ writel(readl((u32 *)PMU_C0_CAPMP_IDLE_CFG2) | (1 << L2_HARDWARE_CACHE_FLUSH_EN), (u32 *)PMU_C0_CAPMP_IDLE_CFG2);
|
||||
+ writel(readl((u32 *)PMU_C0_CAPMP_IDLE_CFG3) | (1 << L2_HARDWARE_CACHE_FLUSH_EN), (u32 *)PMU_C0_CAPMP_IDLE_CFG3);
|
||||
+
|
||||
+ writel(readl((u32 *)PMU_C1_CAPMP_IDLE_CFG0) | (1 << L2_HARDWARE_CACHE_FLUSH_EN), (u32 *)PMU_C1_CAPMP_IDLE_CFG0);
|
||||
+ writel(readl((u32 *)PMU_C1_CAPMP_IDLE_CFG1) | (1 << L2_HARDWARE_CACHE_FLUSH_EN), (u32 *)PMU_C1_CAPMP_IDLE_CFG1);
|
||||
+ writel(readl((u32 *)PMU_C1_CAPMP_IDLE_CFG2) | (1 << L2_HARDWARE_CACHE_FLUSH_EN), (u32 *)PMU_C1_CAPMP_IDLE_CFG2);
|
||||
+ writel(readl((u32 *)PMU_C1_CAPMP_IDLE_CFG3) | (1 << L2_HARDWARE_CACHE_FLUSH_EN), (u32 *)PMU_C1_CAPMP_IDLE_CFG3);
|
||||
+#endif
|
||||
+
|
||||
// hart0 is already boot up
|
||||
for (i = 0; i < platform.hart_count; i++) {
|
||||
hartid = platform.hart_index2id[i];
|
||||
--
|
||||
2.35.3
|
||||
|
||||
@@ -1,42 +0,0 @@
|
||||
From ce6e8eec55a62d9e4cb5f5a767e50e9d0c2659ff Mon Sep 17 00:00:00 2001
|
||||
From: James Deng <james.deng@spacemit.com>
|
||||
Date: Thu, 30 May 2024 23:19:43 +0800
|
||||
Subject: Update for v1.0
|
||||
|
||||
---
|
||||
debian/opensbi-spacemit.postinst | 9 ++++++++-
|
||||
1 file changed, 8 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/debian/opensbi-spacemit.postinst b/debian/opensbi-spacemit.postinst
|
||||
index 1f6feca80674..9ce082ef548b 100755
|
||||
--- a/debian/opensbi-spacemit.postinst
|
||||
+++ b/debian/opensbi-spacemit.postinst
|
||||
@@ -22,9 +22,16 @@ configure)
|
||||
case $ROOT in
|
||||
"/dev/mmcblk0"*)
|
||||
OPENSBI=/dev/mmcblk0p3
|
||||
+ OPENSBI_SEEK=0
|
||||
;;
|
||||
"/dev/mmcblk2"*)
|
||||
OPENSBI=/dev/mmcblk2p3
|
||||
+ OPENSBI_SEEK=0
|
||||
+ ;;
|
||||
+ "/dev/nvme0n1"*)
|
||||
+ OPENSBI=/dev/mtdblock0
|
||||
+ # 以KB为单位
|
||||
+ OPENSBI_SEEK=448
|
||||
;;
|
||||
*)
|
||||
echo "Unsupported root=$ROOT"
|
||||
@@ -37,7 +44,7 @@ configure)
|
||||
fi
|
||||
|
||||
if [ -n "$target" ] && [ -e $OPENSBI ]; then
|
||||
- dd if=/usr/lib/riscv64-linux-gnu/opensbi/generic/fw_dynamic.itb of=$OPENSBI bs=1 && sync
|
||||
+ dd if=/usr/lib/riscv64-linux-gnu/opensbi/generic/fw_dynamic.itb of=$OPENSBI seek=$OPENSBI_SEEK bs=1K && sync
|
||||
fi
|
||||
;;
|
||||
esac
|
||||
--
|
||||
2.35.3
|
||||
|
||||
@@ -1,86 +0,0 @@
|
||||
From 6f1344573d4ce0638d24d960e9a7d5ff1b0426b6 Mon Sep 17 00:00:00 2001
|
||||
From: James Deng <james.deng@spacemit.com>
|
||||
Date: Wed, 19 Jun 2024 15:18:09 +0800
|
||||
Subject: Update for v1.0.3
|
||||
|
||||
---
|
||||
.../spacemit/plat/k1x/underly_implement.c | 24 ++++++++++++++++++-
|
||||
.../generic/include/spacemit/k1x/k1x_evb.h | 4 ++--
|
||||
2 files changed, 25 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/lib/utils/psci/spacemit/plat/k1x/underly_implement.c b/lib/utils/psci/spacemit/plat/k1x/underly_implement.c
|
||||
index 73feec440d27..654da2d1a926 100644
|
||||
--- a/lib/utils/psci/spacemit/plat/k1x/underly_implement.c
|
||||
+++ b/lib/utils/psci/spacemit/plat/k1x/underly_implement.c
|
||||
@@ -44,6 +44,12 @@ void spacemit_top_on(u_register_t mpidr)
|
||||
(1 << CLUSTER_BIT25_OFFSET) |
|
||||
(1 << CLUSTER_BIT13_OFFSET));
|
||||
writel(value, cluster1_acpr);
|
||||
+
|
||||
+ /* enable the gpio edge detected function again
|
||||
+ * */
|
||||
+ value = readl((unsigned int *)0xd4051000);
|
||||
+ value &= ~(1 << 21);
|
||||
+ writel(value, (unsigned int *)0xd4051000);
|
||||
}
|
||||
|
||||
/* D1P & D2 ? */
|
||||
@@ -60,6 +66,7 @@ void spacemit_top_off(u_register_t mpidr)
|
||||
(1 << CLUSTER_DDRSD_OFFSET) |
|
||||
(1 << CLUSTER_APBSD_OFFSET) |
|
||||
(1 << CLUSTER_VCXOSD_OFFSET) |
|
||||
+ (1 << 3) |
|
||||
(1 << CLUSTER_BIT29_OFFSET) |
|
||||
(1 << CLUSTER_BIT14_OFFSET) |
|
||||
(1 << CLUSTER_BIT30_OFFSET) |
|
||||
@@ -72,6 +79,7 @@ void spacemit_top_off(u_register_t mpidr)
|
||||
(1 << CLUSTER_DDRSD_OFFSET) |
|
||||
(1 << CLUSTER_APBSD_OFFSET) |
|
||||
(1 << CLUSTER_VCXOSD_OFFSET) |
|
||||
+ (1 << 3) |
|
||||
(1 << CLUSTER_BIT29_OFFSET) |
|
||||
(1 << CLUSTER_BIT14_OFFSET) |
|
||||
(1 << CLUSTER_BIT30_OFFSET) |
|
||||
@@ -80,9 +88,23 @@ void spacemit_top_off(u_register_t mpidr)
|
||||
writel(value, cluster1_acpr);
|
||||
|
||||
value = readl((unsigned int *)PMU_ACPR_UNKONW_REG);
|
||||
- value |= (1 << 2);
|
||||
+ value |= (1 << 2) | (1 << 0);
|
||||
writel(value, (unsigned int *)PMU_ACPR_UNKONW_REG);
|
||||
|
||||
+ /* disable the gpio edge detect function
|
||||
+ * this may cause the system cann't enter D2
|
||||
+ * */
|
||||
+ value = readl((unsigned int *)0xd4051000);
|
||||
+ value |= (1 << 21);
|
||||
+ writel(value, (unsigned int *)0xd4051000);
|
||||
+
|
||||
+ /* enable the refbuf function which will enhance the
|
||||
+ * driving capability of the internal 26M to PLL path
|
||||
+ * */
|
||||
+ value = readl((unsigned int *)0xd4090104);
|
||||
+ value |= (1 << 22);
|
||||
+ writel(value, (unsigned int *)0xd4090104);
|
||||
+
|
||||
/* for wakeup debug */
|
||||
writel(0xffff, (unsigned int *)0xd4051030);
|
||||
}
|
||||
diff --git a/platform/generic/include/spacemit/k1x/k1x_evb.h b/platform/generic/include/spacemit/k1x/k1x_evb.h
|
||||
index 5f5b672a61a6..10e856965618 100644
|
||||
--- a/platform/generic/include/spacemit/k1x/k1x_evb.h
|
||||
+++ b/platform/generic/include/spacemit/k1x/k1x_evb.h
|
||||
@@ -49,8 +49,8 @@
|
||||
#define PMU_ACPR_UNKONW_REG (0xd4050038)
|
||||
|
||||
|
||||
-#define CPU_PWR_DOWN_VALUE (0x3)
|
||||
-#define CLUSTER_PWR_DOWN_VALUE (0x3)
|
||||
+#define CPU_PWR_DOWN_VALUE (0x1b)
|
||||
+#define CLUSTER_PWR_DOWN_VALUE (0x7)
|
||||
#define CLUSTER_AXISDO_OFFSET (31)
|
||||
#define CLUSTER_DDRSD_OFFSET (27)
|
||||
#define CLUSTER_APBSD_OFFSET (26)
|
||||
--
|
||||
2.35.3
|
||||
|
||||
@@ -1,94 +0,0 @@
|
||||
From 94bf83cc0bd1c86e51f48174fa17e23427903c59 Mon Sep 17 00:00:00 2001
|
||||
From: James Deng <james.deng@spacemit.com>
|
||||
Date: Thu, 11 Jul 2024 14:56:36 +0800
|
||||
Subject: Update for v1.0.7
|
||||
|
||||
---
|
||||
debian/opensbi-spacemit.postinst | 24 ++++++++++++++-----
|
||||
.../spacemit/plat/k1x/underly_implement.c | 13 ----------
|
||||
2 files changed, 18 insertions(+), 19 deletions(-)
|
||||
|
||||
diff --git a/debian/opensbi-spacemit.postinst b/debian/opensbi-spacemit.postinst
|
||||
index 9ce082ef548b..dce7154ac8f4 100755
|
||||
--- a/debian/opensbi-spacemit.postinst
|
||||
+++ b/debian/opensbi-spacemit.postinst
|
||||
@@ -4,9 +4,11 @@ set -e
|
||||
case "$1" in
|
||||
configure)
|
||||
target=""
|
||||
- if grep -q '^spacemit' /sys/firmware/devicetree/base/model; then
|
||||
+ if grep -q '^spacemit' /sys/firmware/devicetree/base/model || grep -q '^spacemit' /sys/devices/soc0/family; then
|
||||
target="spacemit"
|
||||
else
|
||||
+ echo "Neither /sys/firmware/devicetree/base/model nor /sys/devices/soc0/family starts with 'spacemit'."
|
||||
+ echo "This may indicate that you are installing this package in a chroot environment."
|
||||
exit 0
|
||||
fi
|
||||
|
||||
@@ -35,17 +37,27 @@ configure)
|
||||
;;
|
||||
*)
|
||||
echo "Unsupported root=$ROOT"
|
||||
- exit 0
|
||||
+ exit 1
|
||||
;;
|
||||
esac
|
||||
else
|
||||
echo "Missing root= in cmdline"
|
||||
- exit 0
|
||||
+ exit 1
|
||||
fi
|
||||
|
||||
- if [ -n "$target" ] && [ -e $OPENSBI ]; then
|
||||
- dd if=/usr/lib/riscv64-linux-gnu/opensbi/generic/fw_dynamic.itb of=$OPENSBI seek=$OPENSBI_SEEK bs=1K && sync
|
||||
- fi
|
||||
+ # 待检查文件/分区列表
|
||||
+ files="/usr/lib/riscv64-linux-gnu/opensbi/generic/fw_dynamic.itb $OPENSBI"
|
||||
+ for file in $files; do
|
||||
+ if [ ! -e "$file" ]; then
|
||||
+ # 任意不存在则退出
|
||||
+ echo "Missing $file"
|
||||
+ exit 1
|
||||
+ fi
|
||||
+ done
|
||||
+
|
||||
+ # 此前已经做了所有检查
|
||||
+ dd if=/usr/lib/riscv64-linux-gnu/opensbi/generic/fw_dynamic.itb of=$OPENSBI seek=$OPENSBI_SEEK bs=1K && sync
|
||||
+
|
||||
;;
|
||||
esac
|
||||
|
||||
diff --git a/lib/utils/psci/spacemit/plat/k1x/underly_implement.c b/lib/utils/psci/spacemit/plat/k1x/underly_implement.c
|
||||
index 654da2d1a926..94d53bf51d0f 100644
|
||||
--- a/lib/utils/psci/spacemit/plat/k1x/underly_implement.c
|
||||
+++ b/lib/utils/psci/spacemit/plat/k1x/underly_implement.c
|
||||
@@ -44,12 +44,6 @@ void spacemit_top_on(u_register_t mpidr)
|
||||
(1 << CLUSTER_BIT25_OFFSET) |
|
||||
(1 << CLUSTER_BIT13_OFFSET));
|
||||
writel(value, cluster1_acpr);
|
||||
-
|
||||
- /* enable the gpio edge detected function again
|
||||
- * */
|
||||
- value = readl((unsigned int *)0xd4051000);
|
||||
- value &= ~(1 << 21);
|
||||
- writel(value, (unsigned int *)0xd4051000);
|
||||
}
|
||||
|
||||
/* D1P & D2 ? */
|
||||
@@ -91,13 +85,6 @@ void spacemit_top_off(u_register_t mpidr)
|
||||
value |= (1 << 2) | (1 << 0);
|
||||
writel(value, (unsigned int *)PMU_ACPR_UNKONW_REG);
|
||||
|
||||
- /* disable the gpio edge detect function
|
||||
- * this may cause the system cann't enter D2
|
||||
- * */
|
||||
- value = readl((unsigned int *)0xd4051000);
|
||||
- value |= (1 << 21);
|
||||
- writel(value, (unsigned int *)0xd4051000);
|
||||
-
|
||||
/* enable the refbuf function which will enhance the
|
||||
* driving capability of the internal 26M to PLL path
|
||||
* */
|
||||
--
|
||||
2.35.3
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,26 +0,0 @@
|
||||
From a26e37daaeb01f027e4753f854716f0f15eb3d13 Mon Sep 17 00:00:00 2001
|
||||
From: James Deng <james.deng@spacemit.com>
|
||||
Date: Fri, 16 Aug 2024 23:44:13 +0800
|
||||
Subject: Update for v1.0.13
|
||||
|
||||
---
|
||||
lib/utils/psci/spacemit/plat/plat_pm.c | 3 +++
|
||||
1 file changed, 3 insertions(+)
|
||||
|
||||
diff --git a/lib/utils/psci/spacemit/plat/plat_pm.c b/lib/utils/psci/spacemit/plat/plat_pm.c
|
||||
index 166bc3c7be1f..32aec9d308ab 100644
|
||||
--- a/lib/utils/psci/spacemit/plat/plat_pm.c
|
||||
+++ b/lib/utils/psci/spacemit/plat/plat_pm.c
|
||||
@@ -147,6 +147,9 @@ static void spacemit_pwr_domain_pwr_down_wfi(const psci_power_state_t *target_st
|
||||
spin_lock(&psciipi_lock);
|
||||
|
||||
if (sbi_hartmask_test_hart(hartid, &psciipi_wait_hmask)) {
|
||||
+
|
||||
+ sbi_hartmask_clear_hart(hartid, &psciipi_wait_hmask);
|
||||
+
|
||||
sbi_ipi_raw_clear(hartid);
|
||||
/* Restore MIE CSR */
|
||||
csr_write(CSR_MIE, saved_mie);
|
||||
--
|
||||
2.35.3
|
||||
|
||||
@@ -1,46 +0,0 @@
|
||||
From 6cf0c8e6ed09841cdbff7b3788efa608ac5b08aa Mon Sep 17 00:00:00 2001
|
||||
From: James Deng <james.deng@spacemit.com>
|
||||
Date: Sat, 31 Aug 2024 14:23:34 +0800
|
||||
Subject: Update for v1.0.14
|
||||
|
||||
---
|
||||
debian/opensbi-spacemit.postinst | 15 +++++++++++----
|
||||
1 file changed, 11 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/debian/opensbi-spacemit.postinst b/debian/opensbi-spacemit.postinst
|
||||
index dce7154ac8f4..0362a598a14b 100755
|
||||
--- a/debian/opensbi-spacemit.postinst
|
||||
+++ b/debian/opensbi-spacemit.postinst
|
||||
@@ -31,9 +31,15 @@ configure)
|
||||
OPENSBI_SEEK=0
|
||||
;;
|
||||
"/dev/nvme0n1"*)
|
||||
- OPENSBI=/dev/mtdblock0
|
||||
- # 以KB为单位
|
||||
- OPENSBI_SEEK=448
|
||||
+ if [ ! -e "/dev/mtdblock4" ]; then
|
||||
+ OPENSBI=/dev/mtdblock0
|
||||
+ # 以KB为单位
|
||||
+ OPENSBI_SEEK=448
|
||||
+ else
|
||||
+ OPENSBI=/dev/mtdblock4
|
||||
+ # 以KB为单位
|
||||
+ OPENSBI_SEEK=0
|
||||
+ fi
|
||||
;;
|
||||
*)
|
||||
echo "Unsupported root=$ROOT"
|
||||
@@ -56,8 +62,9 @@ configure)
|
||||
done
|
||||
|
||||
# 此前已经做了所有检查
|
||||
+ set -x
|
||||
dd if=/usr/lib/riscv64-linux-gnu/opensbi/generic/fw_dynamic.itb of=$OPENSBI seek=$OPENSBI_SEEK bs=1K && sync
|
||||
-
|
||||
+ set +x
|
||||
;;
|
||||
esac
|
||||
|
||||
--
|
||||
2.35.3
|
||||
|
||||
@@ -1,108 +0,0 @@
|
||||
From 08916e4fe06451080a8882d6955df9e5947e352e Mon Sep 17 00:00:00 2001
|
||||
From: James Deng <james.deng@spacemit.com>
|
||||
Date: Sat, 7 Sep 2024 21:08:45 +0800
|
||||
Subject: Update for v1.0.15
|
||||
|
||||
---
|
||||
.../spacemit/plat/k1x/underly_implement.c | 20 ++++++++++++++
|
||||
lib/utils/psci/spacemit/plat/plat_pm.c | 27 +++++++++++--------
|
||||
.../psci/spacemit/plat/underly_implement.h | 1 +
|
||||
3 files changed, 37 insertions(+), 11 deletions(-)
|
||||
|
||||
diff --git a/lib/utils/psci/spacemit/plat/k1x/underly_implement.c b/lib/utils/psci/spacemit/plat/k1x/underly_implement.c
|
||||
index f87bacc7297d..825db86dddfe 100644
|
||||
--- a/lib/utils/psci/spacemit/plat/k1x/underly_implement.c
|
||||
+++ b/lib/utils/psci/spacemit/plat/k1x/underly_implement.c
|
||||
@@ -319,6 +319,26 @@ int spacemit_core_enter_c2(u_register_t mpidr)
|
||||
return 0;
|
||||
}
|
||||
|
||||
+int spacemit_cluster_enter_m2(u_register_t mpidr)
|
||||
+{
|
||||
+ unsigned int value;
|
||||
+
|
||||
+ /* wait the cpu enter M2 */
|
||||
+ value = readl((unsigned int *)0xd4282890);
|
||||
+
|
||||
+ if (mpidr == 0 || mpidr == 1 || mpidr == 2 || mpidr == 3) {
|
||||
+ if (value & (1 << 3))
|
||||
+ return 1;
|
||||
+ } else if (mpidr == 4 || mpidr == 5 || mpidr == 6 || mpidr == 7) {
|
||||
+ if (value & (1 << 19))
|
||||
+ return 1;
|
||||
+ } else {
|
||||
+ return 0;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
void spacemit_wait_core_enter_c2(u_register_t mpidr)
|
||||
{
|
||||
unsigned int value;
|
||||
diff --git a/lib/utils/psci/spacemit/plat/plat_pm.c b/lib/utils/psci/spacemit/plat/plat_pm.c
|
||||
index 32aec9d308ab..e3f494065f23 100644
|
||||
--- a/lib/utils/psci/spacemit/plat/plat_pm.c
|
||||
+++ b/lib/utils/psci/spacemit/plat/plat_pm.c
|
||||
@@ -228,7 +228,7 @@ static int spacemit_validate_power_state(unsigned int power_state,
|
||||
static void spacemit_pwr_domain_suspend(const psci_power_state_t *target_state)
|
||||
{
|
||||
unsigned int hartid = current_hartid();
|
||||
-
|
||||
+
|
||||
/*
|
||||
* CSS currently supports retention only at cpu level. Just return
|
||||
* as nothing is to be done for retention.
|
||||
@@ -250,22 +250,27 @@ static void spacemit_pwr_domain_suspend(const psci_power_state_t *target_state)
|
||||
/* disable the tcm */
|
||||
csr_write(CSR_TCMCFG, 0);
|
||||
#endif
|
||||
- wake_idle_harts(NULL, hartid);
|
||||
+ if (!spacemit_cluster_enter_m2(PLATFORM_MAX_CPUS_PER_CLUSTER)) {
|
||||
+ wake_idle_harts(NULL, hartid);
|
||||
|
||||
- /* D1P & D2 */
|
||||
- csi_flush_l2_cache_hart(0, 0);
|
||||
- csi_flush_l2_cache_hart(0, PLATFORM_MAX_CPUS_PER_CLUSTER);
|
||||
+ csi_flush_l2_cache_hart(0, 0);
|
||||
+ csi_flush_l2_cache_hart(0, PLATFORM_MAX_CPUS_PER_CLUSTER);
|
||||
|
||||
- cci_disable_snoop_dvm_reqs(0);
|
||||
- cci_disable_snoop_dvm_reqs(1);
|
||||
+ cci_disable_snoop_dvm_reqs(0);
|
||||
+ cci_disable_snoop_dvm_reqs(1);
|
||||
|
||||
- /* assert othter cpu & wait other cpu enter c2 */
|
||||
- for (u32 i = 0; i < PLATFORM_MAX_CPUS_PER_CLUSTER * PLATFORM_CLUSTER_COUNT; i++) {
|
||||
- if (i != hartid) {
|
||||
- spacemit_wait_core_enter_c2(i);
|
||||
+ /* assert othter cpu & wait other cpu enter c2 */
|
||||
+ for (u32 i = 0; i < PLATFORM_MAX_CPUS_PER_CLUSTER * PLATFORM_CLUSTER_COUNT; i++) {
|
||||
+ if (i != hartid) {
|
||||
+ spacemit_wait_core_enter_c2(i);
|
||||
+ }
|
||||
}
|
||||
+ } else {
|
||||
+ csi_flush_l2_cache_hart(0, 0);
|
||||
+ cci_disable_snoop_dvm_reqs(0);
|
||||
}
|
||||
|
||||
+
|
||||
spacemit_assert_cpu(hartid);
|
||||
|
||||
spacemit_top_off(hartid);
|
||||
diff --git a/lib/utils/psci/spacemit/plat/underly_implement.h b/lib/utils/psci/spacemit/plat/underly_implement.h
|
||||
index 7c11db518a3f..80f1377d1116 100644
|
||||
--- a/lib/utils/psci/spacemit/plat/underly_implement.h
|
||||
+++ b/lib/utils/psci/spacemit/plat/underly_implement.h
|
||||
@@ -10,6 +10,7 @@ void spacemit_cluster_off(u_register_t mpidr);
|
||||
void spacemit_wakeup_cpu(u_register_t mpidr);
|
||||
void spacemit_assert_cpu(u_register_t mpidr);
|
||||
int spacemit_core_enter_c2(u_register_t mpidr);
|
||||
+int spacemit_cluster_enter_m2(u_register_t mpidr);
|
||||
void spacemit_wait_core_enter_c2(u_register_t mpidr);
|
||||
void spacemit_deassert_cpu(void);
|
||||
|
||||
--
|
||||
2.35.3
|
||||
|
||||
@@ -1,45 +0,0 @@
|
||||
config: # This is file 'patch/kernel/spacemit-6.1/0000.patching_config.yaml'
|
||||
|
||||
# PATCH NUMBERING INFO
|
||||
#
|
||||
# Patches should be ordered in such a way that general kernel patches are applied first, then SoC-related patches and at last board-specific patches
|
||||
#
|
||||
# Patch numbers in this folder are sorted by category:
|
||||
#
|
||||
# 000* for general patches
|
||||
# 0** for Bianbu-Linux-related patches
|
||||
# 1** for other SoC-related patches
|
||||
# 5** for board specific patches
|
||||
|
||||
# Just some info stuff; not used by the patching scripts
|
||||
name: spacemit-6.1
|
||||
kind: kernel
|
||||
type: mainline # or: vendor
|
||||
branch: linux-6.1.y
|
||||
last-known-good-tag: v6.1.96
|
||||
maintainers:
|
||||
- { github: none, name: none, email: none, armbian-forum: none }
|
||||
|
||||
# .dts files in these directories will be copied as-is to the build tree; later ones overwrite earlier ones.
|
||||
# This is meant to provide a way to "add a board DTS" without having to null-patch them in.
|
||||
dts-directories:
|
||||
- { source: "dt", target: "arch/riscv/boot/dts/spacemit" }
|
||||
|
||||
# Every file in these directories will be copied as-is to the build tree; later ones overwrite earlier ones
|
||||
# This is meant as a way to have overlays, bare, in a directory, without having to null-patch them in.
|
||||
# @TODO need a solution to auto-Makefile the overlays as well
|
||||
overlay-directories:
|
||||
- { source: "overlay", target: "arch/riscv/boot/dts/spacemit/overlay" }
|
||||
|
||||
# The Makefile in each of these directories will be magically patched to include the dts files copied
|
||||
# or patched-in; overlay subdir will be included "-y" if it exists.
|
||||
# No more Makefile patching needed, yay!
|
||||
auto-patch-dt-makefile:
|
||||
- { directory: "arch/riscv/boot/dts/spacemit", config-var: "CONFIG_SOC_SPACEMIT_K1X" }
|
||||
|
||||
# Configuration for when applying patches to git / auto-rewriting patches (development cycle helpers)
|
||||
patches-to-git:
|
||||
do-not-commit-files:
|
||||
- "MAINTAINERS" # constant churn, drop them. sorry.
|
||||
do-not-commit-regexes: # Python-style regexes
|
||||
- "^arch/([a-zA-Z0-9]+)/boot/dts/([a-zA-Z0-9]+)/Makefile$" # ignore DT Makefile patches, we've an auto-patcher now
|
||||
@@ -1,31 +0,0 @@
|
||||
From 8a2e5ced1c97d81c3d7cf230a63aac66076e1ca0 Mon Sep 17 00:00:00 2001
|
||||
From: ColorfulRhino <ColorfulRhino@armbian.com>
|
||||
Date: Fri, 21 Jun 2024 11:54:06 -0400
|
||||
Subject: [PATCH] Add SpacemiT subdirectory to dts Makefile
|
||||
|
||||
---
|
||||
arch/riscv/boot/dts/Makefile | 1 +
|
||||
arch/riscv/boot/dts/spacemit/Makefile | 5 +
|
||||
|
||||
diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile
|
||||
index ff174996cdfd..cc6a06356338 100644
|
||||
--- a/arch/riscv/boot/dts/Makefile
|
||||
+++ b/arch/riscv/boot/dts/Makefile
|
||||
@@ -3,5 +3,6 @@ subdir-y += sifive
|
||||
subdir-y += starfive
|
||||
subdir-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += canaan
|
||||
subdir-y += microchip
|
||||
+subdir-y += spacemit
|
||||
|
||||
obj-$(CONFIG_BUILTIN_DTB) := $(addsuffix /, $(subdir-y))
|
||||
diff --git a/arch/riscv/boot/dts/spacemit/Makefile b/arch/riscv/boot/dts/spacemit/Makefile
|
||||
new file mode 100644
|
||||
index 000000000000..2be95dbca797
|
||||
--- /dev/null
|
||||
+++ b/arch/riscv/boot/dts/spacemit/Makefile
|
||||
@@ -0,0 +1,5 @@
|
||||
+# SPDX-License-Identifier: GPL-2.0
|
||||
+
|
||||
+dtb-$(CONFIG_SOC_SPACEMIT_K1X) += k1-x_deb1.dtb
|
||||
+
|
||||
+obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,32 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Patrick Yavitz <pyavitz@armbian.com>
|
||||
Date: Fri, 21 Jun 2024 11:54:06 -0400
|
||||
Subject: add spacemit patch set
|
||||
|
||||
source: https://gitee.com/bianbu-linux/linux-6.1
|
||||
|
||||
Signed-off-by: Patrick Yavitz <pyavitz@armbian.com>
|
||||
---
|
||||
drivers/ata/libata-pmp.c | 3 ++-
|
||||
1 file changed, 2 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/ata/libata-pmp.c b/drivers/ata/libata-pmp.c
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/drivers/ata/libata-pmp.c
|
||||
+++ b/drivers/ata/libata-pmp.c
|
||||
@@ -446,10 +446,11 @@ static void sata_pmp_quirks(struct ata_port *ap)
|
||||
* otherwise. Don't try hard to recover it.
|
||||
*/
|
||||
ap->pmp_link[ap->nr_pmp_links - 1].flags |= ATA_LFLAG_NO_RETRY;
|
||||
- } else if (vendor == 0x197b && (devid == 0x2352 || devid == 0x0325)) {
|
||||
+ } else if (vendor == 0x197b && (devid == 0x2352 || devid == 0x0325 || devid == 0x0585)) {
|
||||
/*
|
||||
* 0x2352: found in Thermaltake BlackX Duet, jmicron JMB350?
|
||||
* 0x0325: jmicron JMB394.
|
||||
+ * 0x0325: jmicron JMB585.
|
||||
*/
|
||||
ata_for_each_link(link, ap, EDGE) {
|
||||
/* SRST breaks detection and disks get misclassified
|
||||
--
|
||||
Armbian
|
||||
|
||||
@@ -1,28 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Patrick Yavitz <pyavitz@armbian.com>
|
||||
Date: Fri, 21 Jun 2024 11:54:06 -0400
|
||||
Subject: add spacemit patch set
|
||||
|
||||
source: https://gitee.com/bianbu-linux/linux-6.1
|
||||
|
||||
Signed-off-by: Patrick Yavitz <pyavitz@armbian.com>
|
||||
---
|
||||
drivers/base/firmware_loader/main.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/base/firmware_loader/main.c b/drivers/base/firmware_loader/main.c
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/drivers/base/firmware_loader/main.c
|
||||
+++ b/drivers/base/firmware_loader/main.c
|
||||
@@ -1156,7 +1156,7 @@ request_firmware_nowait(
|
||||
fw_work->device = device;
|
||||
fw_work->context = context;
|
||||
fw_work->cont = cont;
|
||||
- fw_work->opt_flags = FW_OPT_NOWAIT |
|
||||
+ fw_work->opt_flags = FW_OPT_NOWAIT | FW_OPT_NO_WARN |
|
||||
(uevent ? FW_OPT_UEVENT : FW_OPT_USERHELPER);
|
||||
|
||||
if (!uevent && fw_cache_is_setup(device, name)) {
|
||||
--
|
||||
Armbian
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,314 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Patrick Yavitz <pyavitz@armbian.com>
|
||||
Date: Fri, 21 Jun 2024 11:54:06 -0400
|
||||
Subject: add spacemit patch set
|
||||
|
||||
source: https://gitee.com/bianbu-linux/linux-6.1
|
||||
|
||||
Signed-off-by: Patrick Yavitz <pyavitz@armbian.com>
|
||||
---
|
||||
drivers/cpufreq/Kconfig | 11 +-
|
||||
drivers/cpufreq/Makefile | 1 +
|
||||
drivers/cpufreq/cpufreq-dt-platdev.c | 4 +
|
||||
drivers/cpufreq/spacemit-cpufreq.c | 215 ++++++++++
|
||||
drivers/cpuidle/cpuidle-riscv-sbi.c | 4 +
|
||||
5 files changed, 234 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/drivers/cpufreq/Kconfig
|
||||
+++ b/drivers/cpufreq/Kconfig
|
||||
@@ -231,7 +231,7 @@ if X86
|
||||
source "drivers/cpufreq/Kconfig.x86"
|
||||
endif
|
||||
|
||||
-if ARM || ARM64
|
||||
+if ARM || ARM64 || RISCV
|
||||
source "drivers/cpufreq/Kconfig.arm"
|
||||
endif
|
||||
|
||||
@@ -321,5 +321,14 @@ config QORIQ_CPUFREQ
|
||||
This adds the CPUFreq driver support for Freescale QorIQ SoCs
|
||||
which are capable of changing the CPU's frequency dynamically.
|
||||
|
||||
+config SPACEMIT_K1X_CPUFREQ
|
||||
+ tristate "CPU frequency scaling driver for Spacemit K1X"
|
||||
+ depends on OF && COMMON_CLK
|
||||
+ select CPUFREQ_DT
|
||||
+ select CPUFREQ_DT_PLATDEV
|
||||
+ help
|
||||
+ This adds the CPUFreq driver support for Freescale QorIQ SoCs
|
||||
+ which are capable of changing the CPU's frequency dynamically.
|
||||
+
|
||||
endif
|
||||
endmenu
|
||||
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/drivers/cpufreq/Makefile
|
||||
+++ b/drivers/cpufreq/Makefile
|
||||
@@ -114,3 +114,4 @@ obj-$(CONFIG_LOONGSON1_CPUFREQ) += loongson1-cpufreq.o
|
||||
obj-$(CONFIG_SH_CPU_FREQ) += sh-cpufreq.o
|
||||
obj-$(CONFIG_SPARC_US2E_CPUFREQ) += sparc-us2e-cpufreq.o
|
||||
obj-$(CONFIG_SPARC_US3_CPUFREQ) += sparc-us3-cpufreq.o
|
||||
+obj-$(CONFIG_SPACEMIT_K1X_CPUFREQ) += spacemit-cpufreq.o
|
||||
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
|
||||
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
|
||||
@@ -93,6 +93,8 @@ static const struct of_device_id allowlist[] __initconst = {
|
||||
{ .compatible = "xlnx,zynq-7000", },
|
||||
{ .compatible = "xlnx,zynqmp", },
|
||||
|
||||
+ { .compatible = "spacemit,k1-x", },
|
||||
+
|
||||
{ }
|
||||
};
|
||||
|
||||
@@ -168,6 +170,8 @@ static const struct of_device_id blocklist[] __initconst = {
|
||||
{ .compatible = "qcom,msm8974", },
|
||||
{ .compatible = "qcom,msm8960", },
|
||||
|
||||
+ { .compatible = "spacemit,k1-x", },
|
||||
+
|
||||
{ }
|
||||
};
|
||||
|
||||
diff --git a/drivers/cpufreq/spacemit-cpufreq.c b/drivers/cpufreq/spacemit-cpufreq.c
|
||||
new file mode 100644
|
||||
index 000000000000..111111111111
|
||||
--- /dev/null
|
||||
+++ b/drivers/cpufreq/spacemit-cpufreq.c
|
||||
@@ -0,0 +1,215 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0-only
|
||||
+
|
||||
+#include <linux/cpufreq.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/cpumask.h>
|
||||
+#include <linux/clk/clk-conf.h>
|
||||
+#include <linux/pm_qos.h>
|
||||
+#include <linux/notifier.h>
|
||||
+#include <linux/regulator/consumer.h>
|
||||
+#include <linux/mutex.h>
|
||||
+#include "../opp/opp.h"
|
||||
+
|
||||
+struct per_device_qos {
|
||||
+ struct regulator *regulator;
|
||||
+ struct freq_qos_request qos;
|
||||
+};
|
||||
+
|
||||
+static DEFINE_MUTEX(regulator_mutex);
|
||||
+static struct notifier_block vol_constraints_notifier;
|
||||
+static struct freq_constraints vol_constraints;
|
||||
+static struct per_device_qos *vol_qos[CONFIG_NR_CPUS];
|
||||
+
|
||||
+#ifdef CONFIG_CPU_HOTPLUG_THERMAL
|
||||
+struct thermal_cooling_device **ghotplug_cooling;
|
||||
+extern struct thermal_cooling_device **
|
||||
+of_hotplug_cooling_register(struct cpufreq_policy *policy);
|
||||
+#endif
|
||||
+
|
||||
+static int spacemit_vol_qos_notifier_call(struct notifier_block *nb, unsigned long action, void *data)
|
||||
+{
|
||||
+ regulator_set_voltage(vol_qos[0]->regulator, action * 1000, action * 1000);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int spacemit_policy_notifier(struct notifier_block *nb,
|
||||
+ unsigned long event, void *data)
|
||||
+{
|
||||
+ int cpu, err;
|
||||
+ u64 rates;
|
||||
+ static int cci_init;
|
||||
+ struct clk *cci_clk;
|
||||
+ struct device *cpu_dev;
|
||||
+ struct cpufreq_policy *policy = data;
|
||||
+ struct opp_table *opp_table;
|
||||
+ const char *strings;
|
||||
+
|
||||
+ cpu = cpumask_first(policy->related_cpus);
|
||||
+ cpu_dev = get_cpu_device(cpu);
|
||||
+ opp_table = _find_opp_table(cpu_dev);
|
||||
+
|
||||
+ if (cci_init == 0) {
|
||||
+ cci_clk = of_clk_get_by_name(opp_table->np, "cci");
|
||||
+ of_property_read_u64_array(opp_table->np, "cci-hz", &rates, 1);
|
||||
+ clk_set_rate(cci_clk, rates);
|
||||
+ clk_put(cci_clk);
|
||||
+ cci_init = 1;
|
||||
+ }
|
||||
+
|
||||
+ vol_qos[cpu] = devm_kzalloc(cpu_dev, sizeof(struct per_device_qos), GFP_KERNEL);
|
||||
+ if (!vol_qos[cpu])
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ err = of_property_read_string_array(cpu_dev->of_node, "vin-supply-names",
|
||||
+ &strings, 1);
|
||||
+ if (err >= 0) {
|
||||
+ vol_qos[cpu]->regulator = devm_regulator_get(cpu_dev, strings);
|
||||
+ if (IS_ERR(vol_qos[cpu]->regulator)) {
|
||||
+ pr_err("regulator supply %s, get failed\n", strings);
|
||||
+ return PTR_ERR(vol_qos[cpu]->regulator);
|
||||
+ }
|
||||
+
|
||||
+ err = regulator_enable(vol_qos[cpu]->regulator);
|
||||
+
|
||||
+ } else {
|
||||
+ /* using the same regulator */
|
||||
+ vol_qos[cpu]->regulator = vol_qos[0]->regulator;
|
||||
+ }
|
||||
+
|
||||
+ if (vol_qos[cpu]->regulator)
|
||||
+ freq_qos_add_request(&vol_constraints, &vol_qos[cpu]->qos, FREQ_QOS_MIN,
|
||||
+ regulator_get_voltage(vol_qos[cpu]->regulator) / 1000);
|
||||
+
|
||||
+#ifdef CONFIG_CPU_HOTPLUG_THERMAL
|
||||
+ ghotplug_cooling = of_hotplug_cooling_register(policy);
|
||||
+ if (!ghotplug_cooling) {
|
||||
+ pr_err("register hotplug cpu cooling failed\n");
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+#endif
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int spacemit_processor_notifier(struct notifier_block *nb,
|
||||
+ unsigned long event, void *data)
|
||||
+{
|
||||
+ int cpu;
|
||||
+ struct device *cpu_dev;
|
||||
+ struct cpufreq_freqs *freqs = (struct cpufreq_freqs *)data;
|
||||
+ struct cpufreq_policy *policy = ( struct cpufreq_policy *)freqs->policy;
|
||||
+ struct opp_table *opp_table;
|
||||
+ struct device_node *np;
|
||||
+ struct clk *tcm_clk, *ace_clk;
|
||||
+ u64 rates;
|
||||
+ u32 microvol;
|
||||
+
|
||||
+ cpu = cpumask_first(policy->related_cpus);
|
||||
+ cpu_dev = get_cpu_device(cpu);
|
||||
+ opp_table = _find_opp_table(cpu_dev);
|
||||
+
|
||||
+ for_each_available_child_of_node(opp_table->np, np) {
|
||||
+ of_property_read_u64_array(np, "opp-hz", &rates, 1);
|
||||
+ if (rates == freqs->new * 1000) {
|
||||
+ of_property_read_u32(np, "opp-microvolt", µvol);
|
||||
+ break;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ /* get the tcm/ace clk handler */
|
||||
+ tcm_clk = of_clk_get_by_name(opp_table->np, "tcm");
|
||||
+ ace_clk = of_clk_get_by_name(opp_table->np, "ace");
|
||||
+
|
||||
+ if (event == CPUFREQ_PRECHANGE) {
|
||||
+
|
||||
+ mutex_lock(®ulator_mutex);
|
||||
+
|
||||
+ if (freqs->new > freqs->old) {
|
||||
+ /* increase voltage first */
|
||||
+ if (vol_qos[cpu]->regulator)
|
||||
+ freq_qos_update_request(&vol_qos[cpu]->qos, microvol / 1000);
|
||||
+ }
|
||||
+
|
||||
+ /**
|
||||
+ * change the tcm/ace's frequency first.
|
||||
+ * binary division is safe
|
||||
+ */
|
||||
+ if (!IS_ERR(ace_clk)) {
|
||||
+ clk_set_rate(ace_clk, clk_get_rate(clk_get_parent(ace_clk)) / 2);
|
||||
+ clk_put(ace_clk);
|
||||
+ }
|
||||
+
|
||||
+ if (!IS_ERR(tcm_clk)) {
|
||||
+ clk_set_rate(tcm_clk, clk_get_rate(clk_get_parent(tcm_clk)) / 2);
|
||||
+ clk_put(tcm_clk);
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ if (event == CPUFREQ_POSTCHANGE) {
|
||||
+
|
||||
+ if (!IS_ERR(tcm_clk)) {
|
||||
+ clk_get_rate(clk_get_parent(tcm_clk));
|
||||
+ /* get the tcm-hz */
|
||||
+ of_property_read_u64_array(np, "tcm-hz", &rates, 1);
|
||||
+ /* then set rate */
|
||||
+ clk_set_rate(tcm_clk, rates);
|
||||
+ clk_put(tcm_clk);
|
||||
+ }
|
||||
+
|
||||
+ if (!IS_ERR(ace_clk)) {
|
||||
+ clk_get_rate(clk_get_parent(ace_clk));
|
||||
+ /* get the ace-hz */
|
||||
+ of_property_read_u64_array(np, "ace-hz", &rates, 1);
|
||||
+ /* then set rate */
|
||||
+ clk_set_rate(ace_clk, rates);
|
||||
+ clk_put(ace_clk);
|
||||
+ }
|
||||
+
|
||||
+ if (freqs->new < freqs->old) {
|
||||
+ /* decrease the voltage last */
|
||||
+ if (vol_qos[cpu]->regulator)
|
||||
+ freq_qos_update_request(&vol_qos[cpu]->qos, microvol / 1000);
|
||||
+ }
|
||||
+
|
||||
+ mutex_unlock(®ulator_mutex);
|
||||
+ }
|
||||
+
|
||||
+ dev_pm_opp_put_opp_table(opp_table);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static struct notifier_block spacemit_processor_notifier_block = {
|
||||
+ .notifier_call = spacemit_processor_notifier,
|
||||
+};
|
||||
+
|
||||
+static struct notifier_block spacemit_policy_notifier_block = {
|
||||
+ .notifier_call = spacemit_policy_notifier,
|
||||
+};
|
||||
+
|
||||
+static int __init spacemit_processor_driver_init(void)
|
||||
+{
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = cpufreq_register_notifier(&spacemit_processor_notifier_block, CPUFREQ_TRANSITION_NOTIFIER);
|
||||
+ if (ret) {
|
||||
+ pr_err("register cpufreq notifier failed\n");
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ ret = cpufreq_register_notifier(&spacemit_policy_notifier_block, CPUFREQ_POLICY_NOTIFIER);
|
||||
+ if (ret) {
|
||||
+ pr_err("register cpufreq notifier failed\n");
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ vol_constraints_notifier.notifier_call = spacemit_vol_qos_notifier_call;
|
||||
+ freq_constraints_init(&vol_constraints);
|
||||
+ freq_qos_add_notifier(&vol_constraints, FREQ_QOS_MIN, &vol_constraints_notifier);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+arch_initcall(spacemit_processor_driver_init);
|
||||
diff --git a/drivers/cpuidle/cpuidle-riscv-sbi.c b/drivers/cpuidle/cpuidle-riscv-sbi.c
|
||||
index 111111111111..222222222222 100644
|
||||
--- a/drivers/cpuidle/cpuidle-riscv-sbi.c
|
||||
+++ b/drivers/cpuidle/cpuidle-riscv-sbi.c
|
||||
@@ -79,6 +79,10 @@ static int sbi_suspend_finisher(unsigned long suspend_type,
|
||||
{
|
||||
struct sbiret ret;
|
||||
|
||||
+#if defined(CONFIG_SOC_SPACEMIT_K1PRO) || defined(CONFIG_SOC_SPACEMIT_K1X)
|
||||
+ /* flush the local cache */
|
||||
+ sbi_flush_local_dcache_all();
|
||||
+#endif
|
||||
ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_SUSPEND,
|
||||
suspend_type, resume_addr, opaque, 0, 0, 0);
|
||||
|
||||
--
|
||||
Armbian
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user