armbian/build
0
0
Fork 0
mirror of https://github.com/armbian/build.git synced 2026-01-06 09:58:46 -08:00
Code Issues Packages Projects Releases Wiki Activity

Rockpis devtree mainlined (#4603)

Browse Source 
* moved rockpro64 patch out of rockpis patch sequence

It had been misnamed

* patch new mainline devtree for Rock Pi-S instead of overwritting it.

Also restores lost bluetooth compatibility items on UART4
This commit is contained in:
brentr
2022-12-23 12:57:53 -08:00
committed by GitHub
parent 3c79a24253
commit 588c2ec17e
20 changed files with 378 additions and 10915 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
patch/kernel/archive/rockchip64-6.1/add-boards-to-dts-makefile.patch
View File

@@ -2,11 +2,10 @@ diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchi
index 26661c7b7..1462ed38b 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -1,4 +1,23 @@
@@ -1,4 +1,22 @@
# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-pc.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock-pi-e.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-rock-pi-s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-box.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-neo3-rev02.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2-rev00.dtb

271
patch/kernel/archive/rockchip64-6.1/board-rockpis-0001-arm64-dts-rockchip-add-ROCK-Pi-S-DTS-support.patch
View File

@@ -1,271 +0,0 @@
From 4c09666816df62c1b8ab13410b8d0cc9234c608f Mon Sep 17 00:00:00 2001
From: ashthespy <ashthespy@gmail.com>
Date: Wed, 15 Jan 2020 14:54:14 +0100
Subject: [PATCH 01/23] arm64: dts: rockchip: add ROCK Pi S DTS support
ROCK Pi S is RK3308 based SBC from radxa.com. ROCK Pi S has a,
- 256MB/512MB DDR3 RAM
- SD, NAND flash (optional on board 1/2/4/8Gb)
- 100MB ethernet, PoE (optional)
- Onboard 802.11 b/g/n wifi + Bluetooth 4.0 Module
- USB2.0 Type-A HOST x1
- USB3.0 Type-C OTG x1
- 26-pin expansion header
- USB Type-C DC 5V Power Supply
This patch enables
- Console
- NAND Flash
- SD Card
Signed-off-by: Akash Gajjar <akash@openedev.com>
---
Changes for v2
- Use pwm-supply for vdd_core node instead of vi-supply
- Add USB2.0 node support
Changes for v3
- Use small S on dts file name
- Add missing semicolon
- Remove USB2.0 node support
.../devicetree/bindings/arm/rockchip.yaml | 5 +
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 221 ++++++++++++++++++
3 files changed, 227 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
---
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 221 ++++++++++++++++++
2 files changed, 222 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
new file mode 100644
index 000000000000..4fccae43f008
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -0,0 +1,221 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Akash Gajjar <akash@openedev.com>
+ * Copyright (c) 2019 Jagan Teki <jagan@openedev.com>
+ */
+
+/dts-v1/;
+#include "rk3308.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi S";
+ compatible = "radxa,rockpis", "rockchip,rk3308";
+
+ chosen {
+ stdout-path = "serial0:1500000n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&green_led_gio>, <&heartbeat_led_gpio>;
+
+ green-led {
+ label = "rockpis:green:power";
+ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
+ default-state = "on";
+ };
+
+ blue-led {
+ label = "rockpis:blue:user";
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+ reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vdd_core: vdd-core {
+ compatible = "pwm-regulator";
+ pwms = <&pwm0 0 5000 1>;
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <827000>;
+ regulator-max-microvolt = <1340000>;
+ regulator-init-microvolt = <1015000>;
+ regulator-settling-time-up-us = <250>;
+ regulator-always-on;
+ regulator-boot-on;
+ pwm-supply = <&vcc5v0_sys>;
+ };
+
+ vdd_log: vdd-log {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_log";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_ddr: vcc-ddr {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_1v8: vcc-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_io>;
+ };
+
+ vcc_io: vcc-io {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_io";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_otg: vcc5v0-otg {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_otg";
+ regulator-always-on;
+ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&otg_vbus_drv>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_core>;
+};
+
+&emmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ supports-sd;
+ disable-wp;
+ non-removable;
+ num-slots = <1>;
+ vin-supply = <&vcc_io>;
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ max-frequeency = <150000000>;
+ supports-sd;
+ disable-wp;
+ num-slots = <1>;
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;
+ card-detect-delay = <800>;
+ status = "okay";
+};
+
+&spi2 {
+ status = "okay";
+ max-freq = <10000000>;
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_32k>;
+
+ leds {
+ green_led_gio: green-led-gpio {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ heartbeat_led_gpio: heartbeat-led-gpio {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ otg_vbus_drv: otg-vbus-drv {
+ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wifi_host_wake: wifi-host-wake {
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+};
+
+&pwm0 {
+ status = "okay";
+ pinctrl-0 = <&pwm0_pin_pull_down>;
+};
+
+&saradc {
+ vref-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-width = <4>;
+ max-frequency = <1000000>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ supports-sdio;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ sd-uhs-sdr104;
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_xfer &uart4_rts &uart4_cts>;
+ status = "okay";
+};
--
2.25.1

377
patch/kernel/archive/rockchip64-6.1/board-rockpis-0001-arm64-dts.patch Normal file
View File

@@ -0,0 +1,377 @@
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts 2022-12-19 16:47:52.770160260 -0800
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts 2022-12-19 17:53:42.503756590 -0800
@@ -2,6 +2,7 @@
/*
* Copyright (c) 2019 Akash Gajjar <akash@openedev.com>
* Copyright (c) 2019 Jagan Teki <jagan@openedev.com>
+ * Revised: 2022 Brent Roman <brent@mbari.org>
*/
/dts-v1/;
@@ -11,12 +12,6 @@
model = "Radxa ROCK Pi S";
compatible = "radxa,rockpis", "rockchip,rk3308";
- aliases {
- ethernet0 = &gmac;
- mmc0 = &emmc;
- mmc1 = &sdmmc;
- };
-
chosen {
stdout-path = "serial0:1500000n8";
};
@@ -27,44 +22,102 @@
pinctrl-0 = <&green_led_gio>, <&heartbeat_led_gpio>;
green-led {
- default-state = "on";
- gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
label = "rockpis:green:power";
+ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
+ default-state = "on";
};
blue-led {
- default-state = "on";
- gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
label = "rockpis:blue:user";
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
+ default-state = "on";
};
};
+ codec: acodec-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,rk3308-acodec";
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,codec-hp-det;
+ simple-audio-card,widgets =
+ "Headphone", "Headphones";
+ simple-audio-card,cpu {
+ sound-dai = <&i2s_8ch_2>;
+ };
+ simple-audio-card,codec {
+ sound-dai = <&acodec>;
+ };
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "i2s_8ch_0";
+
+ simple-audio-card,dai-link@1 {
+ format = "i2s";
+ cpu {
+ sound-dai = <&i2s_8ch_0>;
+ };
+
+ codec {
+ sound-dai = <&pcm5102a>;
+ };
+ };
+ };
+
+ pcm5102a: pcm5102a {
+ #sound-dai-cells = <0>;
+ compatible = "ti,pcm5102a";
+ pcm510x,format = "i2s";
+ };
+
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-0 = <&wifi_enable_h>;
pinctrl-names = "default";
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
};
- vcc_1v8: vcc-1v8 {
+ vcc5v0_sys: vcc5v0-sys {
compatible = "regulator-fixed";
- regulator-name = "vcc_1v8";
+ regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_io>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
};
- vcc_io: vcc-io {
+ vdd_core: vdd-core {
+ compatible = "pwm-regulator";
+ pwms = <&pwm0 0 5000 1>;
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <827000>;
+ regulator-max-microvolt = <1340000>;
+ regulator-init-microvolt = <1015000>;
+ regulator-settling-time-up-us = <250>;
+ regulator-always-on;
+ regulator-boot-on;
+ pwm-supply = <&vcc5v0_sys>;
+ };
+
+ vdd_log: vdd-log {
compatible = "regulator-fixed";
- regulator-name = "vcc_io";
+ regulator-name = "vdd_log";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
vin-supply = <&vcc5v0_sys>;
};
@@ -78,50 +131,50 @@
vin-supply = <&vcc5v0_sys>;
};
- vcc5v0_otg: vcc5v0-otg {
+ vcc_1v8: vcc-1v8 {
compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&otg_vbus_drv>;
- regulator-name = "vcc5v0_otg";
+ regulator-name = "vcc_1v8";
regulator-always-on;
- vin-supply = <&vcc5v0_sys>;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_io>;
};
- vcc5v0_sys: vcc5v0-sys {
+ vcc_io: vcc-io {
compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
+ regulator-name = "vcc_io";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
};
- vdd_core: vdd-core {
- compatible = "pwm-regulator";
- pwms = <&pwm0 0 5000 1>;
- pwm-supply = <&vcc5v0_sys>;
- regulator-name = "vdd_core";
- regulator-min-microvolt = <827000>;
- regulator-max-microvolt = <1340000>;
- regulator-init-microvolt = <1015000>;
- regulator-settling-time-up-us = <250>;
+ vcc_phy: vcc-phy-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_phy";
regulator-always-on;
regulator-boot-on;
};
- vdd_log: vdd-log {
+ vcc5v0_otg: vcc5v0-otg {
compatible = "regulator-fixed";
- regulator-name = "vdd_log";
+ regulator-name = "vcc5v0_otg";
regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1050000>;
+ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&otg_vbus_drv>;
vin-supply = <&vcc5v0_sys>;
};
};
+&acodec {
+ status = "okay";
+ #sound-dai-cells = <0>;
+};
+
&cpu0 {
cpu-supply = <&vdd_core>;
};
@@ -129,23 +182,60 @@
&emmc {
bus-width = <4>;
cap-mmc-highspeed;
- mmc-hs200-1_8v;
non-removable;
- vmmc-supply = <&vcc_io>;
status = "okay";
};
+&sdmmc {
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;
+ card-detect-delay = <800>;
+ status = "okay";
+};
+
+&sdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ no-mmc;
+ status = "okay";
+
+ rtl8723ds: wifi@1 {
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_host_wake>;
+ };
+};
+
&gmac {
+ phy-supply = <&vcc_phy>;
clock_in_out = "output";
- phy-supply = <&vcc_io>;
+ assigned-clocks = <&cru SCLK_MAC>;
+ assigned-clock-parents = <&cru SCLK_MAC_SRC>;
snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 50000 50000>;
status = "okay";
};
-&i2c1 {
+&i2s_8ch_0 {
+ assigned-clocks = <&cru SCLK_I2S0_8CH_RX>;
+ assigned-clock-parents = <&cru SCLK_I2S0_8CH_TX_MUX>;
+ rockchip,clk-trcm = <1>;
+ #sound-dai-cells = <0>;
+};
+
+&i2s_8ch_2 {
status = "okay";
+ #sound-dai-cells = <0>;
};
&pinctrl {
@@ -172,7 +262,9 @@
wifi_enable_h: wifi-enable-h {
rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
+ };
+ wifi {
wifi_host_wake: wifi-host-wake {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
};
@@ -189,42 +281,29 @@
status = "okay";
};
-&sdio {
- #address-cells = <1>;
- #size-cells = <0>;
- cap-sd-highspeed;
- cap-sdio-irq;
- keep-power-in-suspend;
- max-frequency = <1000000>;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- sd-uhs-sdr104;
+&tsadc {
+ rockchip,hw-tshut-mode = <0>; /* 0:CRU */
+ rockchip,hw-tshut-polarity = <1>; /* 1:HIGH */
status = "okay";
};
-&sdmmc {
- cap-sd-highspeed;
+&i2c1 {
status = "okay";
};
-&u2phy {
- status = "okay";
-
- u2phy_host: host-port {
- phy-supply = <&vcc5v0_otg>;
- status = "okay";
- };
-
- u2phy_otg: otg-port {
- phy-supply = <&vcc5v0_otg>;
- status = "okay";
- };
+&spi2 {
+// status = "okay"; //conflicts with UART2
+ max-freq = <10000000>;
};
&uart0 {
status = "okay";
};
+&uart2 {
+ status = "okay";
+};
+
&uart4 {
status = "okay";
@@ -235,19 +314,27 @@
};
};
-&usb_host_ehci {
+&u2phy {
status = "okay";
+
+ u2phy_host: host-port {
+ phy-supply = <&vcc5v0_otg>;
+ status = "okay";
+ };
+
+ u2phy_otg: otg-port {
+ status = "okay";
+ };
};
-&usb_host_ohci {
+&usb20_otg {
status = "okay";
};
-&usb20_otg {
- dr_mode = "peripheral";
+&usb_host_ehci {
status = "okay";
};
-&wdt {
+&usb_host_ohci{
status = "okay";
};

71
patch/kernel/archive/rockchip64-6.1/board-rockpis-0002-Fixes-for-rk3308-rock-pi-s-dts.patch
View File

@@ -1,71 +0,0 @@
From a7a6d6f06de8b629537ddada1bda5beef88ecea3 Mon Sep 17 00:00:00 2001
From: ashthespy <ashthespy@gmail.com>
Date: Wed, 15 Jan 2020 15:14:16 +0100
Subject: [PATCH 02/23] Fixes for rk3308-rock-pi-s dts
---
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 24 ++++++++++---------
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
index 4fccae43f008..f06ff0c6e028 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -121,13 +121,15 @@ &cpu0 {
};
&emmc {
- bus-width = <4>;
+ bus-width = <4>; // Confirm if right value - <8>
cap-mmc-highspeed;
mmc-hs200-1_8v;
- supports-sd;
- disable-wp;
+ /* supports-sd; */
+ /* disable-wp; */
non-removable;
- num-slots = <1>;
+ /* num-slots = <1>; */
+ /* please provide actual vmmc and vqmmc supplies
+ vin is not a valid supply for emmcs */
vin-supply = <&vcc_io>;
status = "okay";
};
@@ -137,15 +139,15 @@ &i2c1 {
};
&sdmmc {
- bus-width = <4>;
+ /* bus-width = <4>; */
cap-mmc-highspeed;
cap-sd-highspeed;
- max-frequeency = <150000000>;
- supports-sd;
+ /* max-frequency = <150000000>; */
+ /* supports-sd; */
disable-wp;
- num-slots = <1>;
+ /* num-slots = <1>; */
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;
- card-detect-delay = <800>;
+ card-detect-delay = <800>; // Confirm if right value - <200>
status = "okay";
};
@@ -198,11 +200,11 @@ &saradc {
&sdio {
#address-cells = <1>;
#size-cells = <0>;
- bus-width = <4>;
+ /* bus-width = <4>; */
max-frequency = <1000000>;
cap-sd-highspeed;
cap-sdio-irq;
- supports-sdio;
+ /* supports-sdio; */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
--
2.25.1

59
patch/kernel/archive/rockchip64-6.1/board-rockpis-0003-WIP-Wireless-support.patch
View File

@@ -1,59 +0,0 @@
From 44f753e6f7be183e49c408d4db8a2c7530e7f057 Mon Sep 17 00:00:00 2001
From: ashthespy <ashthespy@gmail.com>
Date: Wed, 15 Jan 2020 20:03:48 +0100
Subject: [PATCH 03/23] WIP: Wireless support
---
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
index f06ff0c6e028..88468a6065cf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -39,6 +39,12 @@ sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
};
@@ -114,6 +120,19 @@ vcc5v0_otg: vcc5v0-otg {
pinctrl-0 = <&otg_vbus_drv>;
vin-supply = <&vcc5v0_sys>;
};
+
+ wireless-wlan {
+ compatible = "wlan-platdata";
+ rockchip,grf = <&grf>;
+ clocks = <&cru SCLK_WIFI>;
+ clock-names = "clk_wifi";
+ ref-clock-frequency = <24000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_host_wake>;
+ wifi_chip_type = "rtl8723ds";
+ WIFI,host_wake_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
};
&cpu0 {
@@ -180,7 +199,9 @@ sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
+ };
+ wireless-wlan {
wifi_host_wake: wifi-host-wake {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
};
--
2.25.1

49
patch/kernel/archive/rockchip64-6.1/board-rockpis-0006-arm64-dts-rockchip-Enable-mac-node-on-rk3308-rock-pi.patch
View File

@@ -1,49 +0,0 @@
From 3bca021b34c95801788a53052f3fbe6f326756f8 Mon Sep 17 00:00:00 2001
From: ashthespy <ashthespy@gmail.com>
Date: Thu, 16 Jan 2020 21:14:23 +0100
Subject: [PATCH 06/23] arm64: dts: rockchip: Enable mac node on
rk3308-rock-pi-s
---
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
index 88468a6065cf..50ae9b98da67 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -110,6 +110,13 @@ vcc_io: vcc-io {
vin-supply = <&vcc5v0_sys>;
};
+ vcc_phy: vcc-phy-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_phy";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
vcc5v0_otg: vcc5v0-otg {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_otg";
@@ -170,6 +177,17 @@ &sdmmc {
status = "okay";
};
+&gmac {
+ phy-supply = <&vcc_phy>;
+ clock_in_out = "output";
+ assigned-clocks = <&cru SCLK_MAC>;
+ assigned-clock-parents = <&cru SCLK_MAC_SRC>;
+ snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 50000 50000>;
+ status = "okay";
+};
+
&spi2 {
status = "okay";
max-freq = <10000000>;
--
2.25.1

77
patch/kernel/archive/rockchip64-6.1/board-rockpis-0008-thermal-rockchip-add-tsadc-support-for-rk3308.patch
View File

@@ -1,77 +0,0 @@
From 498c9f200325f0397fd03163a98e053430b80aa4 Mon Sep 17 00:00:00 2001
From: ashthespy <ashthespy@users.noreply.github.com>
Date: Fri, 17 Jan 2020 15:58:20 +0100
Subject: [PATCH 08/23] thermal: rockchip: add tsadc support for rk3308
From a231e9c68e5f5e6cf5a82a40828cfd1df4ad1f3e Mon Sep 17 00:00:00 2001
From: Rocky Hao <rocky.hao@rock-chips.com>
Date: Fri, 9 Mar 2018 17:36:39 +0800
Subject: [PATCH] thermal: rockchip: add tsadc support for rk3308
Change-Id: Ibf1782ca471c8ad4b14d6fd64eeb123181903adc
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
---
.../bindings/thermal/rockchip-thermal.yaml | 1 +
drivers/thermal/rockchip_thermal.c | 28 +++++++++++++++++++
2 files changed, 29 insertions(+)
diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
index c6aac9bcacf1..3a0a9556680e 100644
--- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
+++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
@@ -15,6 +15,7 @@
- rockchip,px30-tsadc
- rockchip,rk3228-tsadc
- rockchip,rk3288-tsadc
+ - rockchip,rk3308-tsadc
- rockchip,rk3328-tsadc
- rockchip,rk3368-tsadc
- rockchip,rk3399-tsadc
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 343c2f5c5a25..d4d66724535a 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -821,6 +821,30 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
writel_relaxed(val, regs + TSADCV2_INT_EN);
}
+static const struct rockchip_tsadc_chip rk3308_tsadc_data = {
+ .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+ .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
+ .chn_num = 2, /* 2 channels for tsadc */
+
+ .tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
+ .tshut_temp = 95000,
+
+ .initialize = rk_tsadcv4_initialize,
+ .irq_ack = rk_tsadcv3_irq_ack,
+ .control = rk_tsadcv3_control,
+ .get_temp = rk_tsadcv2_get_temp,
+ .set_alarm_temp = rk_tsadcv2_alarm_temp,
+ .set_tshut_temp = rk_tsadcv2_tshut_temp,
+ .set_tshut_mode = rk_tsadcv2_tshut_mode,
+
+ .table = {
+ .id = rk3328_code_table,
+ .length = ARRAY_SIZE(rk3328_code_table),
+ .data_mask = TSADCV2_DATA_MASK,
+ .mode = ADC_INCREMENT,
+ },
+};
+
static const struct rockchip_tsadc_chip px30_tsadc_data = {
.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
@@ -1032,6 +1056,10 @@ static const struct of_device_id of_rockchip_thermal_match[] = {
.compatible = "rockchip,rk3288-tsadc",
.data = (void *)&rk3288_tsadc_data,
},
+ {
+ .compatible = "rockchip,rk3308-tsadc",
+ .data = (void *)&rk3308_tsadc_data,
+ },
{
.compatible = "rockchip,rk3328-tsadc",
.data = (void *)&rk3328_tsadc_data,
--
2.25.1

30
patch/kernel/archive/rockchip64-6.1/board-rockpis-0009-arm64-dts-rockchip-Enable-tsadc-node-on-rk3308-rock-.patch
View File

@@ -1,30 +0,0 @@
From 0c3ca953caf46013cc425a5a1c1c78f9c65dbf03 Mon Sep 17 00:00:00 2001
From: ashthespy <ashthespy@gmail.com>
Date: Fri, 17 Jan 2020 15:59:32 +0100
Subject: [PATCH 09/23] arm64: dts: rockchip: Enable tsadc node on
rk3308-rock-pi-s
---
arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
index 50ae9b98da67..bf08d0d9bd90 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -251,6 +251,12 @@ &sdio {
status = "okay";
};
+&tsadc {
+ rockchip,hw-tshut-mode = <0>; /* 0:CRU */
+ rockchip,hw-tshut-polarity = <1>; /* 1:HIGH */
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
--
2.25.1

31
patch/kernel/archive/rockchip64-6.1/board-rockpis-0011-arm64-dts-rockchip-Set-is2_8ch-clocks-on-rk3308-rock.patch
View File

@@ -1,31 +0,0 @@
From 6c7fe1f4faaeeb214add0b7044be2c063d23d725 Mon Sep 17 00:00:00 2001
From: ashthespy <ashthespy@gmail.com>
Date: Fri, 17 Jan 2020 16:01:10 +0100
Subject: [PATCH 11/23] arm64: dts: rockchip: Set is2_8ch clocks on
rk3308-rock-pi-s
---
arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
index bf08d0d9bd90..7970e282a45c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -188,6 +188,13 @@ &mac {
status = "okay";
};
+&i2s_8ch_0 {
+ assigned-clocks = <&cru SCLK_I2S0_8CH_RX>;
+ assigned-clock-parents = <&cru SCLK_I2S0_8CH_TX_MUX>;
+ rockchip,clk-trcm = <1>;
+ #sound-dai-cells = <0>;
+};
+
&spi2 {
status = "okay";
max-freq = <10000000>;
--
2.25.1

47
patch/kernel/archive/rockchip64-6.1/board-rockpis-0013-Add-simple-audio-card.patch
View File

@@ -1,47 +0,0 @@
From 1a034263ed69e8cf58b0f95e52f09e4e1a279ca6 Mon Sep 17 00:00:00 2001
From: ashthespy <ashthespy@gmail.com>
Date: Fri, 17 Jan 2020 18:09:51 +0100
Subject: [PATCH 13/23] Add simple-audio-card
---
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
index 7970e282a45c..a812b9a1b949 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -35,6 +35,30 @@ blue-led {
};
};
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "i2s_8ch_0";
+
+ simple-audio-card,dai-link@1 {
+ format = "i2s";
+ cpu {
+ sound-dai = <&i2s_8ch_0>;
+ };
+
+ codec {
+ sound-dai = <&pcm5102a>;
+ };
+ };
+ };
+
+ pcm5102a: pcm5102a {
+ #sound-dai-cells = <0>;
+ compatible = "ti,pcm5102a";
+ pcm510x,format = "i2s";
+ };
+
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
--
2.25.1

72
patch/kernel/archive/rockchip64-6.1/board-rockpis-0015-arm64-dts-rockchip-Move-wireless-wlan-node-into-sdio.patch
View File

@@ -1,72 +0,0 @@
From 7797745f77993145bd5ac05faef504c299a12228 Mon Sep 17 00:00:00 2001
From: ashthespy <ashthespy@gmail.com>
Date: Fri, 31 Jan 2020 16:59:34 +0100
Subject: [PATCH 15/23] arm64: dts: rockchip: Move `wireless-wlan` node into
sdio
---
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 34 ++++++++++++-------
1 file changed, 21 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
index a812b9a1b949..5536460e65c2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -152,18 +152,18 @@ vcc5v0_otg: vcc5v0-otg {
vin-supply = <&vcc5v0_sys>;
};
- wireless-wlan {
- compatible = "wlan-platdata";
- rockchip,grf = <&grf>;
- clocks = <&cru SCLK_WIFI>;
- clock-names = "clk_wifi";
- ref-clock-frequency = <24000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_host_wake>;
- wifi_chip_type = "rtl8723ds";
- WIFI,host_wake_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
- status = "okay";
- };
+ // wireless-wlan {
+ // compatible = "wlan-platdata";
+ // rockchip,grf = <&grf>;
+ // clocks = <&cru SCLK_WIFI>;
+ // clock-names = "clk_wifi";
+ // ref-clock-frequency = <24000000>;
+ // pinctrl-names = "default";
+ // pinctrl-0 = <&wifi_host_wake>;
+ // wifi_chip_type = "rtl8723ds";
+ // WIFI,host_wake_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
+ // status = "okay";
+ // };
};
&cpu0 {
@@ -250,7 +250,7 @@ wifi_enable_h: wifi-enable-h {
};
};
- wireless-wlan {
+ wifi {
wifi_host_wake: wifi-host-wake {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
};
@@ -280,6 +280,14 @@ &sdio {
non-removable;
sd-uhs-sdr104;
status = "okay";
+
+ rtl8723ds: wifi@1 {
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_host_wake>;
+ };
};
&tsadc {
--
2.25.1

2645
patch/kernel/archive/rockchip64-6.1/board-rockpis-0018-ASoC-codecs-Add-RK3308-internal-codec-driver.patch
View File

File diff suppressed because it is too large Load Diff

6740
patch/kernel/archive/rockchip64-6.1/board-rockpis-0019-Sync-rk3308_codec-to-BSP-tree.patch
View File

File diff suppressed because it is too large Load Diff

64
patch/kernel/archive/rockchip64-6.1/board-rockpis-0021-arm64-dts-rockchip-enable-analog-audio-node-for-rk33.patch
View File

@@ -1,64 +0,0 @@
From 1456af021789aed2f6020afa0353093be3d64f98 Mon Sep 17 00:00:00 2001
From: ashthespy <ashthespy@gmail.com>
Date: Mon, 3 Feb 2020 17:29:59 +0100
Subject: [PATCH 21/23] arm64: dts: rockchip: enable analog audio node for
rk3308-rock-pi-s
---
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 26 +++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
index 5536460e65c2..c65f906ecc5b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -35,6 +35,22 @@ blue-led {
};
};
+ codec: acodec-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,rk3308-acodec";
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,codec-hp-det;
+ simple-audio-card,widgets =
+ "Headphone", "Headphones";
+ simple-audio-card,cpu {
+ sound-dai = <&i2s_8ch_2>;
+ };
+ simple-audio-card,codec {
+ sound-dai = <&acodec>;
+ };
+ };
+
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
@@ -166,6 +182,11 @@ vcc5v0_otg: vcc5v0-otg {
// };
};
+&acodec {
+ status = "okay";
+ #sound-dai-cells = <0>;
+};
+
&cpu0 {
cpu-supply = <&vdd_core>;
};
@@ -219,6 +240,11 @@ &i2s_8ch_0 {
#sound-dai-cells = <0>;
};
+&i2s_8ch_2 {
+ status = "okay";
+ #sound-dai-cells = <0>;
+};
+
&spi2 {
status = "okay";
max-freq = <10000000>;
--
2.25.1

459
patch/kernel/archive/rockchip64-6.1/board-rockpis-0022-ASoC-rk3308_codec-replace-codec-to-component.patch
View File

@@ -1,459 +0,0 @@
From b882c2185ab561ec88c2540623cfa49e2cb56956 Mon Sep 17 00:00:00 2001
From: ashthespy <ashthespy@gmail.com>
Date: Mon, 3 Feb 2020 19:35:42 +0100
Subject: [PATCH 22/23] ASoC: rk3308_codec: replace codec to component
---
sound/soc/codecs/rk3308_codec.c | 159 ++++++++++++-----------
sound/soc/codecs/rk3308_codec_provider.h | 2 +-
2 files changed, 84 insertions(+), 77 deletions(-)
diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 815e22fc346c..16bfb215586e 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -31,7 +31,7 @@
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/reset.h>
-#include <linux/rockchip/grf.h>
+// #include <linux/rockchip/grf.h>
#include <linux/version.h>
#include <sound/core.h>
#include <sound/dmaengine_pcm.h>
@@ -156,7 +156,7 @@ struct rk3308_codec_priv {
struct gpio_desc *hp_ctl_gpio;
struct gpio_desc *spk_ctl_gpio;
struct gpio_desc *pa_drv_gpio;
- struct snd_soc_codec *codec;
+ struct snd_soc_component *component;
struct snd_soc_jack *hpdet_jack;
struct regulator *vcc_micbias;
u32 codec_ver;
@@ -883,8 +883,8 @@ static const struct snd_kcontrol_new rk3308_codec_dapm_controls[] = {
static int rk3308_codec_agc_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
if (e->reg < 0 || e->reg > ADC_LR_GROUP_MAX - 1) {
@@ -904,8 +904,8 @@ static int rk3308_codec_agc_get(struct snd_kcontrol *kcontrol,
static int rk3308_codec_agc_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
unsigned int value = ucontrol->value.integer.value[0];
int grp = e->reg;
@@ -970,8 +970,8 @@ static int rk3308_codec_agc_put(struct snd_kcontrol *kcontrol,
static int rk3308_codec_agc_asr_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
unsigned int value;
int grp = e->reg;
@@ -998,8 +998,8 @@ static int rk3308_codec_agc_asr_get(struct snd_kcontrol *kcontrol,
static int rk3308_codec_agc_asr_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
unsigned int value;
int grp = e->reg;
@@ -1032,8 +1032,8 @@ static int rk3308_codec_agc_asr_put(struct snd_kcontrol *kcontrol,
static int rk3308_codec_mic_mute_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
unsigned int value;
int grp = e->reg;
@@ -1064,8 +1064,8 @@ static int rk3308_codec_mic_mute_get(struct snd_kcontrol *kcontrol,
static int rk3308_codec_mic_mute_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
unsigned int value;
int grp = e->reg;
@@ -1098,8 +1098,8 @@ static int rk3308_codec_mic_mute_put(struct snd_kcontrol *kcontrol,
static int rk3308_codec_micbias_volts_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
ucontrol->value.integer.value[0] = rk3308->micbias_volt;
@@ -1109,8 +1109,8 @@ static int rk3308_codec_micbias_volts_get(struct snd_kcontrol *kcontrol,
static int rk3308_codec_micbias_volts_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
unsigned int volt = ucontrol->value.integer.value[0];
int ret;
@@ -1133,8 +1133,8 @@ static int rk3308_codec_micbias_volts_put(struct snd_kcontrol *kcontrol,
static int rk3308_codec_main_micbias_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
ucontrol->value.integer.value[0] = rk3308->enable_micbias;
@@ -1144,8 +1144,8 @@ static int rk3308_codec_main_micbias_get(struct snd_kcontrol *kcontrol,
static int rk3308_codec_main_micbias_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
unsigned int on = ucontrol->value.integer.value[0];
if (on) {
@@ -1168,8 +1168,8 @@ static int rk3308_codec_mic_gain_get(struct snd_kcontrol *kcontrol,
static int rk3308_codec_mic_gain_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
unsigned int gain = ucontrol->value.integer.value[0];
if (gain > RK3308_ADC_CH1_MIC_GAIN_MAX) {
@@ -1197,8 +1197,8 @@ static int rk3308_codec_mic_gain_put(struct snd_kcontrol *kcontrol,
static int rk3308_codec_hpf_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
unsigned int value;
@@ -1222,8 +1222,8 @@ static int rk3308_codec_hpf_get(struct snd_kcontrol *kcontrol,
static int rk3308_codec_hpf_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
unsigned int value = ucontrol->value.integer.value[0];
@@ -1259,8 +1259,8 @@ static int rk3308_codec_hpout_l_get_tlv(struct snd_kcontrol *kcontrol,
static int rk3308_codec_hpout_l_put_tlv(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
unsigned int dgain = ucontrol->value.integer.value[0];
if (dgain > RK3308_DAC_L_HPOUT_GAIN_MAX) {
@@ -1283,8 +1283,8 @@ static int rk3308_codec_hpout_r_get_tlv(struct snd_kcontrol *kcontrol,
static int rk3308_codec_hpout_r_put_tlv(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
unsigned int dgain = ucontrol->value.integer.value[0];
if (dgain > RK3308_DAC_R_HPOUT_GAIN_MAX) {
@@ -1408,9 +1408,9 @@ static void rk3308_speaker_ctl(struct rk3308_codec_priv *rk3308, int on)
}
}
-static int rk3308_codec_reset(struct snd_soc_codec *codec)
+static int rk3308_codec_reset(struct snd_soc_component *component)
{
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
reset_control_assert(rk3308->reset);
usleep_range(2000, 2500); /* estimated value */
@@ -1452,10 +1452,10 @@ static int rk3308_codec_dac_dig_reset(struct rk3308_codec_priv *rk3308)
return 0;
}
-static int rk3308_set_bias_level(struct snd_soc_codec *codec,
+static int rk3308_set_bias_level(struct snd_soc_component *component,
enum snd_soc_bias_level level)
{
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
switch (level) {
case SND_SOC_BIAS_ON:
@@ -1473,11 +1473,11 @@ static int rk3308_set_bias_level(struct snd_soc_codec *codec,
return 0;
}
-static int rk3308_set_dai_fmt(struct snd_soc_dai *codec_dai,
+static int rk3308_set_dai_fmt(struct snd_soc_dai *dai,
unsigned int fmt)
{
- struct snd_soc_codec *codec = codec_dai->codec;
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = dai->component;
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
unsigned int adc_aif1 = 0, adc_aif2 = 0, dac_aif1 = 0, dac_aif2 = 0;
int idx, grp, is_master;
int type = ADC_TYPE_ALL;
@@ -1721,8 +1721,8 @@ static int rk3308_codec_update_adc_grps(struct rk3308_codec_priv *rk3308,
static int rk3308_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
{
- struct snd_soc_codec *codec = dai->codec;
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = dai->component;
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
int dgain;
@@ -3630,8 +3630,8 @@ static int rk3308_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
- struct snd_soc_codec *codec = dai->codec;
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = dai->component;
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
struct snd_pcm_str *playback_str =
&substream->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK];
int type = ADC_TYPE_LOOPBACK;
@@ -3705,8 +3705,8 @@ static int rk3308_hw_params(struct snd_pcm_substream *substream,
static int rk3308_pcm_trigger(struct snd_pcm_substream *substream,
int cmd, struct snd_soc_dai *dai)
{
- struct snd_soc_codec *codec = dai->codec;
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = dai->component;
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
int type = ADC_TYPE_LOOPBACK;
int idx, grp;
@@ -3749,8 +3749,8 @@ static int rk3308_pcm_trigger(struct snd_pcm_substream *substream,
static void rk3308_pcm_shutdown(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
- struct snd_soc_codec *codec = dai->codec;
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct snd_soc_component *component = dai->component;
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
rk3308_codec_close_playback(rk3308);
@@ -3809,9 +3809,9 @@ static struct snd_soc_dai_driver rk3308_dai[] = {
},
};
-static int rk3308_suspend(struct snd_soc_codec *codec)
+static int rk3308_suspend(struct snd_soc_component *component)
{
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
if (rk3308->no_deep_low_power)
goto out;
@@ -3822,13 +3822,13 @@ static int rk3308_suspend(struct snd_soc_codec *codec)
clk_disable_unprepare(rk3308->pclk);
out:
- rk3308_set_bias_level(codec, SND_SOC_BIAS_OFF);
+ rk3308_set_bias_level(component, SND_SOC_BIAS_OFF);
return 0;
}
-static int rk3308_resume(struct snd_soc_codec *codec)
+static int rk3308_resume(struct snd_soc_component *component)
{
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
int ret = 0;
if (rk3308->no_deep_low_power)
@@ -3857,7 +3857,7 @@ static int rk3308_resume(struct snd_soc_codec *codec)
rk3308_codec_dlp_up(rk3308);
out:
- rk3308_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
+ rk3308_set_bias_level(component, SND_SOC_BIAS_STANDBY);
return ret;
}
@@ -3972,7 +3972,7 @@ static int rk3308_codec_dapm_mic_gains(struct rk3308_codec_priv *rk3308)
int ret;
if (rk3308->codec_ver == ACODEC_VERSION_B) {
- ret = snd_soc_add_codec_controls(rk3308->codec,
+ ret = snd_soc_add_component_controls(rk3308->component,
mic_gains_b,
ARRAY_SIZE(mic_gains_b));
if (ret) {
@@ -3982,7 +3982,7 @@ static int rk3308_codec_dapm_mic_gains(struct rk3308_codec_priv *rk3308)
return ret;
}
} else {
- ret = snd_soc_add_codec_controls(rk3308->codec,
+ ret = snd_soc_add_component_controls(rk3308->component,
mic_gains_a,
ARRAY_SIZE(mic_gains_a));
if (ret) {
@@ -4081,15 +4081,15 @@ static int rk3308_codec_prepare(struct rk3308_codec_priv *rk3308)
return 0;
}
-static int rk3308_probe(struct snd_soc_codec *codec)
+static int rk3308_probe(struct snd_soc_component *component)
{
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
int ext_micbias;
- rk3308->codec = codec;
+ rk3308->component = component;
rk3308_codec_set_dac_path_state(rk3308, PATH_IDLE);
- rk3308_codec_reset(codec);
+ rk3308_codec_reset(component);
rk3308_codec_power_on(rk3308);
/* From vendor recommend, disable micbias at first. */
@@ -4108,9 +4108,9 @@ static int rk3308_probe(struct snd_soc_codec *codec)
return 0;
}
-static int rk3308_remove(struct snd_soc_codec *codec)
+static void rk3308_remove(struct snd_soc_component *component)
{
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
rk3308_headphone_ctl(rk3308, 0);
rk3308_speaker_ctl(rk3308, 0);
@@ -4124,17 +4124,25 @@ static int rk3308_remove(struct snd_soc_codec *codec)
regcache_cache_only(rk3308->regmap, false);
regcache_sync(rk3308->regmap);
- return 0;
}
-static struct snd_soc_codec_driver soc_codec_dev_rk3308 = {
- .probe = rk3308_probe,
- .remove = rk3308_remove,
- .suspend = rk3308_suspend,
- .resume = rk3308_resume,
- .set_bias_level = rk3308_set_bias_level,
- .controls = rk3308_codec_dapm_controls,
- .num_controls = ARRAY_SIZE(rk3308_codec_dapm_controls),
+static const struct snd_soc_component_driver soc_codec_dev_rk3308_component = {
+ .probe = rk3308_probe,
+ .remove = rk3308_remove,
+ .resume = rk3308_resume,
+ .suspend = rk3308_suspend,
+ .set_bias_level = rk3308_set_bias_level,
+ .controls = rk3308_codec_dapm_controls,
+ .num_controls = ARRAY_SIZE(rk3308_codec_dapm_controls),
+ // .dapm_widgets = rk3308_dapm_widgets,
+ // .num_dapm_widgets = ARRAY_SIZE(rk3308_dapm_widgets),
+ // .dapm_routes = rk3308_dapm_routes,
+ // .num_dapm_routes = ARRAY_SIZE(rk3308_dapm_routes),
+ // .suspend_bias_off = 1,
+ // .idle_bias_on = 1,
+ // .use_pmdown_time = 1,
+ .endianness = 1,
+ .legacy_dai_naming = 1,
};
static const struct reg_default rk3308_codec_reg_defaults[] = {
@@ -4299,14 +4307,14 @@ static irqreturn_t rk3308_codec_hpdet_isr(int irq, void *data)
return IRQ_HANDLED;
}
-void (*rk3308_codec_set_jack_detect_cb)(struct snd_soc_codec *codec,
+void (*rk3308_codec_set_jack_detect_cb)(struct snd_soc_component *component,
struct snd_soc_jack *hpdet_jack);
EXPORT_SYMBOL_GPL(rk3308_codec_set_jack_detect_cb);
-static void rk3308_codec_set_jack_detect(struct snd_soc_codec *codec,
+static void rk3308_codec_set_jack_detect(struct snd_soc_component *component,
struct snd_soc_jack *hpdet_jack)
{
- struct rk3308_codec_priv *rk3308 = snd_soc_codec_get_drvdata(codec);
+ struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
rk3308->hpdet_jack = hpdet_jack;
@@ -5114,10 +5122,10 @@ static int rk3308_platform_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, rk3308);
- ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_rk3308,
+ ret = devm_snd_soc_register_component(&pdev->dev, &soc_codec_dev_rk3308_component,
rk3308_dai, ARRAY_SIZE(rk3308_dai));
if (ret < 0) {
- dev_err(&pdev->dev, "Failed to register codec: %d\n", ret);
+ dev_err(&pdev->dev, "Failed to register component: %d\n", ret);
goto failed;
}
@@ -5140,7 +5148,6 @@ static int rk3308_platform_remove(struct platform_device *pdev)
clk_disable_unprepare(rk3308->mclk_rx);
clk_disable_unprepare(rk3308->mclk_tx);
clk_disable_unprepare(rk3308->pclk);
- snd_soc_unregister_codec(&pdev->dev);
device_unregister(&rk3308->dev);
return 0;
diff --git a/sound/soc/codecs/rk3308_codec_provider.h b/sound/soc/codecs/rk3308_codec_provider.h
index 68042b1328dc..34c1ef86a507 100644
--- a/sound/soc/codecs/rk3308_codec_provider.h
+++ b/sound/soc/codecs/rk3308_codec_provider.h
@@ -21,7 +21,7 @@
#define __RK3308_CODEC_PROVIDER_H__
#ifdef CONFIG_SND_SOC_RK3308
-extern void (*rk3308_codec_set_jack_detect_cb)(struct snd_soc_codec *codec,
+extern void (*rk3308_codec_set_jack_detect_cb)(struct snd_soc_component *component,
struct snd_soc_jack *hpdet_jack);
#endif
--
2.25.1

23
patch/kernel/archive/rockchip64-6.1/board-rockpis-0024-add-uart2-for-debug-rock-pi-s-dts.patch
View File

@@ -1,23 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts 2020-08-30 17:11:49.162572017 +0300
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts 2020-08-30 17:12:00.122550893 +0300
@@ -12,7 +12,7 @@
compatible = "radxa,rockpis", "rockchip,rk3308";
chosen {
- stdout-path = "serial0:1500000n8";
+ stdout-path = "serial2:1500000n8";
};
leds {
@@ -326,6 +326,10 @@
status = "okay";
};
+&uart2 {
+ status = "okay";
+};
+
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_xfer &uart4_rts &uart4_cts>;

31
patch/kernel/archive/rockchip64-6.1/board-rockpis-0026-add-usb-host-otg-dts.patch
View File

@@ -1,31 +0,0 @@
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts 2020-12-01 17:53:08.008768652 +0200
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts 2020-12-01 17:54:29.728826515 +0200
@@ -344,3 +344,28 @@
pinctrl-0 = <&uart4_xfer &uart4_rts &uart4_cts>;
status = "okay";
};
+
+&u2phy {
+ status = "okay";
+
+ u2phy_host: host-port {
+ phy-supply = <&vcc5v0_otg>;
+ status = "okay";
+ };
+
+ u2phy_otg: otg-port {
+ status = "okay";
+ };
+};
+
+&usb20_otg {
+ status = "okay";
+};
+
+&usb_host_ehci {
+ status = "okay";
+};
+
+&usb_host_ohci{
+ status = "okay";
+};

92
patch/kernel/archive/rockchip64-6.1/board-rockpis-0032-iodomains.patch
View File

@@ -1,92 +0,0 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
index 880976849..a7ecfb188 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -192,13 +192,9 @@ &cpu0 {
};
&emmc {
- bus-width = <4>; // Confirm if right value - <8>
+ bus-width = <4>;
cap-mmc-highspeed;
- mmc-hs200-1_8v;
- /* supports-sd; */
- /* disable-wp; */
non-removable;
- /* num-slots = <1>; */
/* please provide actual vmmc and vqmmc supplies
vin is not a valid supply for emmcs */
vin-supply = <&vcc_io>;
@@ -210,13 +206,9 @@ &i2c1 {
};
&sdmmc {
- /* bus-width = <4>; */
cap-mmc-highspeed;
cap-sd-highspeed;
- /* max-frequency = <150000000>; */
- /* supports-sd; */
disable-wp;
- /* num-slots = <1>; */
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;
card-detect-delay = <800>; // Confirm if right value - <200>
status = "okay";
@@ -233,6 +225,16 @@ &gmac {
status = "okay";
};
+&io_domains {
+ vccio0-supply = <&vcc_io>;
+ vccio1-supply = <&vcc_io>;
+ vccio2-supply = <&vcc_io>;
+ vccio3-supply = <&vcc_io>;
+ vccio4-supply = <&vcc_1v8>;
+ vccio5-supply = <&vcc_io>;
+ status = "okay";
+};
+
&i2s_8ch_0 {
assigned-clocks = <&cru SCLK_I2S0_8CH_RX>;
assigned-clock-parents = <&cru SCLK_I2S0_8CH_TX_MUX>;
@@ -246,7 +248,7 @@ &i2s_8ch_2 {
};
&spi2 {
- status = "okay";
+// status = "okay"; //conflicts with UART2
max-freq = <10000000>;
};
@@ -296,15 +298,12 @@ &saradc {
&sdio {
#address-cells = <1>;
#size-cells = <0>;
- /* bus-width = <4>; */
- max-frequency = <1000000>;
cap-sd-highspeed;
cap-sdio-irq;
- /* supports-sdio; */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
- sd-uhs-sdr104;
+ no-mmc;
status = "okay";
rtl8723ds: wifi@1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index fd8685d7c..b1cf9fa77 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -216,6 +216,11 @@ grf: grf@ff000000 {
compatible = "rockchip,rk3308-grf", "syscon", "simple-mfd";
reg = <0x0 0xff000000 0x0 0x08000>;
+ io_domains: io-domains {
+ compatible = "rockchip,rk3308-io-voltage-domain";
+ status = "disabled";
+ };
+
reboot-mode {
compatible = "syscon-reboot-mode";
offset = <0x500>;

152
patch/kernel/archive/rockchip64-6.1/board-rockpis-0033-remove-iodomains.patch
View File

@@ -1,152 +0,0 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
index a7ecfb188..8294deecc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -167,19 +167,6 @@ vcc5v0_otg: vcc5v0-otg {
pinctrl-0 = <&otg_vbus_drv>;
vin-supply = <&vcc5v0_sys>;
};
-
- // wireless-wlan {
- // compatible = "wlan-platdata";
- // rockchip,grf = <&grf>;
- // clocks = <&cru SCLK_WIFI>;
- // clock-names = "clk_wifi";
- // ref-clock-frequency = <24000000>;
- // pinctrl-names = "default";
- // pinctrl-0 = <&wifi_host_wake>;
- // wifi_chip_type = "rtl8723ds";
- // WIFI,host_wake_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
- // status = "okay";
- // };
};
&acodec {
@@ -195,13 +182,6 @@ &emmc {
bus-width = <4>;
cap-mmc-highspeed;
non-removable;
- /* please provide actual vmmc and vqmmc supplies
- vin is not a valid supply for emmcs */
- vin-supply = <&vcc_io>;
- status = "okay";
-};
-
-&i2c1 {
status = "okay";
};
@@ -214,6 +194,26 @@ &sdmmc {
status = "okay";
};
+&sdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ no-mmc;
+ status = "okay";
+
+ rtl8723ds: wifi@1 {
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_host_wake>;
+ };
+};
+
&gmac {
phy-supply = <&vcc_phy>;
clock_in_out = "output";
@@ -225,16 +225,6 @@ &gmac {
status = "okay";
};
-&io_domains {
- vccio0-supply = <&vcc_io>;
- vccio1-supply = <&vcc_io>;
- vccio2-supply = <&vcc_io>;
- vccio3-supply = <&vcc_io>;
- vccio4-supply = <&vcc_1v8>;
- vccio5-supply = <&vcc_io>;
- status = "okay";
-};
-
&i2s_8ch_0 {
assigned-clocks = <&cru SCLK_I2S0_8CH_RX>;
assigned-clock-parents = <&cru SCLK_I2S0_8CH_TX_MUX>;
@@ -247,11 +237,6 @@ &i2s_8ch_2 {
#sound-dai-cells = <0>;
};
-&spi2 {
-// status = "okay"; //conflicts with UART2
- max-freq = <10000000>;
-};
-
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&rtc_32k>;
@@ -295,32 +280,21 @@ &saradc {
status = "okay";
};
-&sdio {
- #address-cells = <1>;
- #size-cells = <0>;
- cap-sd-highspeed;
- cap-sdio-irq;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- no-mmc;
- status = "okay";
-
- rtl8723ds: wifi@1 {
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
- interrupt-names = "host-wake";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_host_wake>;
- };
-};
-
&tsadc {
rockchip,hw-tshut-mode = <0>; /* 0:CRU */
rockchip,hw-tshut-polarity = <1>; /* 1:HIGH */
status = "okay";
};
+&i2c1 {
+ status = "okay";
+};
+
+&spi2 {
+// status = "okay"; //conflicts with UART2
+ max-freq = <10000000>;
+};
+
&uart0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index b1cf9fa77..fd8685d7c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -216,11 +216,6 @@ grf: grf@ff000000 {
compatible = "rockchip,rk3308-grf", "syscon", "simple-mfd";
reg = <0x0 0xff000000 0x0 0x08000>;
- io_domains: io-domains {
- compatible = "rockchip,rk3308-io-voltage-domain";
- status = "disabled";
- };
-
reboot-mode {
compatible = "syscon-reboot-mode";
offset = <0x500>;

0
patch/kernel/archive/rockchip64-6.1/board-rockpis-0031-arm64-dts-rk3399-rockpro64-Add-pcie-bus-scan-delay.patch → patch/kernel/archive/rockchip64-6.1/board-rockpro64-0001-Add-pcie-bus-scan-delay.patch
View File