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Revert "powerpc: ppc4xx: remove lwmon5 support"
This reverts commit 8fe11b8901.
I'll add support to lwmon5 in the next patch and will remove
support for the broken lcd4_lwmon5 as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Stefan Roese
Tom Rini
@@ -8,6 +8,10 @@ choice
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prompt "Target select"
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optional
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config TARGET_LWMON5
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bool "Support lwmon5"
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select SUPPORT_SPL
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config TARGET_T3CORP
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bool "Support t3corp"
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@@ -165,6 +169,7 @@ source "board/gdsys/405ex/Kconfig"
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source "board/gdsys/dlvision/Kconfig"
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source "board/gdsys/gdppc440etx/Kconfig"
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source "board/gdsys/intip/Kconfig"
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source "board/lwmon5/Kconfig"
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source "board/mosaixtech/icon/Kconfig"
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source "board/mpl/mip405/Kconfig"
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source "board/mpl/pip405/Kconfig"
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@@ -106,6 +106,12 @@ struct arch_global_data {
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#ifdef CONFIG_SYS_FPGA_COUNT
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unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
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#endif
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#if defined(CONFIG_WD_MAX_RATE)
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unsigned long long wdt_last; /* trace watch-dog triggering rate */
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#endif
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#if defined(CONFIG_LWMON5)
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unsigned long kbd_status;
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#endif
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};
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#include <asm-generic/global_data.h>
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@@ -0,0 +1,9 @@
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if TARGET_LWMON5
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config SYS_BOARD
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default "lwmon5"
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config SYS_CONFIG_NAME
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default "lwmon5"
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endif
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@@ -0,0 +1,7 @@
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LWMON5 BOARD
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M: Stefan Roese <sr@denx.de>
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S: Maintained
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F: board/lwmon5/
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F: include/configs/lwmon5.h
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F: configs/lcd4_lwmon5_defconfig
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F: configs/lwmon5_defconfig
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@@ -0,0 +1,9 @@
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#
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# (C) Copyright 2002-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y = lwmon5.o kbd.o sdram.o
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extra-y += init.o
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@@ -0,0 +1,18 @@
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#
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# (C) Copyright 2002
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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# lwmon5 (440EPx)
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#
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PLATFORM_CPPFLAGS += -DCONFIG_440=1
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ifeq ($(debug),1)
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PLATFORM_CPPFLAGS += -DDEBUG
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endif
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ifeq ($(dbcr),1)
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PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000
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endif
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@@ -0,0 +1,75 @@
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/*
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* (C) Copyright 2007
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm-offsets.h>
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#include <ppc_asm.tmpl>
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#include <config.h>
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#include <asm/mmu.h>
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/**************************************************************************
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* TLB TABLE
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*
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* This table is used by the cpu boot code to setup the initial tlb
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* entries. Rather than make broad assumptions in the cpu source tree,
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* this table lets each board set things up however they like.
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*
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* Pointer to the table is returned in r1
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*
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*************************************************************************/
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.section .bootpg,"ax"
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.globl tlbtab
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tlbtab:
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tlbtab_start
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/*
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* BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
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* speed up boot process. It is patched after relocation to enable SA_I
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*/
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tlbentry(CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 1, AC_RWX | SA_G)
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/*
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* TLB entries for SDRAM are not needed on this platform.
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* They are dynamically generated in the SPD DDR(2) detection
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* routine.
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*/
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#ifdef CONFIG_SYS_INIT_RAM_DCACHE
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/* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
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tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_4K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G)
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#endif
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/* TLB-entry for PCI Memory */
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tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 1, AC_RW | SA_IG)
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tlbentry(CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 1, AC_RW | SA_IG)
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tlbentry(CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 1, AC_RW | SA_IG)
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tlbentry(CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 1, AC_RW | SA_IG)
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/* TLB-entry for the FPGA Chip select 2 */
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tlbentry(CONFIG_SYS_FPGA_BASE_0, SZ_1M, CONFIG_SYS_FPGA_BASE_0, 1, AC_RWX | SA_I|SA_G)
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/* TLB-entry for the FPGA Chip select 3 */
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tlbentry(CONFIG_SYS_FPGA_BASE_1, SZ_1M, CONFIG_SYS_FPGA_BASE_1, 1,AC_RWX | SA_I|SA_G)
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/* TLB-entry for the LIME Controller */
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tlbentry(CONFIG_SYS_LIME_BASE_0, SZ_16M, CONFIG_SYS_LIME_BASE_0, 1, AC_RWX | SA_I|SA_G)
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tlbentry(CONFIG_SYS_LIME_BASE_1, SZ_16M, CONFIG_SYS_LIME_BASE_1, 1, AC_RWX | SA_I|SA_G)
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tlbentry(CONFIG_SYS_LIME_BASE_2, SZ_16M, CONFIG_SYS_LIME_BASE_2, 1, AC_RWX | SA_I|SA_G)
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tlbentry(CONFIG_SYS_LIME_BASE_3, SZ_16M, CONFIG_SYS_LIME_BASE_3, 1, AC_RWX | SA_I|SA_G)
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/* TLB-entry for Internal Registers & OCM */
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tlbentry(0xe0000000, SZ_16M, 0xe0000000, 0, AC_RWX | SA_I)
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/*TLB-entry PCI registers*/
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tlbentry(0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_RWX | SA_IG)
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/* TLB-entry for peripherals */
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tlbentry(0xEF000000, SZ_16M, 0xEF000000, 1, AC_RWX | SA_IG)
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tlbtab_end
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@@ -0,0 +1,490 @@
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/*
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* (C) Copyright 2007
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* (C) Copyright 2001, 2002
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* DENX Software Engineering
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* Wolfgang Denk, wd@denx.de
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/* define DEBUG for debugging output (obviously ;-)) */
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#if 0
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#define DEBUG
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#endif
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#include <common.h>
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#include <i2c.h>
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#include <command.h>
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#include <post.h>
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#include <serial.h>
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#include <malloc.h>
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#include <linux/types.h>
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#include <linux/string.h> /* for strdup */
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DECLARE_GLOBAL_DATA_PTR;
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static void kbd_init (void);
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static int compare_magic (uchar *kbd_data, uchar *str);
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/*--------------------- Local macros and constants --------------------*/
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#define _NOT_USED_ 0xFFFFFFFF
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/*------------------------- dspic io expander -----------------------*/
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#define DSPIC_PON_STATUS_REG 0x80A
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#define DSPIC_PON_INV_STATUS_REG 0x80C
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#define DSPIC_PON_KEY_REG 0x810
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/*------------------------- Keyboard controller -----------------------*/
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/* command codes */
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#define KEYBD_CMD_READ_KEYS 0x01
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#define KEYBD_CMD_READ_VERSION 0x02
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#define KEYBD_CMD_READ_STATUS 0x03
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#define KEYBD_CMD_RESET_ERRORS 0x10
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/* status codes */
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#define KEYBD_STATUS_MASK 0x3F
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#define KEYBD_STATUS_H_RESET 0x20
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#define KEYBD_STATUS_BROWNOUT 0x10
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#define KEYBD_STATUS_WD_RESET 0x08
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#define KEYBD_STATUS_OVERLOAD 0x04
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#define KEYBD_STATUS_ILLEGAL_WR 0x02
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#define KEYBD_STATUS_ILLEGAL_RD 0x01
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/* Number of bytes returned from Keyboard Controller */
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#define KEYBD_VERSIONLEN 2 /* version information */
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/*
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* This is different from the "old" lwmon dsPIC kbd controller
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* implementation. Now the controller still answers with 9 bytes,
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* but the last 3 bytes are always "0x06 0x07 0x08". So we just
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* set the length to compare to 6 instead of 9.
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*/
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#define KEYBD_DATALEN 6 /* normal key scan data */
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/* maximum number of "magic" key codes that can be assigned */
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static uchar kbd_addr = CONFIG_SYS_I2C_KEYBD_ADDR;
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static uchar dspic_addr = CONFIG_SYS_I2C_DSPIC_IO_ADDR;
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static uchar *key_match (uchar *);
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#define KEYBD_SET_DEBUGMODE '#' /* Magic key to enable debug output */
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/***********************************************************************
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F* Function: int board_postclk_init (void) P*A*Z*
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*
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P* Parameters: none
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P*
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P* Returnvalue: int
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P* - 0 is always returned.
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*
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Z* Intention: This function is the board_postclk_init() method implementation
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Z* for the lwmon board.
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*
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***********************************************************************/
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int board_postclk_init (void)
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{
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kbd_init();
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return (0);
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}
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static void kbd_init (void)
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{
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uchar kbd_data[KEYBD_DATALEN];
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uchar tmp_data[KEYBD_DATALEN];
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uchar val, errcd;
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int i;
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i2c_set_bus_num(0);
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gd->arch.kbd_status = 0;
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/* Forced by PIC. Delays <= 175us loose */
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udelay(1000);
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/* Read initial keyboard error code */
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val = KEYBD_CMD_READ_STATUS;
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i2c_write (kbd_addr, 0, 0, &val, 1);
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i2c_read (kbd_addr, 0, 0, &errcd, 1);
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/* clear unused bits */
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errcd &= KEYBD_STATUS_MASK;
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/* clear "irrelevant" bits. Recommended by Martin Rajek, LWN */
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errcd &= ~(KEYBD_STATUS_H_RESET|KEYBD_STATUS_BROWNOUT);
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if (errcd) {
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gd->arch.kbd_status |= errcd << 8;
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}
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/* Reset error code and verify */
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val = KEYBD_CMD_RESET_ERRORS;
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i2c_write (kbd_addr, 0, 0, &val, 1);
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udelay(1000); /* delay NEEDED by keyboard PIC !!! */
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val = KEYBD_CMD_READ_STATUS;
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i2c_write (kbd_addr, 0, 0, &val, 1);
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i2c_read (kbd_addr, 0, 0, &val, 1);
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val &= KEYBD_STATUS_MASK; /* clear unused bits */
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if (val) { /* permanent error, report it */
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gd->arch.kbd_status |= val;
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return;
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}
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/*
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* Read current keyboard state.
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*
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* After the error reset it may take some time before the
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* keyboard PIC picks up a valid keyboard scan - the total
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* scan time is approx. 1.6 ms (information by Martin Rajek,
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* 28 Sep 2002). We read a couple of times for the keyboard
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* to stabilize, using a big enough delay.
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* 10 times should be enough. If the data is still changing,
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* we use what we get :-(
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*/
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memset (tmp_data, 0xFF, KEYBD_DATALEN); /* impossible value */
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for (i=0; i<10; ++i) {
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val = KEYBD_CMD_READ_KEYS;
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i2c_write (kbd_addr, 0, 0, &val, 1);
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i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
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if (memcmp(kbd_data, tmp_data, KEYBD_DATALEN) == 0) {
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/* consistent state, done */
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break;
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}
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/* remeber last state, delay, and retry */
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memcpy (tmp_data, kbd_data, KEYBD_DATALEN);
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udelay (5000);
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}
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}
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/* Read a register from the dsPIC. */
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int _dspic_read(ushort reg, ushort *data)
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{
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uchar buf[sizeof(*data)];
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int rval;
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||||
|
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if (i2c_read(dspic_addr, reg, 2, buf, 2))
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return -1;
|
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rval = i2c_read(dspic_addr, reg, sizeof(reg), buf, sizeof(*data));
|
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*data = (buf[0] << 8) | buf[1];
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return rval;
|
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}
|
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|
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|
||||
/***********************************************************************
|
||||
F* Function: int misc_init_r (void) P*A*Z*
|
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*
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P* Parameters: none
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P*
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P* Returnvalue: int
|
||||
P* - 0 is always returned, even in the case of a keyboard
|
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P* error.
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*
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Z* Intention: This function is the misc_init_r() method implementation
|
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Z* for the lwmon board.
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Z* The keyboard controller is initialized and the result
|
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Z* of a read copied to the environment variable "keybd".
|
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Z* If KEYBD_SET_DEBUGMODE is defined, a check is made for
|
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Z* this key, and if found display to the LCD will be enabled.
|
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Z* The keys in "keybd" are checked against the magic
|
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Z* keycommands defined in the environment.
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Z* See also key_match().
|
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*
|
||||
D* Design: wd@denx.de
|
||||
C* Coding: wd@denx.de
|
||||
V* Verification: dzu@denx.de
|
||||
***********************************************************************/
|
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int misc_init_r_kbd (void)
|
||||
{
|
||||
uchar kbd_data[KEYBD_DATALEN];
|
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char keybd_env[2 * KEYBD_DATALEN + 1];
|
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uchar kbd_init_status = gd->arch.kbd_status >> 8;
|
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uchar kbd_status = gd->arch.kbd_status;
|
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uchar val;
|
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ushort data, inv_data;
|
||||
char *str;
|
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int i;
|
||||
|
||||
if (kbd_init_status) {
|
||||
printf ("KEYBD: Error %02X\n", kbd_init_status);
|
||||
}
|
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if (kbd_status) { /* permanent error, report it */
|
||||
printf ("*** Keyboard error code %02X ***\n", kbd_status);
|
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sprintf (keybd_env, "%02X", kbd_status);
|
||||
setenv ("keybd", keybd_env);
|
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return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Now we know that we have a working keyboard, so disable
|
||||
* all output to the LCD except when a key press is detected.
|
||||
*/
|
||||
|
||||
if ((console_assign (stdout, "serial") < 0) ||
|
||||
(console_assign (stderr, "serial") < 0)) {
|
||||
printf ("Can't assign serial port as output device\n");
|
||||
}
|
||||
|
||||
/* Read Version */
|
||||
val = KEYBD_CMD_READ_VERSION;
|
||||
i2c_write (kbd_addr, 0, 0, &val, 1);
|
||||
i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_VERSIONLEN);
|
||||
printf ("KEYBD: Version %d.%d\n", kbd_data[0], kbd_data[1]);
|
||||
|
||||
/* Read current keyboard state */
|
||||
val = KEYBD_CMD_READ_KEYS;
|
||||
i2c_write (kbd_addr, 0, 0, &val, 1);
|
||||
i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
|
||||
|
||||
/* read out start key from bse01 received via can */
|
||||
_dspic_read(DSPIC_PON_STATUS_REG, &data);
|
||||
/* check highbyte from status register */
|
||||
if (data > 0xFF) {
|
||||
_dspic_read(DSPIC_PON_INV_STATUS_REG, &inv_data);
|
||||
|
||||
/* check inverse data */
|
||||
if ((data+inv_data) == 0xFFFF) {
|
||||
/* don't overwrite local key */
|
||||
if (kbd_data[1] == 0) {
|
||||
/* read key value */
|
||||
_dspic_read(DSPIC_PON_KEY_REG, &data);
|
||||
str = (char *)&data;
|
||||
/* swap bytes */
|
||||
kbd_data[1] = str[1];
|
||||
kbd_data[2] = str[0];
|
||||
printf("CAN received startkey: 0x%X\n", data);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
for (i = 0; i < KEYBD_DATALEN; ++i) {
|
||||
sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
|
||||
}
|
||||
|
||||
setenv ("keybd", keybd_env);
|
||||
|
||||
str = strdup ((char *)key_match (kbd_data)); /* decode keys */
|
||||
#ifdef KEYBD_SET_DEBUGMODE
|
||||
if (kbd_data[0] == KEYBD_SET_DEBUGMODE) { /* set debug mode */
|
||||
if ((console_assign (stdout, "lcd") < 0) ||
|
||||
(console_assign (stderr, "lcd") < 0)) {
|
||||
printf ("Can't assign LCD display as output device\n");
|
||||
}
|
||||
}
|
||||
#endif /* KEYBD_SET_DEBUGMODE */
|
||||
#ifdef CONFIG_PREBOOT /* automatically configure "preboot" command on key match */
|
||||
setenv ("preboot", str); /* set or delete definition */
|
||||
#endif /* CONFIG_PREBOOT */
|
||||
if (str != NULL) {
|
||||
free (str);
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PREBOOT
|
||||
|
||||
static uchar kbd_magic_prefix[] = "key_magic";
|
||||
static uchar kbd_command_prefix[] = "key_cmd";
|
||||
|
||||
static int compare_magic (uchar *kbd_data, uchar *str)
|
||||
{
|
||||
uchar compare[KEYBD_DATALEN-1];
|
||||
char *nxt;
|
||||
int i;
|
||||
|
||||
/* Don't include modifier byte */
|
||||
memcpy (compare, kbd_data+1, KEYBD_DATALEN-1);
|
||||
|
||||
for (; str != NULL; str = (*nxt) ? (uchar *)(nxt+1) : (uchar *)nxt) {
|
||||
uchar c;
|
||||
int k;
|
||||
|
||||
c = (uchar) simple_strtoul ((char *)str, (char **) (&nxt), 16);
|
||||
|
||||
if (str == (uchar *)nxt) { /* invalid character */
|
||||
break;
|
||||
}
|
||||
|
||||
/*
|
||||
* Check if this key matches the input.
|
||||
* Set matches to zero, so they match only once
|
||||
* and we can find duplicates or extra keys
|
||||
*/
|
||||
for (k = 0; k < sizeof(compare); ++k) {
|
||||
if (compare[k] == '\0') /* only non-zero entries */
|
||||
continue;
|
||||
if (c == compare[k]) { /* found matching key */
|
||||
compare[k] = '\0';
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (k == sizeof(compare)) {
|
||||
return -1; /* unmatched key */
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* A full match leaves no keys in the `compare' array,
|
||||
*/
|
||||
for (i = 0; i < sizeof(compare); ++i) {
|
||||
if (compare[i])
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/***********************************************************************
|
||||
F* Function: static uchar *key_match (uchar *kbd_data) P*A*Z*
|
||||
*
|
||||
P* Parameters: uchar *kbd_data
|
||||
P* - The keys to match against our magic definitions
|
||||
P*
|
||||
P* Returnvalue: uchar *
|
||||
P* - != NULL: Pointer to the corresponding command(s)
|
||||
P* NULL: No magic is about to happen
|
||||
*
|
||||
Z* Intention: Check if pressed key(s) match magic sequence,
|
||||
Z* and return the command string associated with that key(s).
|
||||
Z*
|
||||
Z* If no key press was decoded, NULL is returned.
|
||||
Z*
|
||||
Z* Note: the first character of the argument will be
|
||||
Z* overwritten with the "magic charcter code" of the
|
||||
Z* decoded key(s), or '\0'.
|
||||
Z*
|
||||
Z* Note: the string points to static environment data
|
||||
Z* and must be saved before you call any function that
|
||||
Z* modifies the environment.
|
||||
*
|
||||
D* Design: wd@denx.de
|
||||
C* Coding: wd@denx.de
|
||||
V* Verification: dzu@denx.de
|
||||
***********************************************************************/
|
||||
static uchar *key_match (uchar *kbd_data)
|
||||
{
|
||||
char magic[sizeof (kbd_magic_prefix) + 1];
|
||||
uchar *suffix;
|
||||
char *kbd_magic_keys;
|
||||
|
||||
/*
|
||||
* The following string defines the characters that can pe appended
|
||||
* to "key_magic" to form the names of environment variables that
|
||||
* hold "magic" key codes, i. e. such key codes that can cause
|
||||
* pre-boot actions. If the string is empty (""), then only
|
||||
* "key_magic" is checked (old behaviour); the string "125" causes
|
||||
* checks for "key_magic1", "key_magic2" and "key_magic5", etc.
|
||||
*/
|
||||
if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
|
||||
kbd_magic_keys = "";
|
||||
|
||||
/* loop over all magic keys;
|
||||
* use '\0' suffix in case of empty string
|
||||
*/
|
||||
for (suffix=(uchar *)kbd_magic_keys; *suffix || suffix==(uchar *)kbd_magic_keys; ++suffix) {
|
||||
sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
|
||||
debug ("### Check magic \"%s\"\n", magic);
|
||||
if (compare_magic(kbd_data, (uchar *)getenv(magic)) == 0) {
|
||||
char cmd_name[sizeof (kbd_command_prefix) + 1];
|
||||
char *cmd;
|
||||
|
||||
sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
|
||||
|
||||
cmd = getenv (cmd_name);
|
||||
debug ("### Set PREBOOT to $(%s): \"%s\"\n",
|
||||
cmd_name, cmd ? cmd : "<<NULL>>");
|
||||
*kbd_data = *suffix;
|
||||
return ((uchar *)cmd);
|
||||
}
|
||||
}
|
||||
debug ("### Delete PREBOOT\n");
|
||||
*kbd_data = '\0';
|
||||
return (NULL);
|
||||
}
|
||||
#endif /* CONFIG_PREBOOT */
|
||||
|
||||
/***********************************************************************
|
||||
F* Function: int do_kbd (cmd_tbl_t *cmdtp, int flag,
|
||||
F* int argc, char * const argv[]) P*A*Z*
|
||||
*
|
||||
P* Parameters: cmd_tbl_t *cmdtp
|
||||
P* - Pointer to our command table entry
|
||||
P* int flag
|
||||
P* - If the CMD_FLAG_REPEAT bit is set, then this call is
|
||||
P* a repetition
|
||||
P* int argc
|
||||
P* - Argument count
|
||||
P* char * const argv[]
|
||||
P* - Array of the actual arguments
|
||||
P*
|
||||
P* Returnvalue: int
|
||||
P* - 0 is always returned.
|
||||
*
|
||||
Z* Intention: Implement the "kbd" command.
|
||||
Z* The keyboard status is read. The result is printed on
|
||||
Z* the console and written into the "keybd" environment
|
||||
Z* variable.
|
||||
*
|
||||
D* Design: wd@denx.de
|
||||
C* Coding: wd@denx.de
|
||||
V* Verification: dzu@denx.de
|
||||
***********************************************************************/
|
||||
int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
||||
{
|
||||
uchar kbd_data[KEYBD_DATALEN];
|
||||
char keybd_env[2 * KEYBD_DATALEN + 1];
|
||||
uchar val;
|
||||
int i;
|
||||
|
||||
#if 0 /* Done in kbd_init */
|
||||
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
|
||||
#endif
|
||||
|
||||
/* Read keys */
|
||||
val = KEYBD_CMD_READ_KEYS;
|
||||
i2c_write (kbd_addr, 0, 0, &val, 1);
|
||||
i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
|
||||
|
||||
puts ("Keys:");
|
||||
for (i = 0; i < KEYBD_DATALEN; ++i) {
|
||||
sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
|
||||
printf (" %02x", kbd_data[i]);
|
||||
}
|
||||
putc ('\n');
|
||||
setenv ("keybd", keybd_env);
|
||||
return 0;
|
||||
}
|
||||
|
||||
U_BOOT_CMD(
|
||||
kbd, 1, 1, do_kbd,
|
||||
"read keyboard status",
|
||||
""
|
||||
);
|
||||
|
||||
/*----------------------------- Utilities -----------------------------*/
|
||||
|
||||
#ifdef CONFIG_POST
|
||||
/*
|
||||
* Returns 1 if keys pressed to start the power-on long-running tests
|
||||
* Called from board_init_f().
|
||||
*/
|
||||
int post_hotkeys_pressed(void)
|
||||
{
|
||||
uchar kbd_data[KEYBD_DATALEN];
|
||||
uchar val;
|
||||
|
||||
/* Read keys */
|
||||
val = KEYBD_CMD_READ_KEYS;
|
||||
i2c_write (kbd_addr, 0, 0, &val, 1);
|
||||
i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
|
||||
|
||||
return (compare_magic(kbd_data, (uchar *)CONFIG_POST_KEY_MAGIC) == 0);
|
||||
}
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,247 @@
|
||||
/*
|
||||
* (C) Copyright 2006
|
||||
* Sylvie Gohl, AMCC/IBM, gohl.sylvie@fr.ibm.com
|
||||
* Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
|
||||
* Thierry Roman, AMCC/IBM, thierry_roman@fr.ibm.com
|
||||
* Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com
|
||||
* Robert Snyder, AMCC/IBM, rob.snyder@fr.ibm.com
|
||||
*
|
||||
* (C) Copyright 2007-2013
|
||||
* Stefan Roese, DENX Software Engineering, sr@denx.de.
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
/* define DEBUG for debugging output (obviously ;-)) */
|
||||
#if 0
|
||||
#define DEBUG
|
||||
#endif
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/mmu.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/cache.h>
|
||||
#include <asm/ppc440.h>
|
||||
#include <watchdog.h>
|
||||
|
||||
/*
|
||||
* This DDR2 setup code can dynamically setup the TLB entries for the DDR2 memory
|
||||
* region. Right now the cache should still be disabled in U-Boot because of the
|
||||
* EMAC driver, that need it's buffer descriptor to be located in non cached
|
||||
* memory.
|
||||
*
|
||||
* If at some time this restriction doesn't apply anymore, just define
|
||||
* CONFIG_4xx_DCACHE in the board config file and this code should setup
|
||||
* everything correctly.
|
||||
*/
|
||||
#ifdef CONFIG_4xx_DCACHE
|
||||
#define MY_TLB_WORD2_I_ENABLE 0 /* enable caching on SDRAM */
|
||||
#else
|
||||
#define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE /* disable caching on SDRAM */
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------------+
|
||||
* Prototypes
|
||||
*-----------------------------------------------------------------------------*/
|
||||
extern int denali_wait_for_dlllock(void);
|
||||
extern void denali_core_search_data_eye(void);
|
||||
extern void dcbz_area(u32 start_address, u32 num_bytes);
|
||||
|
||||
static u32 is_ecc_enabled(void)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
mfsdram(DDR0_22, val);
|
||||
val &= DDR0_22_CTRL_RAW_MASK;
|
||||
if (val)
|
||||
return 1;
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
void board_add_ram_info(int use_default)
|
||||
{
|
||||
PPC4xx_SYS_INFO board_cfg;
|
||||
u32 val;
|
||||
|
||||
if (is_ecc_enabled())
|
||||
puts(" (ECC");
|
||||
else
|
||||
puts(" (ECC not");
|
||||
|
||||
get_sys_info(&board_cfg);
|
||||
printf(" enabled, %ld MHz", (board_cfg.freqPLB * 2) / 1000000);
|
||||
|
||||
mfsdram(DDR0_03, val);
|
||||
val = DDR0_03_CASLAT_DECODE(val);
|
||||
printf(", CL%d)", val);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_DDR_ECC
|
||||
static void wait_ddr_idle(void)
|
||||
{
|
||||
/*
|
||||
* Controller idle status cannot be determined for Denali
|
||||
* DDR2 code. Just return here.
|
||||
*/
|
||||
}
|
||||
|
||||
static void program_ecc(u32 start_address,
|
||||
u32 num_bytes,
|
||||
u32 tlb_word2_i_value)
|
||||
{
|
||||
u32 val;
|
||||
u32 current_addr = start_address;
|
||||
u32 size;
|
||||
int bytes_remaining;
|
||||
|
||||
sync();
|
||||
wait_ddr_idle();
|
||||
|
||||
/*
|
||||
* Because of 440EPx errata CHIP 11, we don't touch the last 256
|
||||
* bytes of SDRAM.
|
||||
*/
|
||||
bytes_remaining = num_bytes - CONFIG_SYS_MEM_TOP_HIDE;
|
||||
|
||||
/*
|
||||
* We have to write the ECC bytes by zeroing and flushing in smaller
|
||||
* steps, since the whole 256MByte takes too long for the external
|
||||
* watchdog.
|
||||
*/
|
||||
while (bytes_remaining > 0) {
|
||||
size = min((64 << 20), bytes_remaining);
|
||||
|
||||
/* Write zero's to SDRAM */
|
||||
dcbz_area(current_addr, size);
|
||||
|
||||
/* Write modified dcache lines back to memory */
|
||||
clean_dcache_range(current_addr, current_addr + size);
|
||||
|
||||
current_addr += 64 << 20;
|
||||
bytes_remaining -= 64 << 20;
|
||||
WATCHDOG_RESET();
|
||||
}
|
||||
|
||||
sync();
|
||||
wait_ddr_idle();
|
||||
|
||||
/* Clear error status */
|
||||
mfsdram(DDR0_00, val);
|
||||
mtsdram(DDR0_00, val | DDR0_00_INT_ACK_ALL);
|
||||
|
||||
/* Set 'int_mask' parameter to functionnal value */
|
||||
mfsdram(DDR0_01, val);
|
||||
mtsdram(DDR0_01, ((val &~ DDR0_01_INT_MASK_MASK) | DDR0_01_INT_MASK_ALL_OFF));
|
||||
|
||||
sync();
|
||||
wait_ddr_idle();
|
||||
}
|
||||
#endif
|
||||
|
||||
/*************************************************************************
|
||||
*
|
||||
* initdram -- 440EPx's DDR controller is a DENALI Core
|
||||
*
|
||||
************************************************************************/
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_LCD4_LWMON5)
|
||||
/* CL=4 */
|
||||
mtsdram(DDR0_02, 0x00000000);
|
||||
|
||||
mtsdram(DDR0_00, 0x0000190A);
|
||||
mtsdram(DDR0_01, 0x01000000);
|
||||
mtsdram(DDR0_03, 0x02040803); /* A suitable burst length was taken. CAS is right for our board */
|
||||
|
||||
mtsdram(DDR0_04, 0x0B030300);
|
||||
mtsdram(DDR0_05, 0x02020308);
|
||||
mtsdram(DDR0_06, 0x0003C812);
|
||||
mtsdram(DDR0_07, 0x00090100);
|
||||
mtsdram(DDR0_08, 0x03c80001);
|
||||
mtsdram(DDR0_09, 0x00011D5F);
|
||||
mtsdram(DDR0_10, 0x00000100);
|
||||
mtsdram(DDR0_11, 0x000CC800);
|
||||
mtsdram(DDR0_12, 0x00000003);
|
||||
mtsdram(DDR0_14, 0x00000000);
|
||||
mtsdram(DDR0_17, 0x1e000000);
|
||||
mtsdram(DDR0_18, 0x1e1e1e1e);
|
||||
mtsdram(DDR0_19, 0x1e1e1e1e);
|
||||
mtsdram(DDR0_20, 0x0B0B0B0B);
|
||||
mtsdram(DDR0_21, 0x0B0B0B0B);
|
||||
#ifdef CONFIG_DDR_ECC
|
||||
mtsdram(DDR0_22, 0x00267F0B | DDR0_22_CTRL_RAW_ECC_ENABLE); /* enable ECC */
|
||||
#else
|
||||
mtsdram(DDR0_22, 0x00267F0B);
|
||||
#endif
|
||||
|
||||
mtsdram(DDR0_23, 0x01000000);
|
||||
mtsdram(DDR0_24, 0x01010001);
|
||||
|
||||
mtsdram(DDR0_26, 0x2D93028A);
|
||||
mtsdram(DDR0_27, 0x0784682B);
|
||||
|
||||
mtsdram(DDR0_28, 0x00000080);
|
||||
mtsdram(DDR0_31, 0x00000000);
|
||||
mtsdram(DDR0_42, 0x01000008);
|
||||
|
||||
mtsdram(DDR0_43, 0x050A0200);
|
||||
mtsdram(DDR0_44, 0x00000005);
|
||||
mtsdram(DDR0_02, 0x00000001); /* Activate the denali core */
|
||||
|
||||
denali_wait_for_dlllock();
|
||||
|
||||
#if defined(CONFIG_DDR_DATA_EYE)
|
||||
/* -----------------------------------------------------------+
|
||||
* Perform data eye search if requested.
|
||||
* ----------------------------------------------------------*/
|
||||
program_tlb(0, CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MBYTES_SDRAM << 20,
|
||||
TLB_WORD2_I_ENABLE);
|
||||
denali_core_search_data_eye();
|
||||
remove_tlb(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MBYTES_SDRAM << 20);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Program tlb entries for this size (dynamic)
|
||||
*/
|
||||
program_tlb(0, CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MBYTES_SDRAM << 20,
|
||||
MY_TLB_WORD2_I_ENABLE);
|
||||
|
||||
#if defined(CONFIG_DDR_ECC)
|
||||
#if defined(CONFIG_4xx_DCACHE)
|
||||
/*
|
||||
* If ECC is enabled, initialize the parity bits.
|
||||
*/
|
||||
program_ecc(0, CONFIG_SYS_MBYTES_SDRAM << 20, 0);
|
||||
#else /* CONFIG_4xx_DCACHE */
|
||||
/*
|
||||
* Setup 2nd TLB with same physical address but different virtual address
|
||||
* with cache enabled. This is done for fast ECC generation.
|
||||
*/
|
||||
program_tlb(0, CONFIG_SYS_DDR_CACHED_ADDR, CONFIG_SYS_MBYTES_SDRAM << 20, 0);
|
||||
|
||||
/*
|
||||
* If ECC is enabled, initialize the parity bits.
|
||||
*/
|
||||
program_ecc(CONFIG_SYS_DDR_CACHED_ADDR, CONFIG_SYS_MBYTES_SDRAM << 20, 0);
|
||||
|
||||
/*
|
||||
* Now after initialization (auto-calibration and ECC generation)
|
||||
* remove the TLB entries with caches enabled and program again with
|
||||
* desired cache functionality
|
||||
*/
|
||||
remove_tlb(CONFIG_SYS_DDR_CACHED_ADDR, CONFIG_SYS_MBYTES_SDRAM << 20);
|
||||
#endif /* CONFIG_4xx_DCACHE */
|
||||
#endif /* CONFIG_DDR_ECC */
|
||||
|
||||
/*
|
||||
* Clear possible errors resulting from data-eye-search.
|
||||
* If not done, then we could get an interrupt later on when
|
||||
* exceptions are enabled.
|
||||
*/
|
||||
set_mcsr(get_mcsr());
|
||||
#endif /* CONFIG_SPL_BUILD */
|
||||
|
||||
return (CONFIG_SYS_MBYTES_SDRAM << 20);
|
||||
}
|
||||
@@ -0,0 +1,6 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_4xx=y
|
||||
CONFIG_TARGET_LWMON5=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="LCD4_LWMON5"
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
@@ -0,0 +1,4 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_4xx=y
|
||||
CONFIG_TARGET_LWMON5=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
@@ -19,7 +19,6 @@ zeus powerpc ppc4xx - - Stefan Roese
|
||||
sbc405 powerpc ppc4xx - -
|
||||
pcs440ep powerpc ppc4xx - - Stefan Roese <sr@denx.de>
|
||||
p3p440 powerpc ppc4xx - - Stefan Roese <sr@denx.de>
|
||||
lwmon5 powerpc ppc4xx - - Stefan Roese <sr@denx.de>
|
||||
csb272/csb472 powerpc ppc4xx - - Tolunay Orkun <torkun@nextio.com>
|
||||
alpr powerpc ppc4xx - - Stefan Roese <sr@denx.de>
|
||||
cam_enc_4xx arm arm926ejs 8d775763 2015-08-20 Heiko Schocher <hs@denx.de>
|
||||
|
||||
@@ -419,7 +419,8 @@ void *video_hw_init (void)
|
||||
board_disp_init ();
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SOCRATES) && !(CONFIG_POST & CONFIG_SYS_POST_SYSMON)
|
||||
#if (defined(CONFIG_LWMON5) || \
|
||||
defined(CONFIG_SOCRATES)) && !(CONFIG_POST & CONFIG_SYS_POST_SYSMON)
|
||||
/* Lamp on */
|
||||
board_backlight_switch (1);
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user