mirror of
https://github.com/archr-linux/Arch-R.git
synced 2026-03-31 14:41:55 -07:00
Allwinner: linux: reorganize patches
This commit is contained in:
Jernej Skrabec
@@ -0,0 +1,53 @@
|
||||
From ff9ed48eb584e583e20509af6cde1ba80ebd3edd Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Date: Sat, 16 Jan 2021 10:49:00 +0100
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||||
Subject: [PATCH] HACK: a64: Add HDMI sound card
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||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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||||
---
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||||
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 20 ++++++++++++++++++-
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||||
1 file changed, 19 insertions(+), 1 deletion(-)
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||||
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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@@ -161,6 +161,24 @@
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};
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};
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+ sound_hdmi: sound_hdmi {
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+ compatible = "simple-audio-card";
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,name = "allwinner-hdmi";
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+ simple-audio-card,mclk-fs = <128>;
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+ simple-audio-card,frame-inversion;
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+
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+ simple-audio-card,codec {
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+ sound-dai = <&hdmi>;
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+ };
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+
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+ simple-audio-card,cpu {
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+ sound-dai = <&i2s2>;
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+ dai-tdm-slot-num = <2>;
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+ dai-tdm-slot-width = <32>;
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+ };
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+ };
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+
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timer {
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compatible = "arm,armv8-timer";
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allwinner,erratum-unknown1;
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@@ -878,7 +896,6 @@
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||||
resets = <&ccu RST_BUS_I2S2>;
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dma-names = "rx", "tx";
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dmas = <&dma 27>, <&dma 27>;
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- status = "disabled";
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||||
};
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||||
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dai: dai@1c22c00 {
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||||
@@ -1178,6 +1195,7 @@
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||||
};
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||||
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hdmi: hdmi@1ee0000 {
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+ #sound-dai-cells = <0>;
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compatible = "allwinner,sun50i-a64-dw-hdmi",
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"allwinner,sun8i-a83t-dw-hdmi";
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reg = <0x01ee0000 0x10000>;
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@@ -8,11 +8,9 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 3 +++
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1 file changed, 3 insertions(+)
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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index 31143fe64d91..1f22b0f6a4e0 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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@@ -1055,6 +1055,9 @@ mali: gpu@1c40000 {
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@@ -1101,6 +1101,9 @@
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||||
clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
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clock-names = "bus", "core";
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resets = <&ccu RST_BUS_GPU>;
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@@ -22,6 +20,3 @@ index 31143fe64d91..1f22b0f6a4e0 100644
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};
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gic: interrupt-controller@1c81000 {
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--
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2.26.0
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@@ -1,48 +0,0 @@
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Date: Sun, 3 Dec 2017 11:43:08 -0800
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Subject: [PATCH] Add A64 HDMI sound node
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---
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arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 29 +++++++++++++++++++
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2 files changed, 47 insertions(+)
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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index 0f69f35939755..0b44018361cbf 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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@@ -727,6 +727,36 @@
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status = "disabled";
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};
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+ i2s2: i2s@1c22800 {
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+ #sound-dai-cells = <0>;
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+ compatible = "allwinner,sun8i-h3-i2s";
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||||
+ reg = <0x01c22800 0x400>;
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||||
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
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||||
+ clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
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+ clock-names = "apb", "mod";
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+ dmas = <&dma 27>;
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+ resets = <&ccu RST_BUS_I2S2>;
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+ dma-names = "tx";
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+ allwinner,playback-channels = <8>;
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+ };
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+
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+ sound_hdmi: sound_hdmi {
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+ compatible = "simple-audio-card";
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,name = "allwinner-hdmi";
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+ simple-audio-card,mclk-fs = <128>;
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+
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+ simple-audio-card,codec {
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+ sound-dai = <&hdmi>;
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+ };
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+
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+ simple-audio-card,cpu {
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||||
+ sound-dai = <&i2s2>;
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+ dai-tdm-slot-num = <2>;
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||||
+ dai-tdm-slot-width = <32>;
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||||
+ };
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||||
+ };
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||||
+
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||||
rtc: rtc@1f00000 {
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||||
compatible = "allwinner,sun6i-a31-rtc";
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reg = <0x01f00000 0x54>;
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||||
@@ -1,11 +0,0 @@
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diff -Nur a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 2018-11-17 18:26:20.000000000 +0100
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 2018-11-17 19:29:15.132911602 +0100
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@@ -892,6 +892,7 @@
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};
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hdmi: hdmi@1ee0000 {
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+ #sound-dai-cells = <0>;
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compatible = "allwinner,sun50i-a64-dw-hdmi",
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"allwinner,sun8i-a83t-dw-hdmi";
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reg = <0x01ee0000 0x10000>;
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@@ -1,24 +0,0 @@
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||||
From 08d35c5d5ce6de3453f17e6eff7375afa74173d2 Mon Sep 17 00:00:00 2001
|
||||
From: Marcus Cooper <codekipper@gmail.com>
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||||
Date: Thu, 2 Jan 2020 19:09:25 +0100
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||||
Subject: [PATCH] Add frame inversion to correct multi-channel audio
|
||||
|
||||
---
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arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
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||||
1 file changed, 1 insertion(+)
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||||
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||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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||||
index 988e261a0ab3..4e20a0872c0c 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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@@ -1101,6 +1101,7 @@
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simple-audio-card,format = "i2s";
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simple-audio-card,name = "allwinner-hdmi";
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simple-audio-card,mclk-fs = <128>;
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+ simple-audio-card,frame-inversion;
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simple-audio-card,codec {
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sound-dai = <&hdmi>;
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--
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2.24.1
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|
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@@ -0,0 +1,26 @@
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From 4cc652f2c660bd01bd0d8cefde272400cbe82fbe Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@siol.net>
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||||
Date: Sat, 16 Jan 2021 11:32:04 +0100
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||||
Subject: [PATCH 1/2] ARM: dts: sun8i: h2-plus: bananapi-m2-zero: Increase BT
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UART speed
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Bluetooth module on BananaPi M2 Zero can also be used for streaming
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audio. However, for that case higher UART speed is required.
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Add a max-speed property.
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Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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---
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arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts | 1 +
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1 file changed, 1 insertion(+)
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--- a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
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+++ b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
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@@ -125,6 +125,7 @@
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bluetooth {
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compatible = "brcm,bcm43438-bt";
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+ max-speed = <1500000>;
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clocks = <&rtc 1>;
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clock-names = "lpo";
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vbat-supply = <®_vcc3v3>;
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@@ -1,14 +1,13 @@
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commit 9702424ea23471e3bdbe6a150e28a1ecdf837d2c
|
||||
Author: PJBrs <pjbrs@floorenpj.xs4all.nl>
|
||||
Date: Fri Feb 21 08:56:04 2020 +0100
|
||||
From aa47c3b292cb0ffcf2c00b2a12c477ec3027a729 Mon Sep 17 00:00:00 2001
|
||||
From: PJBrs <pjbrs@floorenpj.xs4all.nl>
|
||||
Date: Sat, 16 Jan 2021 11:39:45 +0100
|
||||
Subject: [PATCH 2/2] ARM: dts: sunxi: h2-plus-bananapi-m2-zero: Add HDMI out
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||||
|
||||
ARM: dts: sunxi: h2-plus-bananapi-m2-zero: Add HDMI out
|
||||
|
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Add HDMI out, including the display engine, to the BananaPi
|
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M2 Zero.
|
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Add HDMI out, including the display engine, to the BananaPi M2 Zero.
|
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---
|
||||
.../dts/sun8i-h2-plus-bananapi-m2-zero.dts | 25 +++++++++++++++++++
|
||||
1 file changed, 25 insertions(+)
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|
||||
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
|
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index 38e8da594e44..9051a1097258 100644
|
||||
--- a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
|
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+++ b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
|
||||
@@ -26,6 +26,17 @@
|
||||
@@ -29,7 +28,7 @@ index 38e8da594e44..9051a1097258 100644
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||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
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@@ -140,6 +151,20 @@
|
||||
@@ -107,6 +118,20 @@
|
||||
};
|
||||
};
|
||||
|
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@@ -1,12 +0,0 @@
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diff --git a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
|
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index b4ddfaf01b45..e746abb724b4 100644
|
||||
--- a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
|
||||
+++ b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
|
||||
@@ -125,6 +125,7 @@ &uart1 {
|
||||
|
||||
bluetooth {
|
||||
compatible = "brcm,bcm43438-bt";
|
||||
+ max-speed = <1500000>;
|
||||
clocks = <&rtc 1>;
|
||||
clock-names = "lpo";
|
||||
vbat-supply = <®_vcc3v3>;
|
||||
@@ -1,56 +0,0 @@
|
||||
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
||||
index 8aa2befc..d3d70eac 100644
|
||||
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
||||
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
||||
@@ -53,6 +53,23 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
+ sound_hdmi: sound {
|
||||
+ compatible = "simple-audio-card";
|
||||
+ simple-audio-card,format = "i2s";
|
||||
+ simple-audio-card,name = "allwinner-hdmi";
|
||||
+ simple-audio-card,mclk-fs = <128>;
|
||||
+
|
||||
+ simple-audio-card,codec {
|
||||
+ sound-dai = <&hdmi>;
|
||||
+ };
|
||||
+
|
||||
+ simple-audio-card,cpu {
|
||||
+ sound-dai = <&i2s2>;
|
||||
+ dai-tdm-slot-num = <2>;
|
||||
+ dai-tdm-slot-width = <32>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@@ -631,6 +648,19 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ i2s2: i2s@1c22800 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ compatible = "allwinner,sun8i-h3-i2s";
|
||||
+ reg = <0x01c22800 0x400>;
|
||||
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
|
||||
+ clock-names = "apb", "mod";
|
||||
+ dmas = <&dma 27>;
|
||||
+ resets = <&ccu RST_BUS_I2S2>;
|
||||
+ dma-names = "tx";
|
||||
+ allwinner,playback-channels = <8>;
|
||||
+ };
|
||||
+
|
||||
codec: codec@1c22c00 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "allwinner,sun8i-h3-codec";
|
||||
@@ -110,6 +126,7 @@
|
||||
};
|
||||
|
||||
hdmi: hdmi@1ee0000 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
compatible = "allwinner,sun8i-h3-dw-hdmi",
|
||||
"allwinner,sun8i-a83t-dw-hdmi";
|
||||
reg = <0x01ee0000 0x10000>;
|
||||
@@ -1,24 +0,0 @@
|
||||
From 51dcda7a261bcadca0a8f5e6fe6241ec266438d0 Mon Sep 17 00:00:00 2001
|
||||
From: Marcus Cooper <codekipper@gmail.com>
|
||||
Date: Thu, 2 Jan 2020 19:03:35 +0100
|
||||
Subject: [PATCH] Add frame inversion to correct multi-channel audio
|
||||
|
||||
---
|
||||
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
||||
index 8644435e66d3..7375a9479e84 100644
|
||||
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
||||
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
||||
@@ -82,6 +82,7 @@
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,name = "allwinner-hdmi";
|
||||
simple-audio-card,mclk-fs = <128>;
|
||||
+ simple-audio-card,frame-inversion;
|
||||
|
||||
simple-audio-card,codec {
|
||||
sound-dai = <&hdmi>;
|
||||
--
|
||||
2.24.1
|
||||
|
||||
@@ -1,85 +1,24 @@
|
||||
From bf21ad0889bdcc1dc12fe5a024fd7df7ad2c4310 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Tue, 26 Feb 2019 20:45:14 +0000
|
||||
Subject: [PATCH 1/2] WIP: dw-hdmi-cec: sleep 100ms on error
|
||||
|
||||
---
|
||||
drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c | 18 ++++++++++++++++--
|
||||
1 file changed, 16 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
|
||||
index 6c323510f128..b5a1a85c8700 100644
|
||||
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
|
||||
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
|
||||
@@ -7,6 +7,7 @@
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
+#include <linux/delay.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/module.h>
|
||||
@@ -132,8 +133,15 @@ static irqreturn_t dw_hdmi_cec_hardirq(int irq, void *data)
|
||||
|
||||
dw_hdmi_write(cec, stat, HDMI_IH_CEC_STAT0);
|
||||
|
||||
- if (stat & CEC_STAT_ERROR_INIT) {
|
||||
- cec->tx_status = CEC_TX_STATUS_ERROR;
|
||||
+ /* Status with both done and error_initiator bits have been seen
|
||||
+ * on Rockchip RK3328 devices, transmit attempt seems to have failed
|
||||
+ * when this happens, report as low drive and block cec-framework
|
||||
+ * 100ms before core retransmits the failed message, this seems to
|
||||
+ * mitigate the issue with failed transmit attempts.
|
||||
+ */
|
||||
+ if ((stat & (CEC_STAT_DONE|CEC_STAT_ERROR_INIT)) == (CEC_STAT_DONE|CEC_STAT_ERROR_INIT)) {
|
||||
+ pr_info("dw_hdmi_cec_hardirq: stat=%02x LOW_DRIVE\n", stat);
|
||||
+ cec->tx_status = CEC_TX_STATUS_LOW_DRIVE;
|
||||
cec->tx_done = true;
|
||||
ret = IRQ_WAKE_THREAD;
|
||||
} else if (stat & CEC_STAT_DONE) {
|
||||
@@ -144,6 +152,10 @@ static irqreturn_t dw_hdmi_cec_hardirq(int irq, void *data)
|
||||
cec->tx_status = CEC_TX_STATUS_NACK;
|
||||
cec->tx_done = true;
|
||||
ret = IRQ_WAKE_THREAD;
|
||||
+ } else if (stat & CEC_STAT_ERROR_INIT) {
|
||||
+ cec->tx_status = CEC_TX_STATUS_ERROR;
|
||||
+ cec->tx_done = true;
|
||||
+ ret = IRQ_WAKE_THREAD;
|
||||
}
|
||||
|
||||
if (stat & CEC_STAT_EOM) {
|
||||
@@ -176,6 +188,8 @@ static irqreturn_t dw_hdmi_cec_thread(int irq, void *data)
|
||||
|
||||
if (cec->tx_done) {
|
||||
cec->tx_done = false;
|
||||
+ if (cec->tx_status == CEC_TX_STATUS_LOW_DRIVE)
|
||||
+ msleep(100);
|
||||
cec_transmit_attempt_done(adap, cec->tx_status);
|
||||
}
|
||||
if (cec->rx_done) {
|
||||
--
|
||||
2.21.0
|
||||
|
||||
|
||||
From 12f1abe2b5cee6575c6dd9cd29b17b589f044b80 Mon Sep 17 00:00:00 2001
|
||||
From 0981ac8f42983c820790b14668d59f39b0375d90 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Date: Sat, 25 May 2019 12:03:39 +0200
|
||||
Subject: [PATCH 2/2] WIP: sun8i-hdmi CEC improvements
|
||||
Subject: [PATCH] HACK: SW CEC implementation for H3
|
||||
|
||||
Many H3 boards lack 32768 Hz external oscillator, so internal RC is used
|
||||
instead. However, it's too unstable for CEC. Use SW implementation
|
||||
instead. That makes it usable, albeit sensitive to cpufreq changes.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
---
|
||||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 +-
|
||||
drivers/gpu/drm/sun4i/Kconfig | 10 +++
|
||||
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 11 +++
|
||||
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 83 ++++++++++++++++++++++-
|
||||
drivers/gpu/drm/sun4i/Kconfig | 2 +
|
||||
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 12 ++++
|
||||
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 74 ++++++++++++++++++++++-
|
||||
include/drm/bridge/dw_hdmi.h | 2 +
|
||||
5 files changed, 105 insertions(+), 3 deletions(-)
|
||||
5 files changed, 89 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
index 09fdc9f87651..f359c4c3f1d1 100644
|
||||
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
@@ -2713,7 +2713,7 @@ __dw_hdmi_probe(struct platform_device *pdev,
|
||||
@@ -3421,7 +3421,7 @@ struct dw_hdmi *dw_hdmi_probe(struct pla
|
||||
hdmi->audio = platform_device_register_full(&pdevinfo);
|
||||
}
|
||||
|
||||
@@ -88,32 +27,20 @@ index 09fdc9f87651..f359c4c3f1d1 100644
|
||||
cec.hdmi = hdmi;
|
||||
cec.ops = &dw_hdmi_cec_ops;
|
||||
cec.irq = irq;
|
||||
diff --git a/drivers/gpu/drm/sun4i/Kconfig b/drivers/gpu/drm/sun4i/Kconfig
|
||||
index 1dbbc3a1b763..7149c72e44c8 100644
|
||||
--- a/drivers/gpu/drm/sun4i/Kconfig
|
||||
+++ b/drivers/gpu/drm/sun4i/Kconfig
|
||||
@@ -60,6 +60,16 @@ config DRM_SUN8I_DW_HDMI
|
||||
@@ -56,6 +56,8 @@ config DRM_SUN8I_DW_HDMI
|
||||
tristate "Support for Allwinner version of DesignWare HDMI"
|
||||
depends on DRM_SUN4I
|
||||
select DRM_DW_HDMI
|
||||
+ select CEC_CORE
|
||||
+ select CEC_PIN
|
||||
help
|
||||
Choose this option if you have an Allwinner SoC with the
|
||||
DesignWare HDMI controller with custom HDMI PHY. If M is
|
||||
selected the module will be called sun8i_dw_hdmi.
|
||||
|
||||
+config DRM_SUN8I_DW_HDMI_CEC
|
||||
+ bool "Allwinner DesignWare HDMI CEC Support for 40nm SoCs"
|
||||
+ depends on DRM_SUN8I_DW_HDMI
|
||||
+ select CEC_CORE
|
||||
+ select CEC_PIN
|
||||
+ help
|
||||
+ Choose this option if you have an 40nm Allwinner SoC with
|
||||
+ the DesignWare HDMI controller with custom HDMI PHY and
|
||||
+ you want to use CEC.
|
||||
+
|
||||
config DRM_SUN8I_MIXER
|
||||
tristate "Support for Allwinner Display Engine 2.0 Mixer"
|
||||
default MACH_SUN8I
|
||||
diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
|
||||
index 720c5aa8adc1..49ca001923e3 100644
|
||||
--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
|
||||
+++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
|
||||
@@ -12,6 +12,8 @@
|
||||
@@ -13,6 +13,8 @@
|
||||
#include <linux/regmap.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
#include <linux/reset.h>
|
||||
@@ -122,7 +49,7 @@ index 720c5aa8adc1..49ca001923e3 100644
|
||||
|
||||
#define SUN8I_HDMI_PHY_DBG_CTRL_REG 0x0000
|
||||
#define SUN8I_HDMI_PHY_DBG_CTRL_PX_LOCK BIT(0)
|
||||
@@ -144,6 +145,13 @@
|
||||
@@ -145,6 +147,13 @@
|
||||
#define SUN8I_HDMI_PHY_ANA_STS_RCAL_MASK GENMASK(5, 0)
|
||||
|
||||
#define SUN8I_HDMI_PHY_CEC_REG 0x003c
|
||||
@@ -136,7 +63,7 @@ index 720c5aa8adc1..49ca001923e3 100644
|
||||
|
||||
struct sun8i_hdmi_phy;
|
||||
|
||||
@@ -151,6 +159,7 @@ struct sun8i_hdmi_phy_variant {
|
||||
@@ -152,6 +161,7 @@ struct sun8i_hdmi_phy_variant {
|
||||
bool has_phy_clk;
|
||||
bool has_second_pll;
|
||||
unsigned int is_custom_phy : 1;
|
||||
@@ -144,7 +71,7 @@ index 720c5aa8adc1..49ca001923e3 100644
|
||||
const struct dw_hdmi_curr_ctrl *cur_ctr;
|
||||
const struct dw_hdmi_mpll_config *mpll_cfg;
|
||||
const struct dw_hdmi_phy_config *phy_cfg;
|
||||
@@ -163,6 +172,8 @@ struct sun8i_hdmi_phy_variant {
|
||||
@@ -164,6 +174,8 @@ struct sun8i_hdmi_phy_variant {
|
||||
};
|
||||
|
||||
struct sun8i_hdmi_phy {
|
||||
@@ -153,11 +80,9 @@ index 720c5aa8adc1..49ca001923e3 100644
|
||||
struct clk *clk_bus;
|
||||
struct clk *clk_mod;
|
||||
struct clk *clk_phy;
|
||||
diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
|
||||
index 43643ad31730..d840bc07cba6 100644
|
||||
--- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
|
||||
+++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
|
||||
@@ -504,8 +504,9 @@ static void sun8i_hdmi_phy_init_h3(struct sun8i_hdmi_phy *phy)
|
||||
@@ -505,8 +505,9 @@ static void sun8i_hdmi_phy_init_h3(struc
|
||||
regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG,
|
||||
SUN8I_HDMI_PHY_PLL_CFG1_CKIN_SEL_MSK, 0);
|
||||
|
||||
@@ -169,14 +94,13 @@ index 43643ad31730..d840bc07cba6 100644
|
||||
|
||||
/* read calibration data */
|
||||
regmap_read(phy->regs, SUN8I_HDMI_PHY_ANA_STS_REG, &val);
|
||||
@@ -531,8 +532,49 @@ void sun8i_hdmi_phy_set_ops(struct sun8i_hdmi_phy *phy,
|
||||
@@ -532,8 +533,47 @@ void sun8i_hdmi_phy_set_ops(struct sun8i
|
||||
plat_data->cur_ctr = variant->cur_ctr;
|
||||
plat_data->phy_config = variant->phy_cfg;
|
||||
}
|
||||
+ plat_data->is_cec_unusable = phy->variant->bit_bang_cec;
|
||||
}
|
||||
|
||||
+#ifdef CONFIG_DRM_SUN8I_DW_HDMI_CEC
|
||||
+static int sun8i_hdmi_phy_cec_pin_read(struct cec_adapter *adap)
|
||||
+{
|
||||
+ struct sun8i_hdmi_phy *phy = cec_get_drvdata(adap);
|
||||
@@ -214,12 +138,11 @@ index 43643ad31730..d840bc07cba6 100644
|
||||
+ .low = sun8i_hdmi_phy_cec_pin_low,
|
||||
+ .high = sun8i_hdmi_phy_cec_pin_high,
|
||||
+};
|
||||
+#endif
|
||||
+
|
||||
static const struct regmap_config sun8i_hdmi_phy_regmap_config = {
|
||||
.reg_bits = 32,
|
||||
.val_bits = 32,
|
||||
@@ -549,6 +591,7 @@ static const struct sun8i_hdmi_phy_variant sun8i_a83t_hdmi_phy = {
|
||||
@@ -550,6 +590,7 @@ static const struct sun8i_hdmi_phy_varia
|
||||
};
|
||||
|
||||
static const struct sun8i_hdmi_phy_variant sun8i_h3_hdmi_phy = {
|
||||
@@ -227,19 +150,10 @@ index 43643ad31730..d840bc07cba6 100644
|
||||
.has_phy_clk = true,
|
||||
.is_custom_phy = true,
|
||||
.phy_init = &sun8i_hdmi_phy_init_h3,
|
||||
@@ -566,6 +610,7 @@ static const struct sun8i_hdmi_phy_variant sun8i_r40_hdmi_phy = {
|
||||
};
|
||||
|
||||
static const struct sun8i_hdmi_phy_variant sun50i_a64_hdmi_phy = {
|
||||
+ .bit_bang_cec = true,
|
||||
.has_phy_clk = true,
|
||||
.is_custom_phy = true,
|
||||
.phy_init = &sun8i_hdmi_phy_init_h3,
|
||||
@@ -711,10 +756,38 @@ int sun8i_hdmi_phy_probe(struct sun8i_dw_hdmi *hdmi, struct device_node *node)
|
||||
@@ -712,10 +753,36 @@ int sun8i_hdmi_phy_probe(struct sun8i_dw
|
||||
clk_prepare_enable(phy->clk_phy);
|
||||
}
|
||||
|
||||
+#ifdef CONFIG_DRM_SUN8I_DW_HDMI_CEC
|
||||
+ if (phy->variant->bit_bang_cec) {
|
||||
+ phy->cec_adapter =
|
||||
+ cec_pin_allocate_adapter(&sun8i_hdmi_phy_cec_pin_ops,
|
||||
@@ -259,7 +173,6 @@ index 43643ad31730..d840bc07cba6 100644
|
||||
+ if (ret < 0)
|
||||
+ goto err_put_cec_notifier;
|
||||
+ }
|
||||
+#endif
|
||||
+
|
||||
hdmi->phy = phy;
|
||||
|
||||
@@ -274,7 +187,7 @@ index 43643ad31730..d840bc07cba6 100644
|
||||
err_disable_clk_mod:
|
||||
clk_disable_unprepare(phy->clk_mod);
|
||||
err_disable_clk_bus:
|
||||
@@ -739,6 +814,9 @@ void sun8i_hdmi_phy_remove(struct sun8i_dw_hdmi *hdmi)
|
||||
@@ -740,6 +807,9 @@ void sun8i_hdmi_phy_remove(struct sun8i_
|
||||
{
|
||||
struct sun8i_hdmi_phy *phy = hdmi->phy;
|
||||
|
||||
@@ -284,19 +197,14 @@ index 43643ad31730..d840bc07cba6 100644
|
||||
clk_disable_unprepare(phy->clk_mod);
|
||||
clk_disable_unprepare(phy->clk_bus);
|
||||
clk_disable_unprepare(phy->clk_phy);
|
||||
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
|
||||
index 323febe7f102..cec73761856d 100644
|
||||
--- a/include/drm/bridge/dw_hdmi.h
|
||||
+++ b/include/drm/bridge/dw_hdmi.h
|
||||
@@ -144,6 +144,8 @@ struct dw_hdmi_plat_data {
|
||||
int (*configure_phy)(struct dw_hdmi *hdmi,
|
||||
const struct dw_hdmi_plat_data *pdata,
|
||||
@@ -153,6 +153,8 @@ struct dw_hdmi_plat_data {
|
||||
const struct dw_hdmi_phy_config *phy_config;
|
||||
int (*configure_phy)(struct dw_hdmi *hdmi, void *data,
|
||||
unsigned long mpixelclock);
|
||||
+
|
||||
+ unsigned int is_cec_unusable : 1;
|
||||
};
|
||||
|
||||
struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
|
||||
--
|
||||
2.21.0
|
||||
|
||||
@@ -0,0 +1,25 @@
|
||||
From 54b5c2cb4fc87ca72daa662423d4d969f3b5edb8 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Date: Sat, 16 Jan 2021 11:49:57 +0100
|
||||
Subject: [PATCH] ARM: dts: sunxi: bananapi-m2-plus: Increase BT UART speed
|
||||
|
||||
Bluetooth module on BananaPi M2 Plus can also be used for streaming
|
||||
audio. However, for that case higher UART speed is required.
|
||||
|
||||
Add a max-speed property.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
---
|
||||
arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
--- a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
|
||||
+++ b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
|
||||
@@ -219,6 +219,7 @@
|
||||
|
||||
bluetooth {
|
||||
compatible = "brcm,bcm43438-bt";
|
||||
+ max-speed = <1500000>;
|
||||
clocks = <&rtc 1>;
|
||||
clock-names = "lpo";
|
||||
vbat-supply = <®_vcc3v3>;
|
||||
@@ -1,12 +0,0 @@
|
||||
diff --git a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
|
||||
index 39263e74fbb5..0ec6109ec625 100644
|
||||
--- a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
|
||||
+++ b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
|
||||
@@ -219,6 +219,7 @@
|
||||
|
||||
bluetooth {
|
||||
compatible = "brcm,bcm43438-bt";
|
||||
+ max-speed = <1500000>;
|
||||
clocks = <&rtc 1>;
|
||||
clock-names = "lpo";
|
||||
vbat-supply = <®_vcc3v3>;
|
||||
@@ -1,24 +0,0 @@
|
||||
From 51dcda7a261bcadca0a8f5e6fe6241ec266438d0 Mon Sep 17 00:00:00 2001
|
||||
From: Marcus Cooper <codekipper@gmail.com>
|
||||
Date: Thu, 2 Jan 2020 19:03:35 +0100
|
||||
Subject: [PATCH] Add frame inversion to correct multi-channel audio
|
||||
|
||||
---
|
||||
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
||||
index 8644435e66d3..7375a9479e84 100644
|
||||
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
||||
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
||||
@@ -82,6 +82,7 @@
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,name = "allwinner-hdmi";
|
||||
simple-audio-card,mclk-fs = <128>;
|
||||
+ simple-audio-card,frame-inversion;
|
||||
|
||||
simple-audio-card,codec {
|
||||
sound-dai = <&hdmi>;
|
||||
--
|
||||
2.24.1
|
||||
|
||||
@@ -1,56 +0,0 @@
|
||||
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
||||
index 8aa2befc..d3d70eac 100644
|
||||
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
||||
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
||||
@@ -53,6 +53,23 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
+ sound_hdmi: sound {
|
||||
+ compatible = "simple-audio-card";
|
||||
+ simple-audio-card,format = "i2s";
|
||||
+ simple-audio-card,name = "allwinner-hdmi";
|
||||
+ simple-audio-card,mclk-fs = <128>;
|
||||
+
|
||||
+ simple-audio-card,codec {
|
||||
+ sound-dai = <&hdmi>;
|
||||
+ };
|
||||
+
|
||||
+ simple-audio-card,cpu {
|
||||
+ sound-dai = <&i2s2>;
|
||||
+ dai-tdm-slot-num = <2>;
|
||||
+ dai-tdm-slot-width = <32>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@@ -631,6 +648,19 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ i2s2: i2s@1c22800 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ compatible = "allwinner,sun8i-h3-i2s";
|
||||
+ reg = <0x01c22800 0x400>;
|
||||
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
|
||||
+ clock-names = "apb", "mod";
|
||||
+ dmas = <&dma 27>;
|
||||
+ resets = <&ccu RST_BUS_I2S2>;
|
||||
+ dma-names = "tx";
|
||||
+ allwinner,playback-channels = <8>;
|
||||
+ };
|
||||
+
|
||||
codec: codec@1c22c00 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "allwinner,sun8i-h3-codec";
|
||||
@@ -110,6 +126,7 @@
|
||||
};
|
||||
|
||||
hdmi: hdmi@1ee0000 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
compatible = "allwinner,sun8i-h3-dw-hdmi",
|
||||
"allwinner,sun8i-a83t-dw-hdmi";
|
||||
reg = <0x01ee0000 0x10000>;
|
||||
@@ -1,24 +0,0 @@
|
||||
From 51dcda7a261bcadca0a8f5e6fe6241ec266438d0 Mon Sep 17 00:00:00 2001
|
||||
From: Marcus Cooper <codekipper@gmail.com>
|
||||
Date: Thu, 2 Jan 2020 19:03:35 +0100
|
||||
Subject: [PATCH] Add frame inversion to correct multi-channel audio
|
||||
|
||||
---
|
||||
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
||||
index 8644435e66d3..7375a9479e84 100644
|
||||
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
||||
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
|
||||
@@ -82,6 +82,7 @@
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,name = "allwinner-hdmi";
|
||||
simple-audio-card,mclk-fs = <128>;
|
||||
+ simple-audio-card,frame-inversion;
|
||||
|
||||
simple-audio-card,codec {
|
||||
sound-dai = <&hdmi>;
|
||||
--
|
||||
2.24.1
|
||||
|
||||
@@ -0,0 +1,53 @@
|
||||
From da5268aa6c9a552ceebf74263acf997489368adc Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
Date: Sat, 16 Jan 2021 10:58:14 +0100
|
||||
Subject: [PATCH 01/14] HACK: h6: Add HDMI sound card
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 20 +++++++++++++++++++-
|
||||
1 file changed, 19 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
@@ -108,6 +108,24 @@
|
||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
|
||||
};
|
||||
|
||||
+ sound_hdmi: sound {
|
||||
+ compatible = "simple-audio-card";
|
||||
+ simple-audio-card,format = "i2s";
|
||||
+ simple-audio-card,name = "allwinner-hdmi";
|
||||
+ simple-audio-card,mclk-fs = <128>;
|
||||
+ simple-audio-card,frame-inversion;
|
||||
+
|
||||
+ simple-audio-card,codec {
|
||||
+ sound-dai = <&hdmi>;
|
||||
+ };
|
||||
+
|
||||
+ simple-audio-card,cpu {
|
||||
+ sound-dai = <&i2s1>;
|
||||
+ dai-tdm-slot-num = <2>;
|
||||
+ dai-tdm-slot-width = <32>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
@@ -651,7 +669,6 @@
|
||||
dmas = <&dma 4>, <&dma 4>;
|
||||
resets = <&ccu RST_BUS_I2S1>;
|
||||
dma-names = "rx", "tx";
|
||||
- status = "disabled";
|
||||
};
|
||||
|
||||
spdif: spdif@5093000 {
|
||||
@@ -784,6 +801,7 @@
|
||||
};
|
||||
|
||||
hdmi: hdmi@6000000 {
|
||||
+ #sound-dai-cells = <0>;
|
||||
compatible = "allwinner,sun50i-h6-dw-hdmi";
|
||||
reg = <0x06000000 0x10000>;
|
||||
reg-io-width = <1>;
|
||||
@@ -0,0 +1,70 @@
|
||||
From 7f12904df66e28c2a5fa8ea652ed9eee48a22131 Mon Sep 17 00:00:00 2001
|
||||
From: Ondrej Jirman <megous@megous.com>
|
||||
Date: Wed, 27 Mar 2019 13:21:06 +0100
|
||||
Subject: [PATCH 02/14] net: stmmac: sun8i: Use devm_regulator_get for PHY
|
||||
regulator
|
||||
|
||||
Use devm_regulator_get instead of devm_regulator_get_optional and rely
|
||||
on dummy supply. This avoids NULL checks before regulator_enable/disable
|
||||
calls.
|
||||
|
||||
This path also improves error reporting, because we now report both
|
||||
use of dummy supply and error during registration with more detail,
|
||||
instead of generic info level message "No regulator found" that
|
||||
was reported previously on errors and lack of regulator property in DT.
|
||||
|
||||
Finally, we'll be adding further optional regulators, and the overall
|
||||
code will be simpler.
|
||||
|
||||
Signed-off-by: Ondrej Jirman <megous@megous.com>
|
||||
---
|
||||
.../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 23 ++++++++-----------
|
||||
1 file changed, 10 insertions(+), 13 deletions(-)
|
||||
|
||||
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
|
||||
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
|
||||
@@ -544,12 +544,10 @@ static int sun8i_dwmac_init(struct platf
|
||||
struct sunxi_priv_data *gmac = priv;
|
||||
int ret;
|
||||
|
||||
- if (gmac->regulator) {
|
||||
- ret = regulator_enable(gmac->regulator);
|
||||
- if (ret) {
|
||||
- dev_err(&pdev->dev, "Fail to enable regulator\n");
|
||||
- return ret;
|
||||
- }
|
||||
+ ret = regulator_enable(gmac->regulator);
|
||||
+ if (ret) {
|
||||
+ dev_err(&pdev->dev, "Fail to enable regulator\n");
|
||||
+ return ret;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(gmac->tx_clk);
|
||||
@@ -1017,8 +1015,7 @@ static void sun8i_dwmac_exit(struct plat
|
||||
|
||||
clk_disable_unprepare(gmac->tx_clk);
|
||||
|
||||
- if (gmac->regulator)
|
||||
- regulator_disable(gmac->regulator);
|
||||
+ regulator_disable(gmac->regulator);
|
||||
}
|
||||
|
||||
static void sun8i_dwmac_set_mac_loopback(void __iomem *ioaddr, bool enable)
|
||||
@@ -1155,12 +1152,12 @@ static int sun8i_dwmac_probe(struct plat
|
||||
}
|
||||
|
||||
/* Optional regulator for PHY */
|
||||
- gmac->regulator = devm_regulator_get_optional(dev, "phy");
|
||||
+ gmac->regulator = devm_regulator_get(dev, "phy");
|
||||
if (IS_ERR(gmac->regulator)) {
|
||||
- if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER)
|
||||
- return -EPROBE_DEFER;
|
||||
- dev_info(dev, "No regulator found\n");
|
||||
- gmac->regulator = NULL;
|
||||
+ ret = PTR_ERR(gmac->regulator);
|
||||
+ if (ret != -EPROBE_DEFER)
|
||||
+ dev_err(dev, "Failed to get PHY regulator (%d)\n", ret);
|
||||
+ return ret;
|
||||
}
|
||||
|
||||
/* The "GMAC clock control" register might be located in the
|
||||
@@ -0,0 +1,81 @@
|
||||
From 455e29ad5f37b40532b9cf56781dab3c3eb275b5 Mon Sep 17 00:00:00 2001
|
||||
From: Ondrej Jirman <megous@megous.com>
|
||||
Date: Tue, 20 Aug 2019 14:29:29 +0200
|
||||
Subject: [PATCH 03/14] net: stmmac: sun8i: Rename PHY regulator variable to
|
||||
regulator_phy
|
||||
|
||||
We'll be adding further optional regulators, and this makes it clearer
|
||||
what the regulator is for.
|
||||
|
||||
Signed-off-by: Ondrej Jirman <megous@megous.com>
|
||||
---
|
||||
.../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 32 ++++++++++---------
|
||||
1 file changed, 17 insertions(+), 15 deletions(-)
|
||||
|
||||
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
|
||||
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
|
||||
@@ -57,19 +57,21 @@ struct emac_variant {
|
||||
};
|
||||
|
||||
/* struct sunxi_priv_data - hold all sunxi private data
|
||||
- * @tx_clk: reference to MAC TX clock
|
||||
- * @ephy_clk: reference to the optional EPHY clock for the internal PHY
|
||||
- * @regulator: reference to the optional regulator
|
||||
- * @rst_ephy: reference to the optional EPHY reset for the internal PHY
|
||||
- * @variant: reference to the current board variant
|
||||
- * @regmap: regmap for using the syscon
|
||||
- * @internal_phy_powered: Does the internal PHY is enabled
|
||||
- * @mux_handle: Internal pointer used by mdio-mux lib
|
||||
+ * @tx_clk: reference to MAC TX clock
|
||||
+ * @ephy_clk: reference to the optional EPHY clock for
|
||||
+ * the internal PHY
|
||||
+ * @regulator_phy: reference to the optional regulator
|
||||
+ * @rst_ephy: reference to the optional EPHY reset for
|
||||
+ * the internal PHY
|
||||
+ * @variant: reference to the current board variant
|
||||
+ * @regmap: regmap for using the syscon
|
||||
+ * @internal_phy_powered: Does the internal PHY is enabled
|
||||
+ * @mux_handle: Internal pointer used by mdio-mux lib
|
||||
*/
|
||||
struct sunxi_priv_data {
|
||||
struct clk *tx_clk;
|
||||
struct clk *ephy_clk;
|
||||
- struct regulator *regulator;
|
||||
+ struct regulator *regulator_phy;
|
||||
struct reset_control *rst_ephy;
|
||||
const struct emac_variant *variant;
|
||||
struct regmap_field *regmap_field;
|
||||
@@ -544,9 +546,9 @@ static int sun8i_dwmac_init(struct platf
|
||||
struct sunxi_priv_data *gmac = priv;
|
||||
int ret;
|
||||
|
||||
- ret = regulator_enable(gmac->regulator);
|
||||
+ ret = regulator_enable(gmac->regulator_phy);
|
||||
if (ret) {
|
||||
- dev_err(&pdev->dev, "Fail to enable regulator\n");
|
||||
+ dev_err(&pdev->dev, "Fail to enable PHY regulator\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -1015,7 +1017,7 @@ static void sun8i_dwmac_exit(struct plat
|
||||
|
||||
clk_disable_unprepare(gmac->tx_clk);
|
||||
|
||||
- regulator_disable(gmac->regulator);
|
||||
+ regulator_disable(gmac->regulator_phy);
|
||||
}
|
||||
|
||||
static void sun8i_dwmac_set_mac_loopback(void __iomem *ioaddr, bool enable)
|
||||
@@ -1152,9 +1154,9 @@ static int sun8i_dwmac_probe(struct plat
|
||||
}
|
||||
|
||||
/* Optional regulator for PHY */
|
||||
- gmac->regulator = devm_regulator_get(dev, "phy");
|
||||
- if (IS_ERR(gmac->regulator)) {
|
||||
- ret = PTR_ERR(gmac->regulator);
|
||||
+ gmac->regulator_phy = devm_regulator_get(dev, "phy");
|
||||
+ if (IS_ERR(gmac->regulator_phy)) {
|
||||
+ ret = PTR_ERR(gmac->regulator_phy);
|
||||
if (ret != -EPROBE_DEFER)
|
||||
dev_err(dev, "Failed to get PHY regulator (%d)\n", ret);
|
||||
return ret;
|
||||
@@ -0,0 +1,95 @@
|
||||
From a2903d15de86fc3ab455a665e22ad6e5c27f8c43 Mon Sep 17 00:00:00 2001
|
||||
From: Ondrej Jirman <megous@megous.com>
|
||||
Date: Tue, 20 Aug 2019 14:31:38 +0200
|
||||
Subject: [PATCH 04/14] net: stmmac: sun8i: Add support for enabling a
|
||||
regulator for PHY I/O pins
|
||||
|
||||
Orange Pi 3 has two regulators that power the Realtek RTL8211E. According
|
||||
to the phy datasheet, both regulators need to be enabled at the same time.
|
||||
|
||||
Add support for the second optional regulator, "phy-io", to the glue
|
||||
driver.
|
||||
|
||||
Signed-off-by: Ondrej Jirman <megous@megous.com>
|
||||
---
|
||||
.../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 30 ++++++++++++++++---
|
||||
1 file changed, 26 insertions(+), 4 deletions(-)
|
||||
|
||||
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
|
||||
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
|
||||
@@ -61,6 +61,8 @@ struct emac_variant {
|
||||
* @ephy_clk: reference to the optional EPHY clock for
|
||||
* the internal PHY
|
||||
* @regulator_phy: reference to the optional regulator
|
||||
+ * @regulator_phy_io: reference to the optional regulator for
|
||||
+ * PHY I/O pins
|
||||
* @rst_ephy: reference to the optional EPHY reset for
|
||||
* the internal PHY
|
||||
* @variant: reference to the current board variant
|
||||
@@ -72,6 +74,7 @@ struct sunxi_priv_data {
|
||||
struct clk *tx_clk;
|
||||
struct clk *ephy_clk;
|
||||
struct regulator *regulator_phy;
|
||||
+ struct regulator *regulator_phy_io;
|
||||
struct reset_control *rst_ephy;
|
||||
const struct emac_variant *variant;
|
||||
struct regmap_field *regmap_field;
|
||||
@@ -546,21 +549,30 @@ static int sun8i_dwmac_init(struct platf
|
||||
struct sunxi_priv_data *gmac = priv;
|
||||
int ret;
|
||||
|
||||
+ ret = regulator_enable(gmac->regulator_phy_io);
|
||||
+ if (ret) {
|
||||
+ dev_err(&pdev->dev, "Fail to enable PHY I/O regulator\n");
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
ret = regulator_enable(gmac->regulator_phy);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "Fail to enable PHY regulator\n");
|
||||
- return ret;
|
||||
+ goto err_disable_regulator_phy_io;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(gmac->tx_clk);
|
||||
if (ret) {
|
||||
- if (gmac->regulator)
|
||||
- regulator_disable(gmac->regulator);
|
||||
dev_err(&pdev->dev, "Could not enable AHB clock\n");
|
||||
- return ret;
|
||||
+ goto err_disable_regulator_phy;
|
||||
}
|
||||
|
||||
return 0;
|
||||
+err_disable_regulator_phy:
|
||||
+ regulator_disable(gmac->regulator_phy);
|
||||
+err_disable_regulator_phy_io:
|
||||
+ regulator_disable(gmac->regulator_phy_io);
|
||||
+ return ret;
|
||||
}
|
||||
|
||||
static void sun8i_dwmac_core_init(struct mac_device_info *hw,
|
||||
@@ -1018,6 +1030,7 @@ static void sun8i_dwmac_exit(struct plat
|
||||
clk_disable_unprepare(gmac->tx_clk);
|
||||
|
||||
regulator_disable(gmac->regulator_phy);
|
||||
+ regulator_disable(gmac->regulator_phy_io);
|
||||
}
|
||||
|
||||
static void sun8i_dwmac_set_mac_loopback(void __iomem *ioaddr, bool enable)
|
||||
@@ -1162,6 +1175,15 @@ static int sun8i_dwmac_probe(struct plat
|
||||
return ret;
|
||||
}
|
||||
|
||||
+ /* Optional regulator for PHY I/O pins */
|
||||
+ gmac->regulator_phy_io = devm_regulator_get(dev, "phy-io");
|
||||
+ if (IS_ERR(gmac->regulator_phy_io)) {
|
||||
+ ret = PTR_ERR(gmac->regulator_phy_io);
|
||||
+ if (ret != -EPROBE_DEFER)
|
||||
+ dev_err(dev, "Failed to get PHY I/O regulator (%d)\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
/* The "GMAC clock control" register might be located in the
|
||||
* CCU address range (on the R40), or the system control address
|
||||
* range (on most other sun8i and later SoCs).
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user