Update AYN QCS8550 platform

- Update to Linux 6.17.5
- Update AYN Odin2 device tree
- Add AYN Thor device tree
- Update linux.aarch64.conf
- Add AYN Thor in dtb.xml list

Signed-off-by: Teguh Sobirin <teguh@sobir.in>
This commit is contained in:
Teguh Sobirin
2025-10-28 17:49:18 +08:00
parent d687cda7cb
commit dd2d3e4809
16 changed files with 1780 additions and 1157 deletions

View File

@@ -87,6 +87,7 @@
<file short="odin2" full="AYN Odin2">qcs8550-ayn-odin2</file>
<file short="odin2portal" full="AYN Odin2 Portal">qcs8550-ayn-odin2portal</file>
<file short="odin2mini" full="AYN Odin2 Mini">qcs8550-ayn-odin2mini</file>
<file short="thor" full="AYN Thor">qcs8550-ayn-thor</file>
<file short="pocketace" full="AYANEO Pocket ACE">qcs8550-ayaneo-pocketace</file>
<file short="pocketdmg" full="AYANEO Pocket DMG">qcs8550-ayaneo-pocketdmg</file>
<file short="pocketds" full="AYANEO Pocket DS">qcs8550-ayaneo-pocketds</file>

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@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 6.17.4 Kernel Configuration
# Linux/arm64 6.17.5 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="aarch64-rocknix-linux-gnueabi-gcc-14.2.0 (GCC) 14.2.0"
CONFIG_CC_IS_GCC=y
@@ -11,8 +11,8 @@ CONFIG_AS_VERSION=24400
CONFIG_LD_IS_BFD=y
CONFIG_LD_VERSION=24400
CONFIG_LLD_VERSION=0
CONFIG_RUSTC_VERSION=109000
CONFIG_RUSTC_LLVM_VERSION=200108
CONFIG_RUSTC_VERSION=0
CONFIG_RUSTC_LLVM_VERSION=0
CONFIG_CC_CAN_LINK=y
CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y
CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y
@@ -20,10 +20,6 @@ CONFIG_TOOLS_SUPPORT_RELR=y
CONFIG_CC_HAS_ASM_INLINE=y
CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y
CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY=y
CONFIG_RUSTC_HAS_COERCE_POINTEE=y
CONFIG_RUSTC_HAS_SPAN_FILE=y
CONFIG_RUSTC_HAS_UNNECESSARY_TRANSMUTES=y
CONFIG_RUSTC_HAS_FILE_WITH_NUL=y
CONFIG_PAHOLE_VERSION=0
CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_TABLE_SORT=y
@@ -4255,7 +4251,8 @@ CONFIG_DRM_PANEL_AR11_5INCH=y
# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set
# CONFIG_DRM_PANEL_BOE_TV101WUM_LL2 is not set
CONFIG_DRM_PANEL_BOE_XM91080G=y
CONFIG_DRM_PANEL_CHIPONE_ICNA3512=y
CONFIG_DRM_PANEL_CHIPONE_ICNA35XX=y
CONFIG_DRM_PANEL_DDIC_CH13726A=y
# CONFIG_DRM_PANEL_EBBG_FT8719 is not set
# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set
# CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set

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@@ -0,0 +1,51 @@
From aeae61e0f4d1c9a4dd71b024b871b443eee877bb Mon Sep 17 00:00:00 2001
From: Teguh Sobirin <teguh@sobir.in>
Date: Tue, 28 Oct 2025 14:22:48 +0800
Subject: [PATCH] drm/msm/dpu: Set vsync source irrespective of mdp top support
Signed-off-by: Teguh Sobirin <teguh@sobir.in>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 22 +++++++++------------
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 258edaa18fc0..f36c5c7924a3 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -784,24 +784,20 @@ static void _dpu_encoder_update_vsync_source(struct dpu_encoder_virt *dpu_enc,
return;
}
+ /* Set vsync source irrespective of mdp top support */
+ vsync_cfg.vsync_source = disp_info->vsync_source;
+
if (hw_mdptop->ops.setup_vsync_source) {
for (i = 0; i < dpu_enc->num_phys_encs; i++)
vsync_cfg.ppnumber[i] = dpu_enc->hw_pp[i]->idx;
+ }
- vsync_cfg.pp_count = dpu_enc->num_phys_encs;
- vsync_cfg.frame_rate = drm_mode_vrefresh(&dpu_enc->base.crtc->state->adjusted_mode);
-
- vsync_cfg.vsync_source = disp_info->vsync_source;
-
- hw_mdptop->ops.setup_vsync_source(hw_mdptop, &vsync_cfg);
-
- for (i = 0; i < dpu_enc->num_phys_encs; i++) {
- phys_enc = dpu_enc->phys_encs[i];
+ for (i = 0; i < dpu_enc->num_phys_encs; i++) {
+ phys_enc = dpu_enc->phys_encs[i];
- if (phys_enc->has_intf_te && phys_enc->hw_intf->ops.vsync_sel)
- phys_enc->hw_intf->ops.vsync_sel(phys_enc->hw_intf,
- vsync_cfg.vsync_source);
- }
+ if (phys_enc->has_intf_te && phys_enc->hw_intf->ops.vsync_sel)
+ phys_enc->hw_intf->ops.vsync_sel(phys_enc->hw_intf,
+ vsync_cfg.vsync_source);
}
}
--
2.34.1

View File

@@ -1,21 +1,21 @@
From 3a9cb9bab1475d1f907e0842f01b5d4ebaf860c6 Mon Sep 17 00:00:00 2001
From dc0296918d672985a2bfd24c32d4ebfa52b61dbe Mon Sep 17 00:00:00 2001
From: Teguh Sobirin <teguh@sobir.in>
Date: Wed, 12 Feb 2025 15:29:16 +0800
Date: Mon, 27 Oct 2025 17:05:23 +0800
Subject: [PATCH] leds: Add driver for HEROIC HTR3212
Signed-off-by: Teguh Sobirin <teguh@sobir.in>
---
drivers/leds/Kconfig | 10 ++
drivers/leds/Makefile | 1 +
drivers/leds/leds-htr3212.c | 298 ++++++++++++++++++++++++++++++++++++
3 files changed, 309 insertions(+)
drivers/leds/leds-htr3212.c | 319 ++++++++++++++++++++++++++++++++++++
3 files changed, 330 insertions(+)
create mode 100644 drivers/leds/leds-htr3212.c
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index b784bb74a837..74dcaf546b4f 100644
index 6e3dce7e35a4..ac9ce34b765c 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -211,6 +211,16 @@ config LEDS_EXPRESSWIRE
@@ -218,6 +218,16 @@ config LEDS_EXPRESSWIRE
bool
depends on GPIOLIB
@@ -33,10 +33,10 @@ index b784bb74a837..74dcaf546b4f 100644
tristate "LED support for CZ.NIC's Turris Omnia"
depends on LEDS_CLASS_MULTICOLOR
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
index 18afbb5a23ee..e2277fa7f00d 100644
index 9a0333ec1a86..36815a7526e9 100644
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_LEDS_DA9052) += leds-da9052.o
@@ -33,6 +33,7 @@ obj-$(CONFIG_LEDS_DA9052) += leds-da9052.o
obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o
obj-$(CONFIG_LEDS_GPIO_REGISTER) += leds-gpio-register.o
obj-$(CONFIG_LEDS_HP6XX) += leds-hp6xx.o
@@ -46,15 +46,15 @@ index 18afbb5a23ee..e2277fa7f00d 100644
obj-$(CONFIG_LEDS_IPAQ_MICRO) += leds-ipaq-micro.o
diff --git a/drivers/leds/leds-htr3212.c b/drivers/leds/leds-htr3212.c
new file mode 100644
index 000000000000..e9367c4aad04
index 000000000000..8eb6c3c7866f
--- /dev/null
+++ b/drivers/leds/leds-htr3212.c
@@ -0,0 +1,298 @@
@@ -0,0 +1,319 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Driver for HEROIC HTR3212 12-channel 8-bit PWM LED controller
+ *
+ * Copyright (c) 2024 Teguh Sobirin <teguh@sobir.in>
+ * Copyright (c) 2025 Teguh Sobirin <teguh@sobir.in>
+ *
+ */
+
@@ -65,7 +65,9 @@ index 000000000000..e9367c4aad04
+#include <linux/kernel.h>
+#include <linux/leds.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+#include <linux/regmap.h>
+
+#define HTR3212_CHANNELS 12
+#define HTR3212_ENABLE_BIT 1
@@ -86,22 +88,26 @@ index 000000000000..e9367c4aad04
+};
+
+struct htr3212_priv {
+ struct i2c_client *client;
+ unsigned int num_leds;
+ struct device *dev;
+ struct gpio_desc *sdb;
+ struct regulator *vdd;
+ struct htr3212_led_data leds[];
+ struct regmap *regmap;
+ struct mutex lock;
+ struct htr3212_led_data leds[HTR3212_CHANNELS];
+ unsigned int num_leds;
+};
+
+static int htr3212_write(struct htr3212_priv *priv, u8 reg, u8 val)
+{
+ int ret;
+
+ dev_dbg(&priv->client->dev, "writing register 0x%02X=0x%02X", reg, val);
+ dev_dbg(priv->dev, "writing register 0x%02X=0x%02X", reg, val);
+
+ ret = i2c_smbus_write_byte_data(priv->client, reg, val);
+ mutex_lock(&priv->lock);
+ ret = regmap_write(priv->regmap, reg, val);
+ mutex_unlock(&priv->lock);
+ if (ret) {
+ dev_err(&priv->client->dev,
+ dev_err(priv->dev,
+ "register write to 0x%02X failed (error %d)",
+ reg, ret);
+ }
@@ -256,13 +262,13 @@ index 000000000000..e9367c4aad04
+ return 0;
+}
+
+static const struct of_device_id of_htr3212_match[] = {
+ { .compatible = "heroic,htr3212", },
+ { /* sentinel */ }
+static const struct regmap_config htr3212_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .max_register = HTR3212_RESET,
+ .cache_type = REGCACHE_NONE,
+};
+
+MODULE_DEVICE_TABLE(of, of_htr3212_match);
+
+static int htr3212_probe(struct i2c_client *client)
+{
+ struct device *dev = &client->dev;
@@ -297,8 +303,16 @@ index 000000000000..e9367c4aad04
+ gpiod_set_value_cansleep(priv->sdb, 1);
+ usleep_range(10000, 11000);
+
+ priv->client = client;
+ priv->dev = &client->dev;
+
+ priv->regmap = devm_regmap_init_i2c(client, &htr3212_regmap_config);
+ if (IS_ERR(priv->regmap)) {
+ ret = PTR_ERR(priv->regmap);
+ return ret;
+ }
+
+ i2c_set_clientdata(client, priv);
+ mutex_init(&priv->lock);
+
+ ret = htr3212_init_regs(priv);
+ if (ret)
@@ -326,9 +340,16 @@ index 000000000000..e9367c4aad04
+ regulator_disable(priv->vdd);
+}
+
+static const struct of_device_id of_htr3212_match[] = {
+ { .compatible = "heroic,htr3212", },
+ { /* sentinel */ }
+};
+
+MODULE_DEVICE_TABLE(of, of_htr3212_match);
+
+static const struct i2c_device_id htr3212_id[] = {
+ { "htr3212" },
+ {},
+ { /* sentinel */ },
+};
+
+MODULE_DEVICE_TABLE(i2c, htr3212_id);

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@@ -0,0 +1,89 @@
From e154c5ad47302417a1ef134bb9e8ed3155061c70 Mon Sep 17 00:00:00 2001
From: Teguh Sobirin <teguh@sobir.in>
Date: Mon, 27 Oct 2025 18:32:01 +0800
Subject: [PATCH] Input: edt-ft5x06 - add no_regmap_bulk_read option
AYN SM8550 have problem with regmap_bulk_read under i2c_hub_*
Signed-off-by: Teguh Sobirin <teguh@sobir.in>
---
drivers/input/touchscreen/edt-ft5x06.c | 42 ++++++++++++++++++++++++--
1 file changed, 40 insertions(+), 2 deletions(-)
diff --git a/drivers/input/touchscreen/edt-ft5x06.c b/drivers/input/touchscreen/edt-ft5x06.c
index bf498bd4dea9..f8a7e66aee55 100644
--- a/drivers/input/touchscreen/edt-ft5x06.c
+++ b/drivers/input/touchscreen/edt-ft5x06.c
@@ -146,6 +146,7 @@ struct edt_ft5x06_ts_data {
enum edt_ver version;
unsigned int crc_errors;
unsigned int header_errors;
+ bool no_regmap_bulk_read;
};
struct edt_i2c_chip_data {
@@ -295,6 +296,36 @@ static const struct regmap_config edt_M06_i2c_regmap_config = {
.write = edt_M06_i2c_write,
};
+static int edt_bulk_read(struct regmap *map,
+ unsigned int start,
+ void *val, size_t len)
+{
+ u8 *dst = val;
+ size_t off = 0;
+
+ while (off < len) {
+ unsigned int v = 0;
+ int ret, tries;
+
+ for (tries = 0; tries < 3; tries++) {
+ ret = regmap_read(map, start + off, &v);
+ if (!ret) {
+ dst[off] = (u8)v;
+ break;
+ }
+ if (ret == -ETIMEDOUT || ret == -EAGAIN)
+ usleep_range(2000, 4000);
+ }
+
+ if (tries == 3)
+ return ret ? ret : -EIO;
+
+ off++;
+ }
+
+ return 0;
+}
+
static irqreturn_t edt_ft5x06_ts_isr(int irq, void *dev_id)
{
struct edt_ft5x06_ts_data *tsdata = dev_id;
@@ -304,8 +335,13 @@ static irqreturn_t edt_ft5x06_ts_isr(int irq, void *dev_id)
int error;
memset(rdbuf, 0, sizeof(rdbuf));
- error = regmap_bulk_read(tsdata->regmap, tsdata->tdata_cmd, rdbuf,
- tsdata->tdata_len);
+ if(tsdata->no_regmap_bulk_read) {
+ error = edt_bulk_read(tsdata->regmap, tsdata->tdata_cmd, rdbuf,
+ tsdata->tdata_len);
+ } else {
+ error = regmap_bulk_read(tsdata->regmap, tsdata->tdata_cmd, rdbuf,
+ tsdata->tdata_len);
+ }
if (error) {
dev_err_ratelimited(dev, "Unable to fetch data, error: %d\n",
error);
@@ -1232,6 +1268,8 @@ static int edt_ft5x06_ts_probe(struct i2c_client *client)
return error;
}
+ tsdata->no_regmap_bulk_read =
+ device_property_read_bool(&client->dev, "no-regmap-bulk-read");
/*
* Check which sleep modes we can support. Power-off requires the
* reset-pin to ensure correct power-down/power-up behaviour. Start with
--
2.34.1

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@@ -1,6 +1,6 @@
From 8206e5dc6a76358dfb14051be53025ce7da02d05 Mon Sep 17 00:00:00 2001
From d8b86c47b60709049b32ef72a96eb21727e1facc Mon Sep 17 00:00:00 2001
From: Teguh Sobirin <teguh@sobir.in>
Date: Fri, 28 Feb 2025 16:10:30 +0800
Date: Mon, 27 Oct 2025 16:49:38 +0800
Subject: [PATCH] drm/panel: Add panel driver for Xm-Plus XM91080G based panels
Signed-off-by: Teguh Sobirin <teguh@sobir.in>
@@ -12,10 +12,10 @@ Signed-off-by: Teguh Sobirin <teguh@sobir.in>
create mode 100644 drivers/gpu/drm/panel/panel-boe-xm91080g.c
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 112a7bfcd169ae..22a0854b9ec350 100644
index c667f5e4424f..3bcf710414dd 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -96,6 +96,16 @@ config DRM_PANEL_BOE_TV101WUM_LL2
@@ -105,6 +105,16 @@ config DRM_PANEL_BOE_TV101WUM_LL2
Say Y here if you want to support for BOE TV101WUM-LL2
WUXGA PANEL DSI Video Mode panel
@@ -29,24 +29,24 @@ index 112a7bfcd169ae..22a0854b9ec350 100644
+ Say Y if you want to enable support for panels based on the
+ Xm-Plus XM91080G controller.
+
config DRM_PANEL_CHIPONE_ICNA3512
tristate "Chipone ICNA3512 panel driver"
config DRM_PANEL_EBBG_FT8719
tristate "EBBG FT8719 panel driver"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 8773117908c8a4..c0c378f8564260 100644
index 5306d33caead..4b64459f88b5 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o
@@ -9,6 +9,7 @@ obj-$(CONFIG_DRM_PANEL_BOE_TD4320) += panel-boe-td4320.o
obj-$(CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A) += panel-boe-th101mb31ig002-28a.o
obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_LL2) += panel-boe-tv101wum-ll2.o
obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o
+obj-$(CONFIG_DRM_PANEL_BOE_XM91080G) += panel-boe-xm91080g.o
obj-$(CONFIG_DRM_PANEL_CHIPONE_ICNA3512) += panel-chipone-icna3512.o
obj-$(CONFIG_DRM_PANEL_DSI_CM) += panel-dsi-cm.o
obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o
obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o
diff --git a/drivers/gpu/drm/panel/panel-boe-xm91080g.c b/drivers/gpu/drm/panel/panel-boe-xm91080g.c
new file mode 100644
index 00000000000000..bd8e0f8562c8b4
index 000000000000..bd8e0f8562c8
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-boe-xm91080g.c
@@ -0,0 +1,388 @@
@@ -439,3 +439,6 @@ index 00000000000000..bd8e0f8562c8b4
+MODULE_DESCRIPTION("DRM driver for Xm-Plus XM91080G based MIPI DSI panels");
+MODULE_LICENSE("GPL");
\ No newline at end of file
--
2.34.1

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@@ -0,0 +1,383 @@
From d0ff75b09e66023c5f88992706dee4601aa7a437 Mon Sep 17 00:00:00 2001
From: Teguh Sobirin <teguh@sobir.in>
Date: Mon, 27 Oct 2025 16:53:15 +0800
Subject: [PATCH] drm/panel: Add panel driver for DDIC CH13726A based panels
Signed-off-by: Teguh Sobirin <teguh@sobir.in>
---
drivers/gpu/drm/panel/Kconfig | 11 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-ddic-ch13726a.c | 327 ++++++++++++++++++++
3 files changed, 339 insertions(+)
create mode 100644 drivers/gpu/drm/panel/panel-ddic-ch13726a.c
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index cc2b93322628..fd889664ff6b 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -126,6 +126,17 @@ config DRM_PANEL_CHIPONE_ICNA35XX
around the Chipone ICNA3512 and ICNA3520 display controllers,
such as some Tianma panels used in AYN Odin2 Portal and Thor.
+config DRM_PANEL_DDIC_CH13726A
+ tristate "DDIC CH13726A-based DSI panel"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ select DRM_DISPLAY_DP_HELPER
+ select DRM_DISPLAY_HELPER
+ help
+ Say Y here if you want to enable support for DDIC CH13726A-based
+ display panels.
+
config DRM_PANEL_EBBG_FT8719
tristate "EBBG FT8719 panel driver"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 339a5cb9f31b..c5f4f5f7bd82 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_LL2) += panel-boe-tv101wum-ll2.o
obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o
obj-$(CONFIG_DRM_PANEL_BOE_XM91080G) += panel-boe-xm91080g.o
obj-$(CONFIG_DRM_PANEL_CHIPONE_ICNA35XX) += panel-chipone-icna35xx.o
+obj-$(CONFIG_DRM_PANEL_DDIC_CH13726A) += panel-ddic-ch13726a.o
obj-$(CONFIG_DRM_PANEL_DSI_CM) += panel-dsi-cm.o
obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o
obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o
diff --git a/drivers/gpu/drm/panel/panel-ddic-ch13726a.c b/drivers/gpu/drm/panel/panel-ddic-ch13726a.c
new file mode 100644
index 000000000000..946ad32f9b82
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ddic-ch13726a.c
@@ -0,0 +1,327 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * DDIC CH13726A MIPI-DSI panel driver
+ * Copyright (c) 2024, Teguh Sobirin <teguh@sobir.in>.
+ */
+
+#include <linux/backlight.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/regulator/consumer.h>
+
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+
+#include <video/mipi_display.h>
+
+struct ch13726a_panel {
+ struct drm_panel panel;
+ struct mipi_dsi_device *dsi;
+ struct regulator_bulk_data supplies[4];
+ struct gpio_desc *reset_gpio;
+ const struct drm_display_mode *display_mode;
+ enum drm_panel_orientation orientation;
+ bool prepared;
+};
+
+static inline struct ch13726a_panel *to_ch13726a_panel(struct drm_panel *panel)
+{
+ return container_of(panel, struct ch13726a_panel, panel);
+}
+
+static void ch13726a_reset(struct ch13726a_panel *ctx)
+{
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ usleep_range(10000, 11000);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ usleep_range(10000, 11000);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ usleep_range(10000, 11000);
+}
+
+static int ch13726a_on(struct ch13726a_panel *ctx)
+{
+ struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
+
+ ctx->dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+ mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf0, 0x50);
+ mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb9, 0x00);
+
+ mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
+
+ mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
+
+ return dsi_ctx.accum_err;
+}
+
+static int ch13726a_disable(struct drm_panel *panel)
+{
+ struct ch13726a_panel *ctx = to_ch13726a_panel(panel);
+ struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
+
+ ctx->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+ mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
+ mipi_dsi_msleep(&dsi_ctx, 50);
+ mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
+
+ return dsi_ctx.accum_err;
+}
+
+static int ch13726a_prepare(struct drm_panel *panel)
+{
+ struct ch13726a_panel *ctx = to_ch13726a_panel(panel);
+ struct device *dev = &ctx->dsi->dev;
+ int ret;
+
+ if (ctx->prepared)
+ return 0;
+
+ ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
+ if (ret < 0) {
+ dev_err(dev, "Failed to enable regulators: %d\n", ret);
+ return ret;
+ }
+
+ ch13726a_reset(ctx);
+
+ ret = ch13726a_on(ctx);
+ if (ret < 0) {
+ dev_err(dev, "Failed to initialize panel: %d\n", ret);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
+ return ret;
+ }
+
+ msleep(28);
+
+ ctx->prepared = true;
+
+ return 0;
+}
+
+static int ch13726a_unprepare(struct drm_panel *panel)
+{
+ struct ch13726a_panel *ctx = to_ch13726a_panel(panel);
+
+ if (!ctx->prepared)
+ return 0;
+
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
+
+ ctx->prepared = false;
+ return 0;
+}
+
+static const struct drm_display_mode rp5_display_mode = {
+ .clock = (1080 + 12 + 4 + 12) * (1920 + 12 + 4 + 12) * 60 / 1000,
+ .hdisplay = 1080,
+ .hsync_start = 1080 + 12,
+ .hsync_end = 1080 + 12 + 4,
+ .htotal = 1080 + 12 + 4 + 12,
+ .vdisplay = 1920,
+ .vsync_start = 1920 + 12,
+ .vsync_end = 1920 + 12 + 4,
+ .vtotal = 1920 + 12 + 4 + 12,
+ .width_mm = 68,
+ .height_mm = 121,
+};
+
+static const struct drm_display_mode rpmini_display_mode = {
+ .clock = (960 + 28 + 4 + 36) * (1280 + 16 + 4 + 8) * 60 / 1000,
+ .hdisplay = 960,
+ .hsync_start = 960 + 28,
+ .hsync_end = 960 + 28 + 4,
+ .htotal = 960 + 28 + 4 + 36,
+ .vdisplay = 1280,
+ .vsync_start = 1280 + 16,
+ .vsync_end = 1280 + 16 + 4,
+ .vtotal = 1280 + 16 + 4 + 8,
+ .width_mm = 65,
+ .height_mm = 75,
+};
+
+static const struct drm_display_mode rpminiv2_display_mode = {
+ .clock = (1080 + 28 + 4 + 36) * (1240 + 16 + 4 + 8) * 60 / 1000,
+ .hdisplay = 1080,
+ .hsync_start = 1080 + 28,
+ .hsync_end = 1080 + 28 + 4,
+ .htotal = 1080 + 28 + 4 + 36,
+ .vdisplay = 1240,
+ .vsync_start = 1240 + 16,
+ .vsync_end = 1240 + 16 + 4,
+ .vtotal = 1240 + 16 + 4 + 8,
+ .width_mm = 65,
+ .height_mm = 75,
+};
+
+static int ch13726a_get_modes(struct drm_panel *panel,
+ struct drm_connector *connector)
+{
+ struct ch13726a_panel *ctx = to_ch13726a_panel(panel);
+ struct drm_display_mode *mode;
+
+ mode = drm_mode_duplicate(connector->dev, ctx->display_mode);
+ if (!mode)
+ return -ENOMEM;
+
+ drm_mode_set_name(mode);
+
+ mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+ connector->display_info.width_mm = mode->width_mm;
+ connector->display_info.height_mm = mode->height_mm;
+ drm_mode_probed_add(connector, mode);
+
+ return 1;
+}
+
+static enum drm_panel_orientation ch13726a_get_orientation(struct drm_panel *panel)
+{
+ struct ch13726a_panel *ctx = to_ch13726a_panel(panel);
+
+ return ctx->orientation;
+}
+
+static const struct drm_panel_funcs ch13726a_panel_funcs = {
+ .prepare = ch13726a_prepare,
+ .unprepare = ch13726a_unprepare,
+ .disable = ch13726a_disable,
+ .get_modes = ch13726a_get_modes,
+ .get_orientation = ch13726a_get_orientation,
+};
+
+static int ch13726a_bl_update_status(struct backlight_device *bl)
+{
+ struct mipi_dsi_device *dsi = bl_get_data(bl);
+ u16 brightness = backlight_get_brightness(bl);
+ int ret;
+
+ dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+ ret = mipi_dsi_dcs_set_display_brightness(dsi, brightness);
+ if (ret < 0)
+ return ret;
+
+ dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+ return 0;
+}
+
+static const struct backlight_ops ch13726a_bl_ops = {
+ .update_status = ch13726a_bl_update_status,
+};
+
+static struct backlight_device *
+ch13726a_create_backlight(struct mipi_dsi_device *dsi)
+{
+ struct device *dev = &dsi->dev;
+ const struct backlight_properties props = {
+ .type = BACKLIGHT_RAW,
+ .brightness = 255,
+ .max_brightness = 255,
+ };
+
+ return devm_backlight_device_register(dev, dev_name(dev), dev, dsi,
+ &ch13726a_bl_ops, &props);
+}
+
+static int ch13726a_probe(struct mipi_dsi_device *dsi)
+{
+ struct device *dev = &dsi->dev;
+ struct ch13726a_panel *ctx;
+ int ret;
+
+ ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
+ if (!ctx)
+ return -ENOMEM;
+
+ ctx->display_mode = of_device_get_match_data(dev);
+
+ ctx->supplies[0].supply = "vdd1v2";
+ ctx->supplies[1].supply = "vddio";
+ ctx->supplies[2].supply = "vdd";
+ ctx->supplies[3].supply = "avdd";
+
+ ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),
+ ctx->supplies);
+ if (ret < 0)
+ return dev_err_probe(dev, ret, "Failed to get regulators\n");
+
+ ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
+ if (IS_ERR(ctx->reset_gpio))
+ return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio),
+ "Failed to get reset-gpios\n");
+
+ ret = of_drm_get_panel_orientation(dev->of_node, &ctx->orientation);
+ if (ret < 0) {
+ dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, ret);
+ return ret;
+ }
+
+ ctx->dsi = dsi;
+ mipi_dsi_set_drvdata(dsi, ctx);
+
+ dsi->lanes = 4;
+ dsi->format = MIPI_DSI_FMT_RGB888;
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO |
+ MIPI_DSI_CLOCK_NON_CONTINUOUS;
+
+ drm_panel_init(&ctx->panel, dev, &ch13726a_panel_funcs,
+ DRM_MODE_CONNECTOR_DSI);
+ ctx->panel.prepare_prev_first = true;
+
+ ctx->panel.backlight = ch13726a_create_backlight(dsi);
+ if (IS_ERR(ctx->panel.backlight))
+ return dev_err_probe(dev, PTR_ERR(ctx->panel.backlight),
+ "Failed to create backlight\n");
+
+ drm_panel_add(&ctx->panel);
+
+ ret = mipi_dsi_attach(dsi);
+ if (ret < 0) {
+ dev_err(dev, "Failed to attach to DSI host: %d\n", ret);
+ drm_panel_remove(&ctx->panel);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void ch13726a_remove(struct mipi_dsi_device *dsi)
+{
+ struct ch13726a_panel *ctx = mipi_dsi_get_drvdata(dsi);
+ int ret;
+
+ ret = mipi_dsi_detach(dsi);
+ if (ret < 0)
+ dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret);
+
+ drm_panel_remove(&ctx->panel);
+}
+
+static const struct of_device_id ch13726a_of_match[] = {
+ { .compatible = "ch13726a,rp5", .data = &rp5_display_mode },
+ { .compatible = "ch13726a,rpmini", .data = &rpmini_display_mode },
+ { .compatible = "ch13726a,rpminiv2", .data = &rpminiv2_display_mode },
+ { .compatible = "ch13726a,thor", .data = &rpminiv2_display_mode },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ch13726a_of_match);
+
+static struct mipi_dsi_driver ch13726a_driver = {
+ .probe = ch13726a_probe,
+ .remove = ch13726a_remove,
+ .driver = {
+ .name = "panel-ch13726a-amoled",
+ .of_match_table = ch13726a_of_match,
+ },
+};
+module_mipi_dsi_driver(ch13726a_driver);
+
+MODULE_DESCRIPTION("DRM driver for CH13726A DSI panels");
+MODULE_LICENSE("GPL");
--
2.34.1

View File

@@ -1,11 +1,36 @@
diff -rupbN linux.orig/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2.dts linux/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2.dts
--- linux.orig/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2.dts 1970-01-01 00:00:00.000000000 +0000
+++ linux/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2.dts 2025-02-26 13:52:56.398992835 +0000
@@ -0,0 +1,353 @@
From d4c61eea0faae54d278058b39c5c568078025e60 Mon Sep 17 00:00:00 2001
From: Teguh Sobirin <teguh@sobir.in>
Date: Mon, 27 Oct 2025 17:38:24 +0800
Subject: [PATCH] arm64: dts: qcom: Add AYN Odin2
Signed-off-by: Teguh Sobirin <teguh@sobir.in>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
.../arm64/boot/dts/qcom/qcs8550-ayn-odin2.dts | 323 ++++++++++++++++++
2 files changed, 324 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2.dts
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 4bfa926b6a08..80e4d5b3a03d 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -126,6 +126,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-industrial-mezzanine.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-vision-mezzanine.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb
+dtb-$(CONFIG_ARCH_QCOM) += qcs8550-ayn-odin2.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb
dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb
diff --git a/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2.dts b/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2.dts
new file mode 100644
index 000000000000..98cf638b24f4
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2.dts
@@ -0,0 +1,323 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2025, Teguh Sobirin.
+ * Copyright (c) 2025, ROCKNIX (https://github.com/ROCKNIX)
+ */
+
+/dts-v1/;
@@ -44,39 +69,6 @@ diff -rupbN linux.orig/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2.dts linux/arch
+ };
+ };
+
+ vcc_hdmi_1v8: vcc-hdmi-1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_hdmi_1v8";
+
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ gpio = <&tlmm 10 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vdd_hdmi_1v8: vdd-hdmi-1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_hdmi_1v8";
+
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ gpio = <&tlmm 6 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vdd_disp_2v8: vdd-disp-2v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_disp_2v8";
+
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ gpio = <&tlmm 142 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ led_left_side: led-controller-1 {
+ compatible = "pwm-leds-multicolor";
+
@@ -176,56 +168,59 @@ diff -rupbN linux.orig/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2.dts linux/arch
+ };
+ };
+ };
+
+ vcc_hdmi_1v8: vcc-hdmi-1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_hdmi_1v8";
+
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ gpio = <&tlmm 10 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vdd_disp_2v8: vdd-disp-2v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_disp_2v8";
+
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ gpio = <&tlmm 142 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vdd_hdmi_1v8: vdd-hdmi-1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_hdmi_1v8";
+
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ gpio = <&tlmm 6 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+&display_panel {
+ compatible = "syna,td4328";
+
+ vddio-supply = <&vreg_l12b_1p8>;
+ pinctrl-0 = <&dsi_p_rst_active>, <&dsi_p_te_active>;
+ pinctrl-1 = <&dsi_p_rst_suspend>, <&dsi_p_te_suspend>;
+ pinctrl-names = "default", "sleep";
+
+ vdd-supply = <&vdd_disp_2v8>;
+ vddio-supply = <&vreg_l12b_1p8>;
+
+ backlight = <&backlight>;
+
+ reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>;
+
+ rotation = <90>;
+};
+
+&gpu {
+ zap-shader {
+ firmware-name = "qcom/sm8550/ayn/a740_zap.mbn";
+ };
+};
+
+&pmk8550_gpios {
+ pmk8550_sleep_clk: sleep-clk-state {
+ pins = "gpio3";
+ function = "func1";
+ input-disable;
+ output-enable;
+ bias-disable;
+ power-source = <0>;
+ };
+
+ pwm_backlight_default: pwm-backlight-default-state {
+ pins = "gpio5";
+ function = "func3";
+ input-disable;
+ output-low;
+ output-enable;
+ bias-disable;
+ power-source = <0>;
+ qcom,drive-strength = <2>;
+ };
+};
+
+&pmk8550_pwm {
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ pwm_rgb_left: sn3112@54 {
+ compatible = "si-en,sn3112-pwm";
+ reg = <0x54>;
@@ -236,19 +231,17 @@ diff -rupbN linux.orig/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2.dts linux/arch
+};
+
+&i2c4 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ touchscreen@20 {
+ compatible = "syna,rmi4-i2c";
+ reg = <0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts-extended = <&tlmm 25 0x2008>;
+ interrupt-parent = <&tlmm>;
+ interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
+
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&ts_int_default>;
+ pinctrl-1 = <&ts_int_sleep>;
+ pinctrl-0 = <&ts_p_int_default>;
+ pinctrl-1 = <&ts_p_int_sleep>;
+
+ vio-supply = <&vreg_l12b_1p8>;
+
@@ -274,9 +267,6 @@ diff -rupbN linux.orig/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2.dts linux/arch
+};
+
+&i2c12 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ pwm_rgb_right: sn3112@54 {
+ compatible = "si-en,sn3112-pwm";
+ reg = <0x54>;
@@ -286,27 +276,14 @@ diff -rupbN linux.orig/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2.dts linux/arch
+ };
+};
+
+&remoteproc_adsp {
+ firmware-name = "qcom/sm8550/ayn/odin2/adsp.mbn",
+ "qcom/sm8550/ayn/odin2/adsp_dtb.mbn";
+ status = "okay";
+};
+
+&spk_amp_l {
+ firmware-name = "qcom/sm8550/ayn/odin2/aw883xx_acf.bin";
+};
+
+&spk_amp_r {
+ firmware-name = "qcom/sm8550/ayn/odin2/aw883xx_acf.bin";
+};
+
+&i2c_hub_0 {
+ clock-frequency = <100000>;
+ status = "okay";
+
+ hdmi-bridge@48 {
+ lt8912_codec: hdmi-bridge@48 {
+ compatible = "lontium,lt8912b";
+ reg = <0x48> ;
+
+ reset-gpios = <&tlmm 7 GPIO_ACTIVE_LOW>;
+
+ vdd-supply = <&vdd_hdmi_1v8>;
@@ -355,3 +332,25 @@ diff -rupbN linux.orig/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2.dts linux/arch
+ vdds-supply = <&vreg_l1e_0p88>;
+ status = "okay";
+};
+
+&pmk8550_pwm {
+ status = "okay";
+};
+
+&remoteproc_adsp {
+ firmware-name = "qcom/sm8550/ayn/odin2/adsp.mbn",
+ "qcom/sm8550/ayn/odin2/adsp_dtb.mbn";
+ status = "okay";
+};
+
+&spk_amp_l {
+ firmware-name = "qcom/sm8550/ayn/odin2/aw883xx_acf.bin";
+};
+
+&spk_amp_r {
+ firmware-name = "qcom/sm8550/ayn/odin2/aw883xx_acf.bin";
+};
+
--
2.34.1

View File

@@ -1,9 +1,33 @@
From 82580def34aa466b2ff118f15b8cc6c83c7664d5 Mon Sep 17 00:00:00 2001
From: Teguh Sobirin <teguh@sobir.in>
Date: Mon, 27 Oct 2025 17:38:53 +0800
Subject: [PATCH] arm64: dts: qcom: Add AYN Odin2 Mini
Signed-off-by: Teguh Sobirin <teguh@sobir.in>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
.../boot/dts/qcom/qcs8550-ayn-odin2mini.dts | 192 ++++++++++++++++++
2 files changed, 193 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2mini.dts
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 80e4d5b3a03d..010c44b21573 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -127,6 +127,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-vision-mezzanine.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs8550-ayn-odin2.dtb
+dtb-$(CONFIG_ARCH_QCOM) += qcs8550-ayn-odin2mini.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb
dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb
diff --git a/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2mini.dts b/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2mini.dts
new file mode 100644
index 00000000000000..847df39c39cdcc
index 000000000000..c3f0219cdb3d
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2mini.dts
@@ -0,0 +1,187 @@
@@ -0,0 +1,192 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2025, Teguh Sobirin.
@@ -80,6 +104,10 @@ index 00000000000000..847df39c39cdcc
+&display_panel {
+ compatible = "boe,xm91080g";
+
+ pinctrl-0 = <&dsi_p_rst_active>, <&dsi_p_te_active>;
+ pinctrl-1 = <&dsi_p_rst_suspend>, <&dsi_p_te_suspend>;
+ pinctrl-names = "default", "sleep";
+
+ vdd-supply = <&vreg_l11b_1p2>;
+ vddio-supply = <&vreg_l12b_1p8>;
+ vci-supply = <&vreg_l13b_3p0>;
@@ -110,8 +138,8 @@ index 00000000000000..847df39c39cdcc
+ reset-gpios = <&tlmm 24 GPIO_ACTIVE_LOW>;
+ vdd-supply = <&vreg_l2b_3p0>;
+
+ pinctrl-0 = <&ts_int_default &ts_rst_default>;
+ pinctrl-1 = <&ts_int_sleep &ts_rst_sleep>;
+ pinctrl-0 = <&ts_p_rst_default &ts_p_int_default>;
+ pinctrl-1 = <&ts_p_rst_sleep &ts_p_int_sleep>;
+ pinctrl-names = "default", "sleep";
+
+ touchscreen-size-x = <1920>;
@@ -191,3 +219,7 @@ index 00000000000000..847df39c39cdcc
+&spk_amp_r {
+ firmware-name = "qcom/sm8550/ayn/odin2mini/aw883xx_acf.bin";
+};
+
--
2.34.1

View File

@@ -1,9 +1,33 @@
From 5d588a92d8f68df469c2acf50b2f3f8179a615cb Mon Sep 17 00:00:00 2001
From: Teguh Sobirin <teguh@sobir.in>
Date: Mon, 27 Oct 2025 17:39:32 +0800
Subject: [PATCH] arm64: dts: qcom: Add AYN Odin2 Portal
Signed-off-by: Teguh Sobirin <teguh@sobir.in>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
.../boot/dts/qcom/qcs8550-ayn-odin2portal.dts | 238 ++++++++++++++++++
2 files changed, 239 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2portal.dts
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 010c44b21573..356209923ce0 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -128,6 +128,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs8550-ayn-odin2.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs8550-ayn-odin2mini.dtb
+dtb-$(CONFIG_ARCH_QCOM) += qcs8550-ayn-odin2portal.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb
dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb
diff --git a/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2portal.dts b/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2portal.dts
new file mode 100644
index 000000000000..f04c275966e4
index 000000000000..ac9b786e626e
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/qcs8550-ayn-odin2portal.dts
@@ -0,0 +1,289 @@
@@ -0,0 +1,238 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2025, Teguh Sobirin.
@@ -40,67 +64,15 @@ index 000000000000..f04c275966e4
+ gpio = <&tlmm 142 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ multi-ledr1 {
+ compatible = "leds-group-multicolor";
+ color = <LED_COLOR_ID_RGB>;
+ function = "r1";
+ leds = <&ledr_r4>, <&ledr_g4>, <&ledr_b4>;
+ };
+
+ multi-ledl1 {
+ compatible = "leds-group-multicolor";
+ color = <LED_COLOR_ID_RGB>;
+ function = "l1";
+ leds = <&ledl_r4>, <&ledl_g4>, <&ledl_b4>;
+ };
+
+ multi-ledr2 {
+ compatible = "leds-group-multicolor";
+ color = <LED_COLOR_ID_RGB>;
+ function = "r2";
+ leds = <&ledr_r1>, <&ledr_g1>, <&ledr_b1>;
+ };
+
+ multi-ledl2 {
+ compatible = "leds-group-multicolor";
+ color = <LED_COLOR_ID_RGB>;
+ function = "l2";
+ leds = <&ledl_r1>, <&ledl_g1>, <&ledl_b1>;
+ };
+
+ multi-ledr3 {
+ compatible = "leds-group-multicolor";
+ color = <LED_COLOR_ID_RGB>;
+ function = "r3";
+ leds = <&ledr_r2>, <&ledr_g2>, <&ledr_b2>;
+ };
+
+ multi-ledl3 {
+ compatible = "leds-group-multicolor";
+ color = <LED_COLOR_ID_RGB>;
+ function = "l3";
+ leds = <&ledl_r2>, <&ledl_g2>, <&ledl_b2>;
+ };
+
+ multi-ledr4 {
+ compatible = "leds-group-multicolor";
+ color = <LED_COLOR_ID_RGB>;
+ function = "r4";
+ leds = <&ledr_r3>, <&ledr_g3>, <&ledr_b3>;
+ };
+
+ multi-ledl4 {
+ compatible = "leds-group-multicolor";
+ color = <LED_COLOR_ID_RGB>;
+ function = "l4";
+ leds = <&ledl_r3>, <&ledl_g3>, <&ledl_b3>;
+ };
+};
+
+&display_panel {
+ compatible = "chipone,icna3512";
+
+ pinctrl-0 = <&dsi_p_rst_active>, <&dsi_p_te_active>;
+ pinctrl-1 = <&dsi_p_rst_suspend>, <&dsi_p_te_suspend>;
+ pinctrl-names = "default", "sleep";
+
+ vdd-supply = <&vreg_l11b_1p2>;
+ vddio-supply = <&vreg_l12b_1p8>;
+ vci-supply = <&vreg_l13b_3p0>;
@@ -185,7 +157,7 @@ index 000000000000..f04c275966e4
+};
+
+&i2c4 {
+ touchscreen: touchscreen@38 {
+ touchscreen@38 {
+ compatible = "focaltech,ft5426";
+ reg = <0x38>;
+ #address-cells = <1>;
@@ -199,8 +171,8 @@ index 000000000000..f04c275966e4
+ vcc-supply = <&vreg_l14b_3p2>;
+ iovcc-supply = <&vreg_l12b_1p8>;
+
+ pinctrl-0 = <&ts_int_default &ts_rst_default>;
+ pinctrl-1 = <&ts_int_sleep &ts_rst_sleep>;
+ pinctrl-0 = <&ts_p_rst_default &ts_p_int_default>;
+ pinctrl-1 = <&ts_p_rst_sleep &ts_p_int_sleep>;
+ pinctrl-names = "default", "sleep";
+
+ touchscreen-size-x = <1080>;
@@ -293,3 +265,7 @@ index 000000000000..f04c275966e4
+&spk_amp_r {
+ firmware-name = "qcom/sm8550/ayn/odin2portal/aw883xx_acf.bin";
+};
+
--
2.34.1

View File

@@ -0,0 +1,407 @@
From 2e93d0d0712174aa7c518daa4856a5662f830616 Mon Sep 17 00:00:00 2001
From: Teguh Sobirin <teguh@sobir.in>
Date: Mon, 27 Oct 2025 17:40:08 +0800
Subject: [PATCH] arm64: dts: qcom: Add AYN Thor
Signed-off-by: Teguh Sobirin <teguh@sobir.in>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/qcs8550-ayn-thor.dts | 374 ++++++++++++++++++
2 files changed, 375 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/qcs8550-ayn-thor.dts
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 356209923ce0..58d221f10f40 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -129,6 +129,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs8550-ayn-odin2.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs8550-ayn-odin2mini.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs8550-ayn-odin2portal.dtb
+dtb-$(CONFIG_ARCH_QCOM) += qcs8550-ayn-thor.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb
dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb
diff --git a/arch/arm64/boot/dts/qcom/qcs8550-ayn-thor.dts b/arch/arm64/boot/dts/qcom/qcs8550-ayn-thor.dts
new file mode 100644
index 000000000000..f107519c0e5c
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/qcs8550-ayn-thor.dts
@@ -0,0 +1,374 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2025, Teguh Sobirin.
+ */
+
+/dts-v1/;
+
+#include "qcs8550-ayn-common.dtsi"
+
+/ {
+ model = "AYN Thor";
+ compatible = "ayn,thor", "qcom,qcs8550", "qcom,sm8550";
+ qcom,msm-id = <603 0x20000>;
+ qcom,board-id = <0x1001f 0>;
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ key-ayn {
+ label = "AYN Key";
+ debounce-interval = <15>;
+ gpios = <&tlmm 41 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_F24>;
+ linux,can-disable;
+ };
+
+ hall-lid-sensor {
+ label = "Hall Lid Sensor";
+ gpios = <&tlmm 17 GPIO_ACTIVE_LOW>;
+ linux,input-type = <EV_SW>;
+ linux,code = <SW_LID>;
+ linux,can-disable;
+ wakeup-source;
+ };
+ };
+
+ vdd_bl_5v0: vdd-bl-5v0-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_bl_5v0";
+
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+
+ gpio = <&tlmm 52 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vdd_disp_1v8: vdd-disp-1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_disp_1v8";
+
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vdd_disp1_2v8: vdd-disp1-2v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_disp1_2v8";
+
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ gpio = <&tlmm 142 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vdd_disp2_2v8: vdd-disp2-2v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_disp2_2v8";
+
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ gpio = <&tlmm 143 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vdd_ts_3v0: vdd-ts-3v0-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_ts_3v0";
+
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+
+ gpio = <&tlmm 144 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vdd_ts_1v8: vdd-ts-1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_ts_1v8";
+
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+&display_panel {
+ compatible = "chipone,icna3520";
+
+ pinctrl-0 = <&dsi_s_rst_active>, <&dsi_s_te_active>;
+ pinctrl-1 = <&dsi_s_rst_suspend>, <&dsi_s_te_suspend>;
+ pinctrl-names = "default", "sleep";
+
+ vdd-supply = <&vreg_l11b_1p2>;
+ vddio-supply = <&vreg_l12b_1p8>;
+ vci-supply = <&vreg_l14b_3p2>;
+ disp-supply = <&vdd_disp1_2v8>;
+ blvdd-supply = <&vdd_bl_5v0>;
+
+ reset-gpios = <&tlmm 137 GPIO_ACTIVE_LOW>;
+
+ rotation = <90>;
+};
+
+&i2c0 {
+ htr3212l: led-controller@3c {
+ compatible = "heroic,htr3212";
+ reg = <0x3c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ sdb-gpios = <&tlmm 55 GPIO_ACTIVE_HIGH>;
+ vdd-supply = <&vdd_mcu_3v3>;
+
+ ledl_b1: led@1 {
+ reg = <1>;
+ label = "l:r1";
+ color = <LED_COLOR_ID_RED>;
+ };
+ ledl_g1: led@2 {
+ reg = <2>;
+ label = "l:g1";
+ color = <LED_COLOR_ID_GREEN>;
+ };
+ ledl_r1: led@3 {
+ reg = <3>;
+ label = "l:b1";
+ color = <LED_COLOR_ID_BLUE>;
+ };
+ ledl_b2: led@4 {
+ reg = <4>;
+ label = "l:r2";
+ color = <LED_COLOR_ID_RED>;
+ };
+ ledl_g2: led@5 {
+ reg = <5>;
+ label = "l:g2";
+ color = <LED_COLOR_ID_GREEN>;
+ };
+ ledl_r2: led@6 {
+ reg = <6>;
+ label = "l:b2";
+ color = <LED_COLOR_ID_BLUE>;
+ };
+ ledl_b3: led@7 {
+ reg = <7>;
+ label = "l:r3";
+ color = <LED_COLOR_ID_RED>;
+ };
+ ledl_g3: led@8 {
+ reg = <8>;
+ label = "l:g3";
+ color = <LED_COLOR_ID_GREEN>;
+ };
+ ledl_r3: led@9 {
+ reg = <9>;
+ label = "l:b3";
+ color = <LED_COLOR_ID_BLUE>;
+ };
+ ledl_b4: led@10 {
+ reg = <10>;
+ label = "l:r4";
+ color = <LED_COLOR_ID_RED>;
+ };
+ ledl_g4: led@11 {
+ reg = <11>;
+ label = "l:g4";
+ color = <LED_COLOR_ID_GREEN>;
+ };
+ ledl_r4: led@12 {
+ reg = <12>;
+ label = "l:b4";
+ color = <LED_COLOR_ID_BLUE>;
+ };
+ };
+};
+
+&i2c4 {
+ touchscreen@38 {
+ compatible = "focaltech,ft5426";
+ reg = <0x38>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ interrupt-parent = <&tlmm>;
+ interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
+
+ reset-gpios = <&tlmm 24 GPIO_ACTIVE_LOW>;
+
+ vcc-supply = <&vreg_l14b_3p2>;
+ iovcc-supply = <&vreg_l12b_1p8>;
+
+ pinctrl-0 = <&ts_p_rst_default &ts_p_int_default>;
+ pinctrl-1 = <&ts_p_rst_sleep &ts_p_int_sleep>;
+ pinctrl-names = "default", "sleep";
+
+ touchscreen-size-x = <1080>;
+ touchscreen-size-y = <1920>;
+ };
+};
+
+&i2c12 {
+ htr3212r: led-controller@3c {
+ compatible = "heroic,htr3212";
+ reg = <0x3c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ sdb-gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>;
+ vdd-supply = <&vdd_mcu_3v3>;
+
+ ledr_b1: led@1 {
+ reg = <1>;
+ label = "r:r1";
+ color = <LED_COLOR_ID_RED>;
+ };
+ ledr_g1: led@2 {
+ reg = <2>;
+ label = "r:g1";
+ color = <LED_COLOR_ID_GREEN>;
+ };
+ ledr_r1: led@3 {
+ reg = <3>;
+ label = "r:b1";
+ color = <LED_COLOR_ID_BLUE>;
+ };
+ ledr_b2: led@4 {
+ reg = <4>;
+ label = "r:r2";
+ color = <LED_COLOR_ID_RED>;
+ };
+ ledr_g2: led@5 {
+ reg = <5>;
+ label = "r:g2";
+ color = <LED_COLOR_ID_GREEN>;
+ };
+ ledr_r2: led@6 {
+ reg = <6>;
+ label = "r:b2";
+ color = <LED_COLOR_ID_BLUE>;
+ };
+ ledr_b3: led@7 {
+ reg = <7>;
+ label = "r:r3";
+ color = <LED_COLOR_ID_RED>;
+ };
+ ledr_g3: led@8 {
+ reg = <8>;
+ label = "r:g3";
+ color = <LED_COLOR_ID_GREEN>;
+ };
+ ledr_r3: led@9 {
+ reg = <9>;
+ label = "r:b3";
+ color = <LED_COLOR_ID_BLUE>;
+ };
+ ledr_b4: led@10 {
+ reg = <10>;
+ label = "r:r4";
+ color = <LED_COLOR_ID_RED>;
+ };
+ ledr_g4: led@11 {
+ reg = <11>;
+ label = "r:g4";
+ color = <LED_COLOR_ID_GREEN>;
+ };
+ ledr_r4: led@12 {
+ reg = <12>;
+ label = "r:b4";
+ color = <LED_COLOR_ID_BLUE>;
+ };
+ };
+};
+
+&i2c_hub_3 {
+ clock-frequency = <100000>;
+ status = "okay";
+
+ touchscreen@38 {
+ compatible = "focaltech,ft5452";
+ reg = <0x38>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ interrupt-parent = <&tlmm>;
+ interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
+
+ reset-gpios = <&tlmm 14 GPIO_ACTIVE_LOW>;
+
+ vcc-supply = <&vdd_ts_3v0>;
+ iovcc-supply = <&vdd_ts_1v8>;
+
+ pinctrl-0 = <&ts_s_rst_default &ts_s_int_default>;
+ pinctrl-1 = <&ts_s_rst_sleep &ts_s_int_sleep>;
+ pinctrl-names = "default", "sleep";
+
+ touchscreen-size-x = <1080>;
+ touchscreen-size-y = <1240>;
+
+ no-regmap-bulk-read;
+ };
+};
+
+&mdss_dsi0 {
+ vdda-supply = <&vreg_l3e_1p2>;
+ status = "okay";
+
+ panel@0 {
+ reg = <0>;
+ compatible = "ch13726a,thor";
+
+ pinctrl-0 = <&dsi_p_rst_active>, <&dsi_p_te_active>;
+ pinctrl-1 = <&dsi_p_rst_suspend>, <&dsi_p_te_suspend>;
+ pinctrl-names = "default", "sleep";
+
+ vdd1v2-supply = <&vreg_l11b_1p2>;
+ vddio-supply = <&vdd_disp_1v8>;
+ vdd-supply = <&vreg_l13b_3p0>;
+ avdd-supply = <&vdd_disp2_2v8>;
+
+ reset-gpios = <&tlmm 133 GPIO_ACTIVE_HIGH>;
+
+ rotation = <90>;
+
+ port {
+ panel0_in: endpoint {
+ remote-endpoint = <&mdss_dsi0_out>;
+ };
+ };
+ };
+};
+
+&mdss_dsi0_out {
+ remote-endpoint = <&panel0_in>;
+ data-lanes = <0 1 2 3>;
+};
+
+&mdss_dsi0_phy {
+ vdds-supply = <&vreg_l1e_0p88>;
+ status = "okay";
+};
+
+&mdss_dsi1_out {
+ qcom,te-source = "mdp_vsync_s";
+};
+
+&remoteproc_adsp {
+ firmware-name = "qcom/sm8550/ayn/thor/adsp.mbn",
+ "qcom/sm8550/ayn/thor/adsp_dtb.mbn";
+ status = "okay";
+};
+
+&spk_amp_l {
+ firmware-name = "qcom/sm8550/ayn/thor/aw883xx_acf.bin";
+};
+
+&spk_amp_r {
+ firmware-name = "qcom/sm8550/ayn/thor/aw883xx_acf.bin";
+};
--
2.34.1

View File

@@ -31,9 +31,12 @@ case ${DEVICE} in
;;
*)
case ${DEVICE} in
S922X|SM8250|SM8550)
S922X|SM8250)
PKG_VERSION="6.17.4"
;;
SM8550)
PKG_VERSION="6.17.5"
;;
H700)
PKG_VERSION="6.16.9"
;;